diff --git a/arch/xtensa/include/xtensa/core.h b/arch/xtensa/include/xtensa/core.h
index 77ecb5aa76..b138aa558a 100644
--- a/arch/xtensa/include/xtensa/core.h
+++ b/arch/xtensa/include/xtensa/core.h
@@ -45,22 +45,9 @@
  * Included Files
  ****************************************************************************/
 
-/* Configuration independent definitions: */
-
-#warning REVISIT: Missing header files:
-//#include <arch/xtensa/hal.h>
-//#include <arch/xtensa/xtensa-versions.h>
-
-/* Configuration specific definitions: */
-
 #include <arch/chip/core-isa.h>
-//#include <arch/chip/core-matmap.h>
 #include <arch/chip/tie.h>
 
-#ifdef __ASSEMBLY__
-//#  include <arch/chip/tie-asm.h>
-#endif
-
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs
index 516d39bebd..2598bf3d6d 100644
--- a/arch/xtensa/src/esp32/Make.defs
+++ b/arch/xtensa/src/esp32/Make.defs
@@ -64,7 +64,7 @@ ifeq ($(CONFIG_SPINLOCK),y)
 endif
 
 ifeq ($(CONFIG_SMP),y)
-  CMN_CSRCS += xtensa_cpu_pause.c
+  CMN_CSRCS += xtensa_cpupause.c
 endif
 
 # Use of common/xtensa_etherstub.c is deprecated.  The preferred mechanism
diff --git a/arch/xtensa/src/esp32/esp32_clockconfig.c b/arch/xtensa/src/esp32/esp32_clockconfig.c
index 88f3351cb4..4f841b11be 100644
--- a/arch/xtensa/src/esp32/esp32_clockconfig.c
+++ b/arch/xtensa/src/esp32/esp32_clockconfig.c
@@ -77,7 +77,7 @@ enum xtal_freq_e
 void esp32_clockconfig(void)
 {
 #ifdef CONFIG_SUPPRESS_CLOCK_CONFIG
-#  warning WARNING: Clock coniguration disabled
+#  warning WARNING: Clock configuration disabled
 #else
   uint32_t freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ;
   enum xtal_freq_e freq;
diff --git a/arch/xtensa/src/esp32/esp32_cpu_interrupt.c b/arch/xtensa/src/esp32/esp32_cpu_interrupt.c
index 981fd76f4e..93315163ed 100644
--- a/arch/xtensa/src/esp32/esp32_cpu_interrupt.c
+++ b/arch/xtensa/src/esp32/esp32_cpu_interrupt.c
@@ -39,8 +39,10 @@
 
 #include <nuttx/config.h>
 
+#include <sys/types.h>
 #include <stdint.h>
 #include <assert.h>
+#include <errno.h>
 
 #include <arch/irq.h>
 
@@ -56,7 +58,7 @@
  * Name: esp32_cpu_interrupt
  *
  * Description:
- *   Called to handle the CPU0-4 interrupts.
+ *   Called to handle the CPU0/1 interrupts.
  *
  ****************************************************************************/
 
@@ -84,4 +86,18 @@ int esp32_cpu_interrupt(int irq, FAR void *context)
   return OK;
 }
 
+/****************************************************************************
+ * Name: xtensa_cpu_interrupt
+ *
+ * Description:
+ *   Called to trigger a CPU interrupt
+ *
+ ****************************************************************************/
+
+int xtensa_cpu_interrupt(int cpu, int intcode)
+{
+#warning Missing logic -- How do we do this?
+  return -ENOSYS;
+}
+
 #endif /* CONFIG_SMP */
diff --git a/arch/xtensa/src/esp32/esp32_cpustart.c b/arch/xtensa/src/esp32/esp32_cpustart.c
index 5b17abb0f9..d471525a3b 100644
--- a/arch/xtensa/src/esp32/esp32_cpustart.c
+++ b/arch/xtensa/src/esp32/esp32_cpustart.c
@@ -52,6 +52,7 @@
 #include "chip/esp32_dport.h"
 #include "esp32_region.h"
 #include "esp32_cpuint.h"
+#include "esp32_cpu_interrupt.h"
 
 #ifdef CONFIG_SMP
 
@@ -99,6 +100,35 @@ static inline void xtensa_disable_all(void)
   );
 }
 
+/****************************************************************************
+ * Name: xtensa_attach_cpu_interrupt
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+static inline void xtensa_attach_cpu_interrupt(void)
+{
+  int cpuint;
+
+  /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */
+
+  cpuint = esp32_alloc_levelint(1);
+  DEBUGASSERT(cpuint >= 0);
+
+  /* Connect all CPU peripheral source to allocated CPU interrupt */
+
+  up_disable_irq(cpuint);
+  esp32_attach_peripheral(1, ESP32_PERIPH_CPU_CPU0, cpuint);
+
+  /* Attach the inter-CPU interrupt. */
+
+  (void)irq_attach(ESP32_IRQ_CPU_CPU0, (xcpt_t)esp32_cpu_interrupt);
+
+  /* Enable the inter 0 CPU interrupts. */
+
+  up_enable_irq(cpuint);
+}
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -148,7 +178,13 @@ int xtensa_start_handler(int irq, FAR void *context)
 
   xtensa_disable_all();
 
-#warning REVISIT: Do we need to disable co-processors here?
+  /* Attach and emable internal interrupts */
+
+#ifdef CONFIG_SMP
+  /* Attach and enable the inter-CPU interrupt */
+
+  xtensa_attach_cpu_interrupt();
+#endif
 
   /* Detach all peripheral sources APP CPU interrupts */
 
@@ -243,8 +279,9 @@ int up_cpu_start(int cpu)
         }
 
       sem_destroy(&g_appcpu_interlock);
-      return OK;
     }
+
+  return OK;
 }
 
 #endif /* CONFIG_SMP */
diff --git a/arch/xtensa/src/esp32/esp32_irq.c b/arch/xtensa/src/esp32/esp32_irq.c
index c407b991e8..13792b0c48 100644
--- a/arch/xtensa/src/esp32/esp32_irq.c
+++ b/arch/xtensa/src/esp32/esp32_irq.c
@@ -48,6 +48,7 @@
 
 #include "xtensa.h"
 #include "esp32_cpuint.h"
+#include "esp32_cpu_interrupt.h"
 
 /****************************************************************************
  * Public Data
@@ -111,6 +112,35 @@ static inline void xtensa_disable_all(void)
   );
 }
 
+/****************************************************************************
+ * Name: xtensa_attach_cpu_interrupt
+ ****************************************************************************/
+
+#ifdef CONFIG_SMP
+static inline void xtensa_attach_cpu_interrupt(void)
+{
+  int cpuint;
+
+  /* Allocate a level-sensitive, priority 1 CPU interrupt for the UART */
+
+  cpuint = esp32_alloc_levelint(1);
+  DEBUGASSERT(cpuint >= 0);
+
+  /* Connect all CPU peripheral source to allocated CPU interrupt */
+
+  up_disable_irq(cpuint);
+  esp32_attach_peripheral(0, ESP32_PERIPH_CPU_CPU1, cpuint);
+
+  /* Attach the inter-CPU interrupt. */
+
+  (void)irq_attach(ESP32_IRQ_CPU_CPU1, (xcpt_t)esp32_cpu_interrupt);
+
+  /* Enable the inter 0 CPU interrupt. */
+
+  up_enable_irq(cpuint);
+}
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -140,8 +170,13 @@ void xtensa_irq_initialize(void)
 #warning Missing logic
 #endif
 
-  /* Attach all processor exceptions */
-#warning Missing logic
+  /* Attach and emable internal interrupts */
+
+#ifdef CONFIG_SMP
+  /* Attach and enable the inter-CPU interrupt */
+
+  xtensa_attach_cpu_interrupt();
+#endif
 
   esp32_irq_dump("initial", NR_IRQS);
 
diff --git a/arch/xtensa/src/esp32/esp32_start.c b/arch/xtensa/src/esp32/esp32_start.c
index 409bcf8813..a468e83a9c 100644
--- a/arch/xtensa/src/esp32/esp32_start.c
+++ b/arch/xtensa/src/esp32/esp32_start.c
@@ -85,8 +85,6 @@ void IRAM_ATTR __start(void)
 
   memset(&_sbss, 0, (&_ebss - &_sbss) * sizeof(_sbss));
 
-#warning REVISIT: Do we need to disable co-processors here?
-
   /* Make sure that the APP_CPU is disabled for now */
 
   regval  = getreg32(DPORT_APPCPU_CTRL_B_REG);
diff --git a/arch/xtensa/src/esp32/esp32_timerisr.c b/arch/xtensa/src/esp32/esp32_timerisr.c
index 3d031dc776..90ba8ecaae 100644
--- a/arch/xtensa/src/esp32/esp32_timerisr.c
+++ b/arch/xtensa/src/esp32/esp32_timerisr.c
@@ -195,7 +195,7 @@ void xtensa_timer_initialize(void)
    * attach any peripheral ID to the dedicated CPU interrupt.
    */
 
-  /* Attach the timer interrupt vector */
+  /* Attach the timer interrupt */
 
   (void)irq_attach(XTENSA_IRQ_TIMER0, (xcpt_t)esp32_timerisr);