Removed unused ARMv7-A cache function

This commit is contained in:
Gregory Nutt 2013-07-27 14:03:02 -06:00
parent fb84732cb8
commit 63eb68bc0a
2 changed files with 42 additions and 10 deletions

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@ -61,11 +61,6 @@ README
32kHz RTC Yes Yes Yes Yes 32kHz RTC Yes Yes Yes Yes
Packages LFBGA324_A LFBGA324_A LFBGA324_A LFBGA324_A Packages LFBGA324_A LFBGA324_A LFBGA324_A LFBGA324_A
Contents
========
- Configurations
Contents Contents
======== ========
@ -76,7 +71,8 @@ Contents
- NuttX EABI "buildroot" Toolchain - NuttX EABI "buildroot" Toolchain
- NuttX OABI "buildroot" Toolchain - NuttX OABI "buildroot" Toolchain
- NXFLAT Toolchain - NXFLAT Toolchain
- Loading Code - Loading Code into SRAM with J-Link
- Writing to FLASH using SAM-BA
- Buttons and LEDs - Buttons and LEDs
- Serial Consoles - Serial Consoles
- SAMA5D3x-EK Configuration Options - SAMA5D3x-EK Configuration Options
@ -282,8 +278,8 @@ NXFLAT Toolchain
8. Edit setenv.h, if necessary, so that the PATH variable includes 8. Edit setenv.h, if necessary, so that the PATH variable includes
the path to the newly built NXFLAT binaries. the path to the newly built NXFLAT binaries.
Loading Code Loading Code into SRAM with J-Link
============ ==================================
Loading code with the Segger tools and GDB Loading code with the Segger tools and GDB
------------------------------------------ ------------------------------------------
@ -307,6 +303,42 @@ Loading Code
J-Link> setpc <address of __start> J-Link> setpc <address of __start>
J-Link> ... start debugging ... J-Link> ... start debugging ...
Writing to FLASH using SAM-BA
=============================
Assumed starting configuration:
1. You have installed the J-Lnk CDC USB driver (Windows only, there is
no need to install a driver on any regular Linux distribution),
2. You have the USB connected to DBGU poort (J14)
3. Terminal configuration: 115200 8N1
Using SAM-BA to write to FLASH:
1. Exit the terminal emulation program and remove the USB cable from
the DBGU port (J14)
2. Connect the USB cable to the device USB port (J20)
3. JP9 must open so that (BMS == 1) to boot from on-chip Boot ROM
4. Press and maintain PB4 CS_BOOT button and power up the board. PB4
CS_BOOT button prevents booting from Nand or serial Flash by
disabling Flash Chip Selects after having powered the board, you can
release the PB4 BS_BOOT button.
5. On Windows you may need to wait for a device driver to be installed.
6. Start the SAM-BA application, selecting (1) the correct USB serial
port, and (2) board = at91sama5d3x-ek.
7. The SAM-BA menu should appear.
8. Select the FLASH bank that you want to use and the address to write
to and "Execute"
9. When you are finished writing to FLASH, remove the USB cable from J20
and re-connect the serial link on USB CDC / DBGU connector (J14) and
re-open the terminal emulator program.
10. Power cycle the board.
NOTES: By closing JP9 (BMS == 0), you can force the board to boot
directly to NOR FLASH. Executing from other memories will require that
you provide a special code header so that you code can be recognized as a
boot-able image by the ROM bootloader.
Buttons and LEDs Buttons and LEDs
================ ================

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@ -52,7 +52,7 @@
* *
* MAINOSC: Frequency = 12MHz (crysta) * MAINOSC: Frequency = 12MHz (crysta)
* PLLA: PLL Divider = 1, Multiplier = 66 to generate PLLACK = 792MHz * PLLA: PLL Divider = 1, Multiplier = 66 to generate PLLACK = 792MHz
* Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = to generate * Master Clock (MCK): Source = PLLACK/2, Prescalar = 1, MDIV = 3 to generate
* MCK = 132MHz * MCK = 132MHz
* CPU clock = 396MHz * CPU clock = 396MHz
*/ */
@ -88,7 +88,7 @@
* Prescaler input = 792MHz / 2 = 396MHz * Prescaler input = 792MHz / 2 = 396MHz
* Prescaler output = 792MHz / 1 = 396MHz * Prescaler output = 792MHz / 1 = 396MHz
* Processor Clock (PCK) = 396MHz * Processor Clock (PCK) = 396MHz
* Master clock (MCK) = 396MHz / 3 = 132MHz * Master clock (MCK) = 396MHz / 3 = 132MHz
*/ */
#define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA #define BOARD_PMC_MCKR_CSS PMC_MCKR_CSS_PLLA