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Add untested OHCI driver for the SAMA5; structure naming and header files for USB host initialization prototypes

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This commit is contained in:
Gregory Nutt 2013-08-11 17:11:32 -06:00
parent c7782bdfb9
commit 6424d0d63a
10 changed files with 108 additions and 17 deletions
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5
configs/cloudctrl/src/up_usb.c
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@ -2,7 +2,7 @@
* configs/cloudctrl/src/up_usbdev.c
* arch/arm/src/board/up_boot.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Darcy Gong <darcy.gong@gmail.com>
*
@ -54,6 +54,7 @@
#include "up_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "cloudctrl-internal.h"
#ifdef CONFIG_STM32_OTGFS
@ -186,7 +187,7 @@ int stm32_usbhost_initialize(void)
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_drvr = usbhost_initialize(0);
g_drvr = stm32_otgfshost_initialize(0);
if (g_drvr)
{
/* Start a thread to handle device connection. */

3
configs/mikroe-stm32f4/src/up_usb.c
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@ -53,6 +53,7 @@
#include "up_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "mikroe-stm32f4-internal.h"
#ifdef CONFIG_STM32_OTGFS
@ -185,7 +186,7 @@ int stm32_usbhost_initialize(void)
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_drvr = usbhost_initialize(0);
g_drvr = stm32_otgfshost_initialize(0);
if (g_drvr)
{
/* Start a thread to handle device connection. */

1
configs/olimex-lpc1766stk/src/up_nsh.c
View File

@ -51,6 +51,7 @@
#include "lpc17_ssp.h"
#include "lpc17_gpio.h"
#include "lpc17_usbhost.h"
#include "lpc1766stk_internal.h"
/****************************************************************************

1
configs/open1788/src/lpc17_nsh.c
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@ -52,6 +52,7 @@
#include "lpc17_gpio.h"
#include "lpc17_sdcard.h"
#include "lpc17_usbhost.h"
#include "open1788.h"
/****************************************************************************

61
configs/sama5d3x-ek/README.txt
View File

@ -694,18 +694,18 @@ SAMA5D3x-EK Configuration Options
Some subsystems can be configured to operate in different ways. The drivers
need to know how to configure the subsystem.
CONFIG_SAMA5_PIOA_IRQ - Support PIOA interrupts
CONFIG_SAMA5_PIOB_IRQ - Support PIOB interrupts
CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts
CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts
CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts
CONFIG_SAMA5_PIOA_IRQ - Support PIOA interrupts
CONFIG_SAMA5_PIOB_IRQ - Support PIOB interrupts
CONFIG_SAMA5_PIOC_IRQ - Support PIOD interrupts
CONFIG_SAMA5_PIOD_IRQ - Support PIOD interrupts
CONFIG_SAMA5_PIOE_IRQ - Support PIOE interrupts
CONFIG_USART0_ISUART - USART0 is configured as a UART
CONFIG_USART1_ISUART - USART1 is configured as a UART
CONFIG_USART2_ISUART - USART2 is configured as a UART
CONFIG_USART3_ISUART - USART3 is configured as a UART
ST91SAM4S specific device driver settings
ST91SAMA5 specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
@ -718,6 +718,34 @@ SAMA5D3x-EK Configuration Options
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
AT91SAMA5 USB Host Configuration
Pre-requisites
CONFIG_USBDEV - Enable USB device support
CONFIG_USBHOST - Enable USB host support
CONFIG_SAMA5_UHPHS - Needed
CONFIG_SAMA5_OHCI - Enable the STM32 USB OTG FS block
CONFIG_SCHED_WORKQUEUE - Worker thread support is required
Options:
CONFIG_SAMA5_OHCI_NEDS
Number of endpoint descriptors
CONFIG_SAMA5_OHCI_NTDS
Number of transfer descriptors
CONFIG_SAMA5_OHCI_TDBUFFERS
Number of transfer descriptor buffers
CONFIG_SAMA5_OHCI_TDBUFSIZE
Size of one transfer descriptor buffer
CONFIG_USBHOST_INT_DISABLE
Disable interrupt endpoint support
CONFIG_USBHOST_ISOC_DISABLE
Disable isochronous endpoint support
CONFIG_USBHOST_BULK_DISABLE
Disable bulk endpoint support
config SAMA5_OHCI_REGDEBUG
Configurations
==============
@ -1084,6 +1112,25 @@ Configurations
volume when it is removed. But those callbacks are not used in
this configuration.
10) Support the USB full-speed OHCI host driver can be enabled by change
the NuttX configuration file as follows:
System Type -> ATSAMA5 Peripheral Support
CONFIG_SAMA5_UHPHS=y : USB Host High Speed
System Type -> USB High Speed Host driver options
CONFIG_SAMA5_OHCI=y : Full-speed OHCI support
: Defaults for values probably OK
Device Drivers
CONFIG_USBHOST=y : Enable USB host support
Device Drivers -> USB Host Driver Support
CONFIG_USBHOST_ISOC_DISABLE=y : Isochronous endpoints not used
CONFIG_USBHOST_MSC=y : Enable the mass storage class driver
Library Routines
CONFIG_SCHED_WORKQUEUE : Worker thread support is required
STATUS:
2013-7-19: This configuration (as do the others) run at 396MHz.
The SAMA5D3 can run at 536MHz. I still need to figure out the
@ -1132,6 +1179,8 @@ Configurations
debug output is suppressed and card insertial and removal works as
expected (at least on the HSMCI1 microSD slot).
2013-8-11: Added OHCI configuration. Untested!
ostest:
This configuration directory, performs a simple OS test using
examples/ostest.

34
configs/sama5d3x-ek/include/board.h
View File

@ -96,9 +96,43 @@
#define BOARD_PMC_MCKR_PLLADIV PMC_MCKR_PLLADIV2
#define BOARD_PMC_MCKR_MDIV PMC_MCKR_MDIV_PCKDIV3
#ifdef CONFIG_SAMA5_OHCI
/* For OHCI Full-speed operations, the user has to perform the following:
*
* 1) Enable UHP peripheral clock, bit (1 << AT91C_ID_UHPHS) in PMC_PCER
* register.
* 2) Select PLLACK as Input clock of OHCI part, USBS bit in PMC_USB
* register.
* 3) Program the OHCI clocks (UHP48M and UHP12M) with USBDIV field in
* PMC_USB register. USBDIV value is calculated regarding the PLLACK
* value and USB Full-speed accuracy.
* 4) Enable the OHCI clocks, UHP bit in PMC_SCER register.
*
* "The USB Host controller requires 48 MHz and 12 MHz clocks for OHCI
* full-speed operations. These clocks must be generated by a PLL with a
* correct accuracy of ± 0.25% thanks to USBDIV field.
*
* "Thus the USB Host peripheral receives three clocks from the Power
* Management Controller (PMC): the Peripheral Clock (MCK domain), the
* UHP48M and the UHP12M (built-in UHP48M divided by four) used by the
* OHCI to interface with the bus USB signals (Recovered 12 MHz domain)
* in Full-speed operations"
*
* USB Clock = PLLACK / (USBDIV + 1) = 48MHz
* USBDIV = PLLACK / 48MHz - 1
* = 16.5
* REVISIT: USBDIV = 16 gives a clock of 46.59MHz which is an error of 3%
*/
# define BOARD_OHCI_INPUT PMC_USB_USBS_PLLA
# define BOARD_OHCI_DIVIDER (16)
#endif
#if 0
/* USB UTMI PLL start-up time */
#define BOARD_CKGR_UCKR_UPLLCOUNT (3 << PMC_CKGR_UCKR_UPLLCOUNT_SHIFT)
#endif
/* Resulting frequencies */

5
configs/shenzhou/src/up_usb.c
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@ -2,7 +2,7 @@
* configs/shenzhou/src/up_usbdev.c
* arch/arm/src/board/up_boot.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -53,6 +53,7 @@
#include "up_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "shenshou-internal.h"
#ifdef CONFIG_STM32_OTGFS
@ -185,7 +186,7 @@ int stm32_usbhost_initialize(void)
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_drvr = usbhost_initialize(0);
g_drvr = stm32_otgfshost_initialize(0);
if (g_drvr)
{
/* Start a thread to handle device connection. */

5
configs/stm3220g-eval/src/up_usb.c
View File

@ -2,7 +2,7 @@
* configs/stm3220g-eval/src/up_usb.c
* arch/arm/src/board/up_usb.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -53,6 +53,7 @@
#include "up_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "stm3220g-internal.h"
#ifdef CONFIG_STM32_OTGFS
@ -185,7 +186,7 @@ int stm32_usbhost_initialize(void)
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_drvr = usbhost_initialize(0);
g_drvr = stm32_otgfshost_initialize(0);
if (g_drvr)
{
/* Start a thread to handle device connection. */

5
configs/stm3240g-eval/src/up_usb.c
View File

@ -2,7 +2,7 @@
* configs/stm3240g-eval/src/up_usbdev.c
* arch/arm/src/board/up_boot.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -53,6 +53,7 @@
#include "up_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "stm3240g-internal.h"
#ifdef CONFIG_STM32_OTGFS
@ -185,7 +186,7 @@ int stm32_usbhost_initialize(void)
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_drvr = usbhost_initialize(0);
g_drvr = stm32_otgfshost_initialize(0);
if (g_drvr)
{
/* Start a thread to handle device connection. */

5
configs/stm32f4discovery/src/up_usb.c
View File

@ -2,7 +2,7 @@
* configs/stm32f4discovery/src/up_usbdev.c
* arch/arm/src/board/up_boot.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -53,6 +53,7 @@
#include "up_arch.h"
#include "stm32.h"
#include "stm32_otgfs.h"
#include "stm32f4discovery-internal.h"
#ifdef CONFIG_STM32_OTGFS
@ -185,7 +186,7 @@ int stm32_usbhost_initialize(void)
/* Then get an instance of the USB host interface */
uvdbg("Initialize USB host\n");
g_drvr = usbhost_initialize(0);
g_drvr = stm32_otgfshost_initialize(0);
if (g_drvr)
{
/* Start a thread to handle device connection. */