Finish ethernet register bit definitions
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2715 42af7a65-404d-4744-a932-0658087f49c3
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arch/arm/src/lpc17xx/lpc17_can.h
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arch/arm/src/lpc17xx/lpc17_can.h
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/************************************************************************************
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* arch/arm/src/lpc17xx/lpc17_can.h
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_LPC17XX_LPC17_CAN_H
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#define __ARCH_ARM_SRC_LPC17XX_LPC17_CAN_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "lp17_memorymap.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Register offsets *****************************************************************/
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/* CAN acceptance filter registers */
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#define LPC17_CANAF_AFMR_OFFSET 0x0000 /* Acceptance Filter Register */
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#define LPC17_CANAF_SFFSA_OFFSET 0x0004 /* Standard Frame Individual Start Address Register */
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#define LPC17_CANAF_SFFGRPSA_OFFSET 0x0008 /* Standard Frame Group Start Address Register */
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#define LPC17_CANAF_EFFSA_OFFSET 0x000c /* Extended Frame Start Address Register */
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#define LPC17_CANAF_EFFGRPSA_OFFSET 0x0010 /* Extended Frame Group Start Address Register */
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#define LPC17_CANAF_EOT_OFFSET 0x0014 /* End of AF Tables register */
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#define LPC17_CANAF_LUTERRAD_OFFSET 0x0018 /* LUT Error Address register */
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#define LPC17_CANAF_LUTERR_OFFSET 0x001c /* LUT Error Register */
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/* Central CAN registers */
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#define LPC17_CAN_TXSR_OFFSET 0x0000 /* CAN Central Transmit Status Register */
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#define LPC17_CAN_RXSR_OFFSET 0x0004 /* CAN Central Receive Status Register */
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#define LPC17_CAN_MSR_OFFSET 0x0008 /* CAN Central Miscellaneous Register */
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/* CAN1/2 registers */
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#define LPC17_CAN_BTR_OFFSET 0x0014 /* Bus Timing */
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#define LPC17_CAN_EWL_OFFSET 0x0018 /* Error Warning Limit */
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#define LPC17_CAN_SR_OFFSET 0x001c /* Status Register */
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#define LPC17_CAN_RFS_OFFSET 0x0020 /* Receive frame status */
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#define LPC17_CAN_RID_OFFSET 0x0024 /* Received Identifier */
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#define LPC17_CAN_RDA_OFFSET 0x0028 /* Received data bytes 1-4 */
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#define LPC17_CAN_RDB_OFFSET 0x002c /* Received data bytes 5-8 */
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#define LPC17_CAN_TFI1_OFFSET 0x0030 /* Transmit frame info (Tx Buffer 1) */
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#define LPC17_CAN_TID1_OFFSET 0x0034 /* Transmit Identifier (Tx Buffer 1) */
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#define LPC17_CAN_TDA1_OFFSET 0x0038 /* Transmit data bytes 1-4 (Tx Buffer 1) */
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#define LPC17_CAN_TDB1_OFFSET 0x003c /* Transmit data bytes 5-8 (Tx Buffer 1) */
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#define LPC17_CAN_TFI2_OFFSET 0x0040 /* Transmit frame info (Tx Buffer 2) */
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#define LPC17_CAN_TID2_OFFSET 0x0044 /* Transmit Identifier (Tx Buffer 2) */
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#define LPC17_CAN_TDA2_OFFSET 0x0048 /* Transmit data bytes 1-4 (Tx Buffer 2) */
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#define LPC17_CAN_TDB2_OFFSET 0x004c /* Transmit data bytes 5-8 (Tx Buffer 2) */
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#define LPC17_CAN_TFI3_OFFSET 0x0050 /* Transmit frame info (Tx Buffer 3) */
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#define LPC17_CAN_TID3_OFFSET 0x0054 /* Transmit Identifier (Tx Buffer 3) */
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#define LPC17_CAN_TDA3_OFFSET 0x0058 /* Transmit data bytes 1-4 (Tx Buffer 3) */
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#define LPC17_CAN_TDB3_OFFSET 0x005c /* Transmit data bytes 5-8 (Tx Buffer 3) */
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/* Register addresses ***************************************************************/
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/* CAN acceptance filter registers */
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#define LPC17_CANAF_AFMR (LPC17_CANAF_BASE+LPC17_CANAF_AFMR_OFFSET)
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#define LPC17_CANAF_SFFSA (LPC17_CANAF_BASE+LPC17_CANAF_SFFSA_OFFSET)
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#define LPC17_CANAF_SFFGRPSA (LPC17_CANAF_BASE+LPC17_CANAF_SFFGRPSA_OFFSET)
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#define LPC17_CANAF_EFFSA (LPC17_CANAF_BASE+LPC17_CANAF_EFFSA_OFFSET)
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#define LPC17_CANAF_EFFGRPSA (LPC17_CANAF_BASE+LPC17_CANAF_EFFGRPSA_OFFSET)
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#define LPC17_CANAF_EOT (LPC17_CANAF_BASE+LPC17_CANAF_EOT_OFFSET)
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#define LPC17_CANAF_LUTERRAD (LPC17_CANAF_BASE+LPC17_CANAF_LUTERRAD_OFFSET)
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#define LPC17_CANAF_LUTERR (LPC17_CANAF_BASE+LPC17_CANAF_LUTERR_OFFSET)
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/* Central CAN registers */
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#define LPC17_CAN_TXSR (LPC17_CAN_BASE+LPC17_CAN_TXSR_OFFSET)
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#define LPC17_CAN_RXSR (LPC17_CAN_BASE+LPC17_CAN_RXSR_OFFSET)
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#define LPC17_CAN_MSR (LPC17_CAN_BASE+LPC17_CAN_MSR_OFFSET)
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/* CAN1/2 registers */
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#define LPC17_CAN1_BTR (LPC17_CAN1_BASE+LPC17_CAN_BTR_OFFSET)
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#define LPC17_CAN1_EWL (LPC17_CAN1_BASE+LPC17_CAN_EWL_OFFSET)
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#define LPC17_CAN1_SR (LPC17_CAN1_BASE+LPC17_CAN_SR_OFFSET)
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#define LPC17_CAN1_RFS (LPC17_CAN1_BASE+LPC17_CAN_RFS_OFFSET)
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#define LPC17_CAN1_RID (LPC17_CAN1_BASE+LPC17_CAN_RID_OFFSET)
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#define LPC17_CAN1_RDA (LPC17_CAN1_BASE+LPC17_CAN_RDA_OFFSET)
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#define LPC17_CAN1_RDB (LPC17_CAN1_BASE+LPC17_CAN_RDB_OFFSET)
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#define LPC17_CAN1_TFI1 (LPC17_CAN1_BASE+LPC17_CAN_TFI1_OFFSET)
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#define LPC17_CAN1_TID1 (LPC17_CAN1_BASE+LPC17_CAN_TID1_OFFSET)
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#define LPC17_CAN1_TDA1 (LPC17_CAN1_BASE+LPC17_CAN_TDA1_OFFSET)
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#define LPC17_CAN1_TDB1 (LPC17_CAN1_BASE+LPC17_CAN_TDB1_OFFSET)
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#define LPC17_CAN1_TFI2 (LPC17_CAN1_BASE+LPC17_CAN_TFI2_OFFSET)
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#define LPC17_CAN1_TID2 (LPC17_CAN1_BASE+LPC17_CAN_TID2_OFFSET)
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#define LPC17_CAN1_TDA2 (LPC17_CAN1_BASE+LPC17_CAN_TDA2_OFFSET)
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#define LPC17_CAN1_TDB2 (LPC17_CAN1_BASE+LPC17_CAN_TDB2_OFFSET)
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#define LPC17_CAN1_TFI3 (LPC17_CAN1_BASE+LPC17_CAN_TFI3_OFFSET)
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#define LPC17_CAN1_TID3 (LPC17_CAN1_BASE+LPC17_CAN_TID3_OFFSET)
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#define LPC17_CAN1_TDA3 (LPC17_CAN1_BASE+LPC17_CAN_TDA3_OFFSET)
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#define LPC17_CAN1_TDB3 (LPC17_CAN1_BASE+LPC17_CAN_TDB3_OFFSET)
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#define LPC17_CAN2_BTR (LPC17_CAN2_BASE+LPC17_CAN_BTR_OFFSET)
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#define LPC17_CAN2_EWL (LPC17_CAN2_BASE+LPC17_CAN_EWL_OFFSET)
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#define LPC17_CAN2_SR (LPC17_CAN2_BASE+LPC17_CAN_SR_OFFSET)
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#define LPC17_CAN2_RFS (LPC17_CAN2_BASE+LPC17_CAN_RFS_OFFSET)
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#define LPC17_CAN2_RID (LPC17_CAN2_BASE+LPC17_CAN_RID_OFFSET)
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#define LPC17_CAN2_RDA (LPC17_CAN2_BASE+LPC17_CAN_RDA_OFFSET)
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#define LPC17_CAN2_RDB (LPC17_CAN2_BASE+LPC17_CAN_RDB_OFFSET)
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#define LPC17_CAN2_TFI1 (LPC17_CAN2_BASE+LPC17_CAN_TFI1_OFFSET)
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#define LPC17_CAN2_TID1 (LPC17_CAN2_BASE+LPC17_CAN_TID1_OFFSET)
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#define LPC17_CAN2_TDA1 (LPC17_CAN2_BASE+LPC17_CAN_TDA1_OFFSET)
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#define LPC17_CAN2_TDB1 (LPC17_CAN2_BASE+LPC17_CAN_TDB1_OFFSET)
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#define LPC17_CAN2_TFI2 (LPC17_CAN2_BASE+LPC17_CAN_TFI2_OFFSET)
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#define LPC17_CAN2_TID2 (LPC17_CAN2_BASE+LPC17_CAN_TID2_OFFSET)
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#define LPC17_CAN2_TDA2 (LPC17_CAN2_BASE+LPC17_CAN_TDA2_OFFSET)
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#define LPC17_CAN2_TDB2 (LPC17_CAN2_BASE+LPC17_CAN_TDB2_OFFSET)
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#define LPC17_CAN2_TFI3 (LPC17_CAN2_BASE+LPC17_CAN_TFI3_OFFSET)
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#define LPC17_CAN2_TID3 (LPC17_CAN2_BASE+LPC17_CAN_TID3_OFFSET)
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#define LPC17_CAN2_TDA3 (LPC17_CAN2_BASE+LPC17_CAN_TDA3_OFFSET)
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#define LPC17_CAN2_TDB3 (LPC17_CAN2_BASE+LPC17_CAN_TDB3_OFFSET)
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/* Register bit definitions *********************************************************/
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/* CAN acceptance filter registers */
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/* Acceptance Filter Register */
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#define CANAF_AFMR_
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/* Standard Frame Individual Start Address Register */
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#define CANAF_SFFSA_
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/* Standard Frame Group Start Address Register */
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#define CANAF_SFFGRPSA_
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/* Extended Frame Start Address Register */
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#define CANAF_EFFSA_
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/* Extended Frame Group Start Address Register */
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#define CANAF_EFFGRPSA_
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/* End of AF Tables register */
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#define CANAF_EOT_
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/* LUT Error Address register */
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#define CANAF_LUTERRAD_
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/* LUT Error Register */
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#define CANAF_LUTERR_
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/* Central CAN registers */
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/* CAN Central Transmit Status Register */
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#define CAN_TXSR_
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/* CAN Central Receive Status Register */
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#define CAN_RXSR_
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/* CAN Central Miscellaneous Register */
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#define CAN_MSR_
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/* CAN1/2 registers */
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/* Bus Timing */
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#define CAN_BTR_
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/* Error Warning Limit */
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#define CAN_EWL_
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/* Status Register */
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#define CAN_SR_
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/* Receive frame status */
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#define CAN_RFS_
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/* Received Identifier */
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#define CAN_RID_
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/* Received data bytes 1-4 */
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#define CAN_RDA_
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/* Received data bytes 5-8 */
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#define CAN_RDB_
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/* Transmit frame info (Tx Buffer 1) */
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#define CAN_TFI1_
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/* Transmit Identifier (Tx Buffer 1) */
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#define CAN_TID1_
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/* Transmit data bytes 1-4 (Tx Buffer 1) */
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#define CAN_TDA1_
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/* Transmit data bytes 5-8 (Tx Buffer 1) */
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#define CAN_TDB1_
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/* Transmit frame info (Tx Buffer 2) */
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#define CAN_TFI2_
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/* Transmit Identifier (Tx Buffer 2) */
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#define CAN_TID2_
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/* Transmit data bytes 1-4 (Tx Buffer 2) */
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#define CAN_TDA2_
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/* Transmit data bytes 5-8 (Tx Buffer 2) */
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#define CAN_TDB2_
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/* Transmit frame info (Tx Buffer 3) */
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#define CAN_TFI3_
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/* Transmit Identifier (Tx Buffer 3) */
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#define CAN_TID3_
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/* Transmit data bytes 1-4 (Tx Buffer 3) */
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#define CAN_TDA3_
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/* Transmit data bytes 5-8 (Tx Buffer 3) */
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#define CAN_TDB3_
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_LPC17XX_LPC17_CAN_H */
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