Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module

arch/arm/src/tiva/tiva_timer.c

@@ -47,7 +47,9 @@
 
 #include <nuttx/arch.h>
 #include <nuttx/irq.h>
+
 #include <arch/irq.h>
+#include <arch/board/board.h>
 
 #include "up_arch.h"
 #include "chip/tiva_syscontrol.h"
@@ -86,6 +88,7 @@ struct tiva_gptmstate_s
 
   /* Variable state values */
 
+  uint32_t frequency;          /* Frequency of the input clock */
   uint32_t imr;                /* Interrupt mask value. Zero if no interrupts */
 
 #ifdef CONFIG_TIVA_TIMER_REGDEBUG
@@ -1436,7 +1439,7 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
   while (!tiva_emac_periphrdy());
   up_udelay(250);
 
-  /* Select the alternal timer clock source is so reuested.  The general
+  /* Select the alternate timer clock source is so requested.  The general
    * purpose timer has the capability of being clocked by either the system
    * clock or an alternate clock source. By setting the ALTCLK bit in the
    * GPTM Clock Configuration (GPTMCC) register, software can selects an
@@ -1446,10 +1449,11 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
    *
    * NOTE: The actual alternate clock source selection is a global property
    * and cannot be configure on a timer-by-timer basis here.  That selection
-   * must be done by common logic early in the initialization sequence.
+   * must be done by common logic earlier in the initialization sequence.
    *
-   * In any case, the caller must provide us with the correct source
-   * frequency in gptm->frequency field.
+   * NOTE: Both the frequency of the SysClk (SYSCLK_FREQUENCY) and of the
+   * alternate clock (ALTCLK_FREQUENCY) must be provided in the board.h
+   * header file.
    */
 
   if (config->alternate)
@@ -1459,6 +1463,16 @@ TIMER_HANDLE tiva_gptm_configure(const struct tiva_gptmconfig_s *config)
       regval  = tiva_getreg(priv, TIVA_TIMER_CC_OFFSET);
       regval |= TIMER_CC_ALTCLK;
       tiva_putreg(priv, TIVA_TIMER_CC_OFFSET, regval);
+
+      /* Remember the frequency of the input clock */
+
+      priv->frequency = ALTCLK_FREQUENCY;
+    }
+  else
+    {
+      /* Remember the frequency of the input clock */
+
+      priv->frequency = SYSCLK_FREQUENCY;
     }
 
   /* Then [re-]configure the timer into the new configuration */

arch/arm/src/tiva/tiva_timer.h

@@ -212,8 +212,7 @@ struct tiva_gptmconfig_s
 {
   uint8_t gptm;                  /* GPTM number */
   uint8_t mode;                  /* See enum tiva_timer32mode_e */
-  uint8_t alternate;             /* False: Use SysClk; True: Use alternate clock source */
-  uint32_t frequency;            /* Frequency of the selected clock source */
+  bool alternate;                /* False: Use SysClk; True: Use alternate clock source */
 };
 
 /* This structure is cast compatible with struct tiva_gptmconfig_s and

arch/arm/src/tiva/tm4c129_syscontrol.c

@@ -397,4 +397,17 @@ void up_clockconfig(void)
   pllfreq0 = M2PLLFREQ0(BOARD_PLL_MINT, BOARD_PLL_MFRAC);
   pllfreq1 = QN2PLLFREQ1(BOARD_PLL_Q, BOARD_PLL_N);
   tiva_clockconfig(pllfreq0, pllfreq1, BOARD_PLL_SYSDIV);
+
+  /* Set up the alternate clock source
+   *
+   * The ALTCLK provides a clock source of numerous frequencies to the
+   * general-purpose timer, SSI, and UART modules.  The default source for
+   * the ALTCLK is the Precision Internal Oscillator (PIOSC).  The
+   * Hibernation Real-time Clock (RTCOSC) and Low Frequency Internal
+   * Oscillator (LFIOSC) are alternatives.  If the RTCOSC Output is
+   * selected, the clock source must also be enabled in the Hibernation
+   * module.
+   */
+
+  putreg32(BOARD_ALTCLKCFG, TIVA_SYSCON_ALTCLKCFG);
 }

configs/dk-tm4c129x/include/board.h

@@ -60,6 +60,12 @@
 #define SYSCON_RCC_XTAL      SYSCON_RCC_XTAL16000KHZ /* On-board crystal is 25 MHz */
 #define XTAL_FREQUENCY       25000000
 
+/* Frequencies of other clock sources */
+
+#define PIOSC_FREQUENCY      16000000 /* Precision internal oscillator */
+#define RTCOSC_FREQUENCY     32768    /* Hibernation Module RTC Oscillator */
+#define LFIOSC_FREQUENCY     33000    /* Low frequency internal oscillator */
+
 /* The PLL generates Fvco according to the following formulae.  The input clock to
  * the PLL may be either the external crystal (Fxtal) or PIOSC (Fpiosc).  This
  * logic supports only the external crystal as the PLL source clock.
@@ -94,6 +100,18 @@
 #define BOARD_PLL_SYSDIV     4         /* Sysclk = Fvco / 4 = 120MHz */
 #define SYSCLK_FREQUENCY     120000000 /* Resulting SysClk frequency */
 
+/* Alternate Clock (ALTCLK)
+ *
+ * The ALTCLK provides a clock source of numerous frequencies to the general-purpose
+ * timer, SSI, and UART modules.  The default source for the ALTCLK is the Precision
+ * Internal Oscillator (PIOSC).  The Hibernation Real-time Clock (RTCOSC) and Low
+ * Frequency Internal Oscillator (LFIOSC) are alternatives.  If the RTCOSC Output is
+ * selected, the clock source must also be enabled in the Hibernation module.
+ */
+
+#define BOARD_ALTCLKCFG      SYSCON_ALTCLKCFG_ALTCLK_PIOSC
+#define ALTCLK_FREQUENCY     PIOSC_FREQUENCY
+
 /* LED definitions ******************************************************************/
 /* The DK-TM4C129X has a single RGB LED.  There is only one visible LED which
  * will vary in color.  But, from the standpoint of the firmware, this appears as