More fixes to problems noted by cppcheck. Some are kind of risky; some are real bugs.

This commit is contained in:
Gregory Nutt 2014-11-25 13:15:09 -06:00
parent d4b01c55b5
commit 6498e1127e
12 changed files with 26 additions and 23 deletions

View File

@ -157,7 +157,6 @@
static void lpc31_sdraminitialize(void)
{
uint32_t tmp;
uint32_t regval;
/* These run-time calculations can be reduced dramatically if hclk is
@ -266,7 +265,7 @@ static void lpc31_sdraminitialize(void)
* 16bit mode
*/
tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
(void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
LPC31_MPMC_DYNCONFIG0);

View File

@ -157,7 +157,6 @@
static void lpc31_sdraminitialize(void)
{
uint32_t tmp;
uint32_t regval;
/* These run-time calculations can be reduced dramatically if hclk is
@ -266,7 +265,7 @@ static void lpc31_sdraminitialize(void)
* 16bit mode
*/
tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
(void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 13));
putreg32((MPMC_DYNCONFIG0_MDSDRAM|MPMC_DYNCONFIG_HP16_32MX16),
LPC31_MPMC_DYNCONFIG0);

View File

@ -146,5 +146,5 @@ void stm32_board_clockconfig(void)
while ((getreg32(STM32_RCC_CFGR) & RCC_CFGR_SWS_MASK) != RCC_CFGR_SWS_PLL)
;
#endif
}
#endif

View File

@ -169,7 +169,11 @@ int nsh_archinitialize(void)
FAR struct spi_dev_s *spi;
FAR struct mtd_dev_s *mtd;
#endif
#if defined(NSH_HAVEMMCSD) || defined(HAVE_USBHOST) || \
defined(HAVE_USBMONITOR) || defined(CONFIG_LCD_MIO283QT2) || \
defined(CONFIG_LCD_MIO283QT9A)
int ret;
#endif
/* Configure SPI-based devices */

View File

@ -435,7 +435,6 @@ static void tc_adc_init(void)
regval = tc_adc_getreg(STM32_ADC_SQR3_OFFSET) & ADC_SQR3_RESERVED;
regval |= LCD_YD_CHANNEL;
tc_adc_putreg(STM32_ADC_SQR3_OFFSET, regval);
regval = tc_adc_getreg(STM32_ADC_SQR3_OFFSET);
/* Set the number of conversions = 1 */

View File

@ -101,7 +101,7 @@ void imx_boardinitialize(void)
imxgpio_configprimary(GPIOA, 21);
imxgpio_configprimary(GPIOA, 22);
regval = getreg32(IMX_CS4_VSECTION + 0x0c);
regval = getreg32(IMX_CS4_VSECTION + 0x0c);
(void)getreg32(IMX_CS4_VSECTION + 0x0c);
(void)getreg32(IMX_CS4_VSECTION + 0x0c);
#endif
}

View File

@ -137,7 +137,6 @@ static uint32_t lpc31_ns2clk(uint32_t ns, uint32_t hclk2)
static inline void lpc31_sdraminitialize(void)
{
uint32_t tmp;
uint32_t regval;
/* These run-time calculations can be reduced dramatically if hclk is
@ -254,7 +253,7 @@ static inline void lpc31_sdraminitialize(void)
* 16bit mode
*/
tmp = getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 12));
(void)getreg32(LPC31_EXTSDRAM0_VSECTION | (0x23 << 12));
/* Select normal operating mode */

View File

@ -59,6 +59,10 @@
* Pre-Processor Definitions
****************************************************************************/
#if !defined(CONFIG_STM32_CAN1) && !defined(CONFIG_STM32_CAN2)
# undef CONFIG_CAN
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
@ -84,7 +88,7 @@ int nsh_archinitialize(void)
int ret;
#endif
#if defined(CONFIG_CAN) && (defined(CONFIG_STM32_CAN1) || defined(CONFIG_STM32_CAN2))
#ifdef CONFIG_CAN
/* Configure on-board CAN if CAN support has been selected. */
ret = stm32_can_initialize();

View File

@ -109,11 +109,6 @@
void open1788_sdram_initialize(void)
{
uint32_t regval;
#ifdef CONFIG_LPC17_SDRAM_16BIT
volatile uint16_t dummy;
#else
volatile uint32_t dummy;
#endif
int i;
/* Reconfigure delays:
@ -211,9 +206,9 @@ void open1788_sdram_initialize(void)
LPC17_EMC_DYNAMICCONTROL);
#ifdef CONFIG_LPC17_SDRAM_16BIT
dummy = getreg16(SDRAM_BASE | (0x33 << 12)); /* 8 burst, 3 CAS latency */
(void)getreg16(SDRAM_BASE | (0x33 << 12)); /* 8 burst, 3 CAS latency */
#elif defined CONFIG_LPC17_SDRAM_32BIT
dummy = getreg32(SDRAM_BASE | (0x32 << 13)); /* 4 burst, 3 CAS latency */
(void)getreg32(SDRAM_BASE | (0x32 << 13)); /* 4 burst, 3 CAS latency */
#endif
/* Issue NORMAL command */

View File

@ -1197,14 +1197,14 @@ static int stm32_setpower(struct lcd_dev_s *dev, int power)
else
#endif
#ifndef CONFIG_STM32_ILI9320_DISABLE
if (priv->type == LCD_TYPE_ILI9300)
if (priv->type == LCD_TYPE_ILI9320)
{
stm32_writereg(priv, LCD_REG_7, 0x0173);
}
else
#endif
#ifndef CONFIG_STM32_ILI9321_DISABLE
if (priv->type == LCD_TYPE_ILI9300)
if (priv->type == LCD_TYPE_ILI9321)
{
stm32_writereg(priv, LCD_REG_7, 0x0173);
}

View File

@ -170,7 +170,10 @@ void stm32_usbinitialize(void)
int stm32_usbhost_initialize(void)
{
int pid;
#if defined(CONFIG_USBHOST_MSC) || defined(CONFIG_USBHOST_HIDKBD) || \
defined(CONFIG_USBHOST_HIDMOUSE)
int ret;
#endif
/* First, register all of the class drivers needed to support the drivers
* that we care about:

View File

@ -577,7 +577,8 @@ int sif_main(int argc, char *argv[])
}
else if (status != 0) {
if (stpage != 0xFFFF) {
printf("Free Range:\t%d\t-\t%d\n", stpage, page-2);
printf("Free Range:\t%lu\t-\t%lu\n",
(unsigned long)stpage, (unsigned long)(page-2));
stpage = 0xFFFF;
}
}
@ -594,8 +595,8 @@ int sif_main(int argc, char *argv[])
size_t page = atoi(argv[2]);
size_t addr = page * up_progmem_pagesize(page);
printf("Write result: %d (writing to address %xh)\n",
up_progmem_write(addr, "Test", 4), addr);
printf("Write result: %d (writing to address %lxh)\n",
up_progmem_write(addr, "Test", 4), (unsigned long)addr);
return 0;
}
else if (!strcmp(argv[1], "i2c") && argc == 3) {