stm32 usbfs: Add copy of stm32_usbdev
This commit is contained in:
Zou Hanya
Xiang Xiao
parent
2696aee11d
commit
654960da4b
225
arch/arm/src/stm32/hardware/stm32_usbfs.h
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225
arch/arm/src/stm32/hardware/stm32_usbfs.h
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/****************************************************************************
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* arch/arm/src/stm32/hardware/stm32_usbdev.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBDEV_H
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#define __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBDEV_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F10XX) || defined(CONFIG_STM32_STM32F30XX) \
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|| defined(CONFIG_STM32_STM32F37XX)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Register Offsets *********************************************************/
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/* Endpoint Registers */
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#define STM32_USB_EPR_OFFSET(n) ((n) << 2) /* USB endpoint n register (16-bits) */
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#define STM32_USB_EP0R_OFFSET 0x0000 /* USB endpoint 0 register (16-bits) */
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#define STM32_USB_EP1R_OFFSET 0x0004 /* USB endpoint 1 register (16-bits) */
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#define STM32_USB_EP2R_OFFSET 0x0008 /* USB endpoint 2 register (16-bits) */
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#define STM32_USB_EP3R_OFFSET 0x000c /* USB endpoint 3 register (16-bits) */
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#define STM32_USB_EP4R_OFFSET 0x0010 /* USB endpoint 4 register (16-bits) */
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#define STM32_USB_EP5R_OFFSET 0x0014 /* USB endpoint 5 register (16-bits) */
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#define STM32_USB_EP6R_OFFSET 0x0018 /* USB endpoint 6 register (16-bits) */
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#define STM32_USB_EP7R_OFFSET 0x001c /* USB endpoint 7 register (16-bits) */
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/* Common Registers */
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#define STM32_USB_CNTR_OFFSET 0x0040 /* USB control register (16-bits) */
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#define STM32_USB_ISTR_OFFSET 0x0044 /* USB interrupt status register (16-bits) */
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#define STM32_USB_FNR_OFFSET 0x0048 /* USB frame number register (16-bits) */
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#define STM32_USB_DADDR_OFFSET 0x004c /* USB device address (16-bits) */
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#define STM32_USB_BTABLE_OFFSET 0x0050 /* Buffer table address (16-bits) */
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/* Buffer Descriptor Table (Relatative to BTABLE address) */
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#define STM32_USB_ADDR_TX_WOFFSET (0) /* Transmission buffer address n (16-bits) */
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#define STM32_USB_COUNT_TX_WOFFSET (2) /* Transmission byte count n (16-bits) */
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#define STM32_USB_ADDR_RX_WOFFSET (4) /* Reception buffer address n (16-bits) */
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#define STM32_USB_COUNT_RX_WOFFSET (6) /* Reception byte count n (16-bits) */
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#define STM32_USB_BTABLE_RADDR(ep,o) ((((uint32_t)getreg16(STM32_USB_BTABLE) + ((ep) << 3)) + (o)) << 1)
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#define STM32_USB_ADDR_TX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_ADDR_TX_WOFFSET)
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#define STM32_USB_COUNT_TX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_COUNT_TX_WOFFSET)
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#define STM32_USB_ADDR_RX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_ADDR_RX_WOFFSET)
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#define STM32_USB_COUNT_RX_OFFSET(ep) STM32_USB_BTABLE_RADDR(ep,STM32_USB_COUNT_RX_WOFFSET)
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/* Register Addresses *******************************************************/
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/* Endpoint Registers */
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#define STM32_USB_EPR(n) (STM32_USB_BASE+STM32_USB_EPR_OFFSET(n))
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#define STM32_USB_EP0R (STM32_USB_BASE+STM32_USB_EP0R_OFFSET)
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#define STM32_USB_EP1R (STM32_USB_BASE+STM32_USB_EP1R_OFFSET)
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#define STM32_USB_EP2R (STM32_USB_BASE+STM32_USB_EP2R_OFFSET)
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#define STM32_USB_EP3R (STM32_USB_BASE+STM32_USB_EP3R_OFFSET)
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#define STM32_USB_EP4R (STM32_USB_BASE+STM32_USB_EP4R_OFFSET)
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#define STM32_USB_EP5R (STM32_USB_BASE+STM32_USB_EP5R_OFFSET)
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#define STM32_USB_EP6R (STM32_USB_BASE+STM32_USB_EP6R_OFFSET)
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#define STM32_USB_EP7R (STM32_USB_BASE+STM32_USB_EP7R_OFFSET)
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/* Common Registers */
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#define STM32_USB_CNTR (STM32_USB_BASE+STM32_USB_CNTR_OFFSET)
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#define STM32_USB_ISTR (STM32_USB_BASE+STM32_USB_ISTR_OFFSET)
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#define STM32_USB_FNR (STM32_USB_BASE+STM32_USB_FNR_OFFSET)
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#define STM32_USB_DADDR (STM32_USB_BASE+STM32_USB_DADDR_OFFSET)
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#define STM32_USB_BTABLE (STM32_USB_BASE+STM32_USB_BTABLE_OFFSET)
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/* Buffer Descriptor Table (Relatative to BTABLE address) */
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#define STM32_USB_BTABLE_ADDR(ep,o) (STM32_USBRAM_BASE+STM32_USB_BTABLE_RADDR(ep,o))
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#define STM32_USB_ADDR_TX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_ADDR_TX_WOFFSET)
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#define STM32_USB_COUNT_TX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_COUNT_TX_WOFFSET)
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#define STM32_USB_ADDR_RX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_ADDR_RX_WOFFSET)
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#define STM32_USB_COUNT_RX(ep) STM32_USB_BTABLE_ADDR(ep,STM32_USB_COUNT_RX_WOFFSET)
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/* Register Bitfield Definitions ********************************************/
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/* USB endpoint register */
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#define USB_EPR_EA_SHIFT (0) /* Bits 3:0 [3:0]: Endpoint Address */
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#define USB_EPR_EA_MASK (0X0f << USB_EPR_EA_SHIFT)
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#define USB_EPR_STATTX_SHIFT (4) /* Bits 5-4: Status bits, for transmission transfers */
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#define USB_EPR_STATTX_MASK (3 << USB_EPR_STATTX_SHIFT)
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# define USB_EPR_STATTX_DIS (0 << USB_EPR_STATTX_SHIFT) /* EndPoint TX DISabled */
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# define USB_EPR_STATTX_STALL (1 << USB_EPR_STATTX_SHIFT) /* EndPoint TX STALLed */
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# define USB_EPR_STATTX_NAK (2 << USB_EPR_STATTX_SHIFT) /* EndPoint TX NAKed */
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# define USB_EPR_STATTX_VALID (3 << USB_EPR_STATTX_SHIFT) /* EndPoint TX VALID */
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# define USB_EPR_STATTX_DTOG1 (1 << USB_EPR_STATTX_SHIFT) /* EndPoint TX Data Toggle bit1 */
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# define USB_EPR_STATTX_DTOG2 (2 << USB_EPR_STATTX_SHIFT) /* EndPoint TX Data Toggle bit2 */
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#define USB_EPR_DTOG_TX (1 << 6) /* Bit 6: Data Toggle, for transmission transfers */
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#define USB_EPR_CTR_TX (1 << 7) /* Bit 7: Correct Transfer for transmission */
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#define USB_EPR_EP_KIND (1 << 8) /* Bit 8: Endpoint Kind */
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#define USB_EPR_EPTYPE_SHIFT (9) /* Bits 10-9: Endpoint type */
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#define USB_EPR_EPTYPE_MASK (3 << USB_EPR_EPTYPE_SHIFT)
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# define USB_EPR_EPTYPE_BULK (0 << USB_EPR_EPTYPE_SHIFT) /* EndPoint BULK */
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# define USB_EPR_EPTYPE_CONTROL (1 << USB_EPR_EPTYPE_SHIFT) /* EndPoint CONTROL */
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# define USB_EPR_EPTYPE_ISOC (2 << USB_EPR_EPTYPE_SHIFT) /* EndPoint ISOCHRONOUS */
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# define USB_EPR_EPTYPE_INTERRUPT (3 << USB_EPR_EPTYPE_SHIFT) /* EndPoint INTERRUPT */
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#define USB_EPR_SETUP (1 << 11) /* Bit 11: Setup transaction completed */
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#define USB_EPR_STATRX_SHIFT (12) /* Bits 13-12: Status bits, for reception transfers */
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#define USB_EPR_STATRX_MASK (3 << USB_EPR_STATRX_SHIFT)
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# define USB_EPR_STATRX_DIS (0 << USB_EPR_STATRX_SHIFT) /* EndPoint RX DISabled */
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# define USB_EPR_STATRX_STALL (1 << USB_EPR_STATRX_SHIFT) /* EndPoint RX STALLed */
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# define USB_EPR_STATRX_NAK (2 << USB_EPR_STATRX_SHIFT) /* EndPoint RX NAKed */
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# define USB_EPR_STATRX_VALID (3 << USB_EPR_STATRX_SHIFT) /* EndPoint RX VALID */
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# define USB_EPR_STATRX_DTOG1 (1 << USB_EPR_STATRX_SHIFT) /* EndPoint RX Data TOGgle bit1 */
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# define USB_EPR_STATRX_DTOG2 (2 << USB_EPR_STATRX_SHIFT) /* EndPoint RX Data TOGgle bit1 */
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#define USB_EPR_DTOG_RX (1 << 14) /* Bit 14: Data Toggle, for reception transfers */
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#define USB_EPR_CTR_RX (1 << 15) /* Bit 15: Correct Transfer for reception */
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/* USB control register */
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#define USB_CNTR_FRES (1 << 0) /* Bit 0: Force USB Reset */
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#define USB_CNTR_PDWN (1 << 1) /* Bit 1: Power down */
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#define USB_CNTR_LPMODE (1 << 2) /* Bit 2: Low-power mode */
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#define USB_CNTR_FSUSP (1 << 3) /* Bit 3: Force suspend */
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#define USB_CNTR_RESUME (1 << 4) /* Bit 4: Resume request */
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#define USB_CNTR_ESOFM (1 << 8) /* Bit 8: Expected Start Of Frame Interrupt Mask */
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#define USB_CNTR_SOFM (1 << 9) /* Bit 9: Start Of Frame Interrupt Mask */
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#define USB_CNTR_RESETM (1 << 10) /* Bit 10: USB Reset Interrupt Mask */
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#define USB_CNTR_SUSPM (1 << 11) /* Bit 11: Suspend mode Interrupt Mask */
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#define USB_CNTR_WKUPM (1 << 12) /* Bit 12: Wakeup Interrupt Mask */
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#define USB_CNTR_ERRM (1 << 13) /* Bit 13: Error Interrupt Mask */
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#define USB_CNTR_DMAOVRNM (1 << 14) /* Bit 14: Packet Memory Area Over / Underrun Interrupt Mask */
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#define USB_CNTR_CTRM (1 << 15) /* Bit 15: Correct Transfer Interrupt Mask */
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#define USB_CNTR_ALLINTS (USB_CNTR_ESOFM|USB_CNTR_SOFM|USB_CNTR_RESETM|USB_CNTR_SUSPM|\
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USB_CNTR_WKUPM|USB_CNTR_ERRM|USB_CNTR_DMAOVRNM|USB_CNTR_CTRM)
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/* USB interrupt status register */
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#define USB_ISTR_EPID_SHIFT (0) /* Bits 3-0: Endpoint Identifier */
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#define USB_ISTR_EPID_MASK (0x0f << USB_ISTR_EPID_SHIFT)
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#define USB_ISTR_DIR (1 << 4) /* Bit 4: Direction of transaction */
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#define USB_ISTR_ESOF (1 << 8) /* Bit 8: Expected Start Of Frame */
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#define USB_ISTR_SOF (1 << 9) /* Bit 9: Start Of Frame */
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#define USB_ISTR_RESET (1 << 10) /* Bit 10: USB RESET request */
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#define USB_ISTR_SUSP (1 << 11) /* Bit 11: Suspend mode request */
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#define USB_ISTR_WKUP (1 << 12) /* Bit 12: Wake up */
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#define USB_ISTR_ERR (1 << 13) /* Bit 13: Error */
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#define USB_ISTR_DMAOVRN (1 << 14) /* Bit 14: Packet Memory Area Over / Underrun */
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#define USB_ISTR_CTR (1 << 15) /* Bit 15: Correct Transfer */
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#define USB_ISTR_ALLINTS (USB_ISTR_ESOF|USB_ISTR_SOF|USB_ISTR_RESET|USB_ISTR_SUSP|\
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USB_ISTR_WKUP|USB_ISTR_ERR|USB_ISTR_DMAOVRN|USB_ISTR_CTR)
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/* USB frame number register */
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#define USB_FNR_FN_SHIFT (0) /* Bits 10-0: Frame Number */
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#define USB_FNR_FN_MASK (0x07ff << USB_FNR_FN_SHIFT)
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#define USB_FNR_LSOF_SHIFT (11) /* Bits 12-11: Lost SOF */
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#define USB_FNR_LSOF_MASK (3 << USB_FNR_LSOF_SHIFT)
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#define USB_FNR_LCK (1 << 13) /* Bit 13: Locked */
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#define USB_FNR_RXDM (1 << 14) /* Bit 14: Receive Data - Line Status */
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#define USB_FNR_RXDP (1 << 15) /* Bit 15: Receive Data + Line Status */
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/* USB device address */
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#define USB_DADDR_ADD_SHIFT (0) /* Bits 6-0: Device Address */
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#define USB_DADDR_ADD_MASK (0x7f << USB_DADDR_ADD_SHIFT)
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#define USB_DADDR_EF (1 << 7) /* Bit 7: Enable Function */
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/* Buffer table address */
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#define USB_BTABLE_SHIFT (3) /* Bits 15:3: Buffer Table */
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#define USB_BTABLE_MASK (0x1fff << USB_BTABLE_SHIFT)
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/* Transmission buffer address */
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#define USB_ADDR_TX_ZERO (1 << 0) /* Bit 0 Must always be written as ‘0’ */
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#define USB_ADDR_TX_SHIFT (1) /* Bits 15-1: Transmission Buffer Address */
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#define USB_ADDR_TX_MASK (0x7fff << USB_ADDR_ADDR_TX_SHIFT)
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/* Transmission byte count */
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#define USB_COUNT_TX_SHIFT (0) /* Bits 9-0: Transmission Byte Count */
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#define USB_COUNT_TX_MASK (0x03ff << USB_COUNT_COUNT_TX_SHIFT)
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/* Reception buffer address */
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#define USB_ADDR_RX_ZERO (1 << 0) /* Bit 0 This bit must always be written as ‘0’ */
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#define USB_ADDR_RX_SHIFT (1) /* Bits 15:1 ADDRn_RX[15:1]: Reception Buffer Address */
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#define USB_ADDR_RX_MASK (0x7fff << USB_ADDR_RX_SHIFT)
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/* Reception byte count */
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#define USB_COUNT_RX_BL_SIZE (1 << 15) /* Bit 15: BLock SIZE. */
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#define USB_COUNT_RX_NUM_BLOCK_SHIFT (10) /* Bits 14-10: Number of blocks */
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#define USB_COUNT_RX_NUM_BLOCK_MASK (0x1f << USB_COUNT_RX_NUM_BLOCK_SHIFT)
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#define USB_COUNT_RX_SHIFT (0) /* Bits 9-0: Reception Byte Count */
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#define USB_COUNT_RX_MASK (0x03ff << USB_COUNT_RX_SHIFT)
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#endif /* CONFIG_STM32_STM32F10XX || CONFIG_STM32_STM32F30XX || CONFIG_STM32_STM32F37XX */
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#endif /* __ARCH_ARM_SRC_STM32_HARDWARE_STM32_USBDEV_H */
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4010
arch/arm/src/stm32/stm32_usbfs.c
Normal file
4010
arch/arm/src/stm32/stm32_usbfs.c
Normal file
File diff suppressed because it is too large
Load Diff
82
arch/arm/src/stm32/stm32_usbfs.h
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82
arch/arm/src/stm32/stm32_usbfs.h
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/****************************************************************************
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* arch/arm/src/stm32/stm32_usbdev.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_USBDEV_H
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#define __ARCH_ARM_SRC_STM32_STM32_USBDEV_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/usb/usbdev.h>
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#include <stdint.h>
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#include "chip.h"
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#include "hardware/stm32_usbdev.h"
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/****************************************************************************
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* Public Functions Prototypes
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: stm32_usbpullup
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*
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* Description:
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* If USB is supported and the board supports a pullup via GPIO (for USB
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* software connect and disconnect), then the board software must provide
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* stm32_pullup. See include/nuttx/usb/usbdev.h for additional description
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* of this method.
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*
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****************************************************************************/
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int stm32_usbpullup(struct usbdev_s *dev, bool enable);
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/****************************************************************************
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* Name: stm32_usbsuspend
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*
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* Description:
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* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver
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* is used. This function is called whenever the USB enters or leaves
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* suspend mode. This is an opportunity for the board logic to shutdown
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* clocks, power, etc. while the USB is suspended.
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*
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****************************************************************************/
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void stm32_usbsuspend(struct usbdev_s *dev, bool resume);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32_STM32_USBDEV_H */
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