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Merged nuttx/nuttx into master

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This commit is contained in:
ziggurat29 2016-04-17 21:23:50 -05:00
commit 655d51c346
22 changed files with 278 additions and 128 deletions
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36
arch/arm/src/dm320/dm320_framebuffer.c
View File

@ -1010,10 +1010,11 @@ static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
}
#endif
pinfo->fbmem = g_vid0base;
pinfo->fblen = DM320_VID0_FBLEN;
pinfo->stride = DM320_VID0_STRIDE;
pinfo->bpp = DM320_VID0_BPP;
pinfo->fbmem = g_vid0base;
pinfo->fblen = DM320_VID0_FBLEN;
pinfo->stride = DM320_VID0_STRIDE;
pinfo->display = 0;
pinfo->bpp = DM320_VID0_BPP;
return OK;
}
#endif
@ -1056,10 +1057,11 @@ static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
}
#endif
pinfo->fbmem = g_vid1base;
pinfo->fblen = DM320_VID1_FBLEN;
pinfo->stride = DM320_VID1_STRIDE;
pinfo->bpp = DM320_VID1_BPP;
pinfo->fbmem = g_vid1base;
pinfo->fblen = DM320_VID1_FBLEN;
pinfo->stride = DM320_VID1_STRIDE;
pinfo->display = 1;
pinfo->bpp = DM320_VID1_BPP;
return OK;
}
#endif
@ -1106,10 +1108,11 @@ static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
}
#endif
pinfo->fbmem = g_osd0base;
pinfo->fblen = DM320_OSD0_FBLEN;
pinfo->stride = DM320_OSD0_STRIDE;
pinfo->bpp = DM320_OSD0_BPP;
pinfo->fbmem = g_osd0base;
pinfo->fblen = DM320_OSD0_FBLEN;
pinfo->stride = DM320_OSD0_STRIDE;
pinfo->display = 2;
pinfo->bpp = DM320_OSD0_BPP;
return OK;
}
#endif
@ -1156,10 +1159,11 @@ static int dm320_getosd1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
}
#endif
pinfo->fbmem = g_osd1base;
pinfo->fblen = DM320_OSD1_FBLEN;
pinfo->stride = DM320_OSD1_STRIDE;
pinfo->bpp = DM320_OSD1_BPP;
pinfo->fbmem = g_osd1base;
pinfo->fblen = DM320_OSD1_FBLEN;
pinfo->stride = DM320_OSD1_STRIDE;
pinfo->display = 3;
pinfo->bpp = DM320_OSD1_BPP;
return OK;
}
#endif

1
arch/arm/src/lpc17xx/lpc17_lcd.c
View File

@ -153,6 +153,7 @@ static const struct fb_planeinfo_s g_planeinfo =
.fbmem = (FAR void *)CONFIG_LPC17_LCD_VRAMBASE,
.fblen = LPC17_FBSIZE,
.stride = LPC17_STRIDE,
.display = 0,
.bpp = LPC17_BPP,
};

9
arch/arm/src/sama5/sam_lcd.c
View File

@ -1122,10 +1122,11 @@ static int sam_base_getplaneinfo(struct fb_vtable_s *vtable, int planeno,
gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
if (vtable && planeno == 0 && pinfo)
{
pinfo->fbmem = (void *)LAYER_BASE.framebuffer;
pinfo->fblen = SAMA5_BASE_FBSIZE;
pinfo->stride = SAMA5_BASE_STRIDE,
pinfo->bpp = LAYER_BASE.bpp;
pinfo->fbmem = (void *)LAYER_BASE.framebuffer;
pinfo->fblen = SAMA5_BASE_FBSIZE;
pinfo->stride = SAMA5_BASE_STRIDE;
pinfo->display = 0;
pinfo->bpp = LAYER_BASE.bpp;
return OK;
}

17
arch/arm/src/stm32/stm32_dma2d.c
View File

@ -2047,17 +2047,18 @@ FAR struct dma2d_layer_s *up_dma2dcreatelayer(fb_coord_t width,
/* Initialize the videoinfo structure */
vinfo->fmt = fmt;
vinfo->xres = width;
vinfo->yres = height;
vinfo->nplanes = 1;
vinfo->fmt = fmt;
vinfo->xres = width;
vinfo->yres = height;
vinfo->nplanes = 1;
/* Initialize the planeinfo structure */
pinfo->fbmem = fbmem;
pinfo->fblen = fblen;
pinfo->stride = stride;
pinfo->bpp = bpp;
pinfo->fbmem = fbmem;
pinfo->fblen = fblen;
pinfo->stride = stride;
pinfo->display = 0;
pinfo->bpp = bpp;
/* Bind the layer to the identifier */

2
arch/arm/src/stm32/stm32_ltdc.c
View File

@ -735,6 +735,7 @@ static struct stm32_ltdcdev_s g_ltdc =
.fbmem = (uint8_t *)STM32_LTDC_BUFFER_L1,
.fblen = STM32_L1_FBSIZE,
.stride = STM32_L1_STRIDE,
.display = 0,
.bpp = STM32_LTDC_L1_BPP
},
.vinfo =
@ -761,6 +762,7 @@ static struct stm32_ltdcdev_s g_ltdc =
.fbmem = (uint8_t *)STM32_LTDC_BUFFER_L2,
.fblen = STM32_L2_FBSIZE,
.stride = STM32_L2_STRIDE,
.display = 1,
.bpp = STM32_LTDC_L2_BPP
},
.vinfo =

17
arch/sim/src/board_lcd.c
View File

@ -196,20 +196,21 @@ static uint8_t g_runbuffer[FB_STRIDE];
static const struct fb_videoinfo_s g_videoinfo =
{
.fmt = FB_FMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
.xres = CONFIG_SIM_FBWIDTH, /* Horizontal resolution in pixel columns */
.yres = CONFIG_SIM_FBHEIGHT, /* Vertical resolution in pixel rows */
.nplanes = 1, /* Number of color planes supported */
.fmt = FB_FMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
.xres = CONFIG_SIM_FBWIDTH, /* Horizontal resolution in pixel columns */
.yres = CONFIG_SIM_FBHEIGHT, /* Vertical resolution in pixel rows */
.nplanes = 1, /* Number of color planes supported */
};
/* This is the standard, NuttX Plane information object */
static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = sim_putrun, /* Put a run into LCD memory */
.getrun = sim_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = CONFIG_SIM_FBBPP, /* Bits-per-pixel */
.putrun = sim_putrun, /* Put a run into LCD memory */
.getrun = sim_getrun, /* Get a run from LCD memory */
.buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.display = 0, /* Display number */
.bpp = CONFIG_SIM_FBBPP, /* Bits-per-pixel */
};
/* This is the standard, NuttX LCD driver object */

1
arch/sim/src/up_framebuffer.c
View File

@ -137,6 +137,7 @@ static const struct fb_planeinfo_s g_planeinfo =
.fbmem = (FAR void *)&g_fb,
.fblen = FB_SIZE,
.stride = FB_WIDTH,
.display = 0,
.bpp = CONFIG_SIM_FBBPP,
};
#else

9
arch/x86/src/qemu/qemu_vga.c
View File

@ -368,10 +368,11 @@ static int vga_getvideoinfo(FAR struct lcd_dev_s *dev,
static int vga_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
FAR struct lcd_planeinfo_s *pinfo)
{
pinfo->putrun = vga_putrun; /* Put a run into LCD memory */
pinfo->getrun = vga_getrun; /* Get a run from LCD memory */
pinfo->buffer = g_runbuffer; /* Run scratch buffer */
pinfo->bpp = VGA_BPP; /* Bits-per-pixel */
pinfo->putrun = vga_putrun; /* Put a run into LCD memory */
pinfo->getrun = vga_getrun; /* Get a run from LCD memory */
pinfo->buffer = g_runbuffer; /* Run scratch buffer */
pinfo->display = 0;
pinfo->bpp = VGA_BPP; /* Bits-per-pixel */
return OK;
}

9
configs/compal_e99/src/ssd1783.c
View File

@ -148,7 +148,8 @@ static uint16_t g_runbuffer[LCD_XRES];
/* This structure describes the overall LCD video controller */
static const struct fb_videoinfo_s g_videoinfo =
{ .fmt = LCD_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
{
.fmt = LCD_COLORFMT, /* Color format: RGB16-565: RRRR RGGG GGGB BBBB */
.xres = LCD_XRES, /* Horizontal resolution in pixel columns */
.yres = LCD_YRES, /* Vertical resolutiSend a command list to the LCD panelon in pixel rows */
.nplanes = 1, /* Number of color planes supported */
@ -157,7 +158,8 @@ static const struct fb_videoinfo_s g_videoinfo =
/* This is the standard, NuttX Plane information object */
static const struct lcd_planeinfo_s g_planeinfo =
{ .putrun = lcd_putrun, /* Put a run into LCD memory */
{
.putrun = lcd_putrun, /* Put a run into LCD memory */
// .getrun = lcd_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*) g_runbuffer, /* Run scratch buffer */
.bpp = LCD_BPP, /* Bits-per-pixel */
@ -166,7 +168,8 @@ static const struct lcd_planeinfo_s g_planeinfo =
/* This is the standard, NuttX LCD driver object */
static struct ssd1783_dev_s g_lcddev =
{ .dev =
{
.dev =
{
/* LCD Configuration */

36
drivers/mtd/Kconfig
View File

@ -266,7 +266,7 @@ config RAMMTD_FLASHSIM
RAMMTD_FLASHSIM will add some extra logic to improve the level of
FLASH simulation.
endif
endif # RAMMTD
config FILEMTD
bool "File-based MTD driver"
@ -288,7 +288,7 @@ config FILEMTD_ERASESTATE
hex "Simulated erase state"
default 0xff
endif
endif # FILEMTD
config MTD_AT24XX
bool "I2C-based AT24xx eeprom"
@ -353,11 +353,11 @@ config AT24XX_FREQUENCY
int "AT24xx I2C bus frequency"
default 100000
---help---
Set the I2C frequency to use when accessing the AT24CXX EEPROM. This value
must represent a valid I2C speed (normally less than 400.000) or the driver
might fail.
Set the I2C frequency to use when accessing the AT24CXX EEPROM. This value
must represent a valid I2C speed (normally less than 400.000) or the driver
might fail.
endif
endif # MTD_AT24XX
config MTD_AT25
bool "SPI-based AT25 FLASH"
@ -374,7 +374,7 @@ config AT25_SPIFREQUENCY
int "AT25 SPI Frequency"
default 20000000
endif
endif # MTD_AT25
config MTD_AT45DB
bool "SPI-based AT45DB flash"
@ -395,7 +395,7 @@ config AT45DB_PWRSAVE
bool "Enable power save"
default n
endif
endif # MTD_AT45DB
config MTD_M25P
bool "SPI-based M25P FLASH"
@ -437,7 +437,7 @@ config M25P_SUBSECTOR_ERASE
size (4K vs 64K). This option enables support for sub-sector erase.
The SMART file system can take advantage of this option if it is enabled.
endif
endif # MTD_M25P
config MTD_S25FL1
bool "QuadSPI-based S25FL1 FLASH"
@ -489,7 +489,7 @@ config S25FL1_SCRAMBLE_KEY
default 0x0baddead
depends on S25FL1_SCRAMBLE
endif
endif # MTD_S25FL1
config MTD_N25QXXX
bool "QuadSPI-based Micron N25QXXX family FLASH"
@ -519,7 +519,7 @@ config N25QXXX_SECTOR512
bool "Simulate 512 byte Erase Blocks"
default n
endif
endif # MTD_N25QXXX
config MTD_SMART
bool "Sector Mapped Allocation for Really Tiny (SMART) Flash support"
@ -583,7 +583,7 @@ config MTD_SMART_CONVERT_WEAR_FORMAT
CRC versions use a different header format and require a mksmartfs on the
device even if an existing format is there.
endif
endif # MTD_SMART_WEAR_LEVEL && !SMART_CRC_16
config MTD_SMART_ENABLE_CRC
bool "Enable Sector CRC error detection"
@ -618,7 +618,7 @@ config SMART_CRC_8
config SMART_CRC_16
bool "CRC-16"
endchoice
endchoice # CRC level selection
config MTD_SMART_MINIMIZE_RAM
bool "Minimize SMART RAM usage using logical sector cache"
@ -706,7 +706,7 @@ config RAMTRON_SETSPEED
Select an option to provide an ioctl, MTDIOC_SETSPEED call that
supports dynamic selection of the RAMTRON bus speed.
endif
endif # MTD_RAMTRON
config MTD_SST25
bool "SPI-based SST25 FLASH"
@ -745,7 +745,7 @@ config SST25_SLOWREAD
bool
default n
endif
endif # MTD_SST25
config MTD_SST25XX
bool "SPI-based SST25XX FLASH (64-MBit and larger)"
@ -781,7 +781,7 @@ config SST25XX_MEMORY_TYPE
The memory type for SST25VF065 series is 0x25, but this can be modified if needed
to support compatible devices from different manufacturers.
endif
endif # MTD_SST25XX
config MTD_SST39FV
bool "SST39FV NOR FLASH"
@ -800,7 +800,7 @@ config SST39VF_BASE_ADDRESS
---help---
This is the address where the SST29VF FLASH can be found in memory.
endif
endif # MTD_SST39FV
config MTD_W25
bool "SPI-based W25 FLASH"
@ -829,4 +829,4 @@ config W25_SLOWREAD
bool
default n
endif
endif # MTD_W25

2
drivers/mtd/Make.defs
View File

@ -3,7 +3,7 @@
# These driver supports various Memory Technology Devices (MTD) using the
# NuttX MTD interface.
#
# Copyright (C) 2009-2013, 2015 Gregory Nutt. All rights reserved.
# Copyright (C) 2009-2013, 2015-2016 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# Redistribution and use in source and binary forms, with or without

98
drivers/mtd/n25qxxx.c
View File

@ -2,7 +2,7 @@
* drivers/mtd/n25qxxx.c
* Driver for QuadSPI-based N25QxxxA
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: dev@ziggurat29.com
*
* Redistribution and use in source and binary forms, with or without
@ -59,6 +59,7 @@
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* Configuration ********************************************************************/
/* QuadSPI Mode. Per data sheet, either Mode 0 or Mode 3 may be used. */
@ -66,23 +67,22 @@
# define CONFIG_N25QXXX_QSPIMODE QSPIDEV_MODE0
#endif
/* QuadSPI Frequency per data sheet::
*
/* QuadSPI Frequency per data sheet:
*
* In this implementation, only "Quad" reads are performed.
*/
#ifndef CONFIG_N25QXXX_QSPI_FREQUENCY
/* if you haven't specified frequency, default to 40 MHz which will work with all
commands.
/* If you haven't specified frequency, default to 40 MHz which will work with all
* commands.
*/
# define CONFIG_N25QXXX_QSPI_FREQUENCY 40000000
#endif
#ifndef CONFIG_N25QXXX_DUMMIES
/* if you haven't specified the number of dummy cycles for quad reads, provide a
reasonable default. The actual number of dummies needed is clock and IO command
dependent.
/* If you haven't specified the number of dummy cycles for quad reads, provide a
* reasonable default. The actual number of dummies needed is clock and IO command
* dependent.
*/
# define CONFIG_N25QXXX_DUMMIES 6
#endif
@ -175,10 +175,11 @@
/* Chip Geometries ******************************************************************/
/* All members of the family support uniform 4K-byte 'sub sectors'; they also support
64k (and sometimes 32k) 'sectors' proper, but we won't be using those here.
* 64k (and sometimes 32k) 'sectors' proper, but we won't be using those here.
*/
/* N25Q016 (2 MB) memory capacity */
#define N25Q016_SECTOR_SIZE (4*1024)
#define N25Q016_SECTOR_SHIFT (12)
#define N25Q016_SECTOR_COUNT (512)
@ -186,6 +187,7 @@
#define N25Q016_PAGE_SHIFT (8)
/* N25Q032 (4 MB) memory capacity */
#define N25Q032_SECTOR_SIZE (4*1024)
#define N25Q032_SECTOR_SHIFT (12)
#define N25Q032_SECTOR_COUNT (1024)
@ -193,6 +195,7 @@
#define N25Q032_PAGE_SHIFT (8)
/* N25Q064 (8 MB) memory capacity */
#define N25Q064_SECTOR_SIZE (4*1024)
#define N25Q064_SECTOR_SHIFT (12)
#define N25Q064_SECTOR_COUNT (2048)
@ -200,6 +203,7 @@
#define N25Q064_PAGE_SHIFT (8)
/* N25Q128 (16 MB) memory capacity */
#define N25Q128_SECTOR_SIZE (4*1024)
#define N25Q128_SECTOR_SHIFT (12)
#define N25Q128_SECTOR_COUNT (4096)
@ -207,6 +211,7 @@
#define N25Q128_PAGE_SHIFT (8)
/* N25Q256 (32 MB) memory capacity */
#define N25Q256_SECTOR_SIZE (4*1024)
#define N25Q256_SECTOR_SHIFT (12)
#define N25Q256_SECTOR_COUNT (8196)
@ -214,6 +219,7 @@
#define N25Q256_PAGE_SHIFT (8)
/* N25Q512 (64 MB) memory capacity */
#define N25Q512_SECTOR_SIZE (4*1024)
#define N25Q512_SECTOR_SHIFT (12)
#define N25Q512_SECTOR_COUNT (16384)
@ -221,6 +227,7 @@
#define N25Q512_PAGE_SHIFT (8)
/* N25Q00 (128 MB) memory capacity */
#define N25Q00_SECTOR_SIZE (4*1024)
#define N25Q00_SECTOR_SHIFT (12)
#define N25Q00_SECTOR_COUNT (32768)
@ -233,17 +240,17 @@
#define N25QXXX_CACHE_DIRTY (1 << 1) /* 1=Cache is dirty */
#define N25QXXX_CACHE_ERASED (1 << 2) /* 1=Backing FLASH is erased */
#define IS_VALID(p) ((((p)->flags) & N25QXXX_CACHE_VALID) != 0)
#define IS_DIRTY(p) ((((p)->flags) & N25QXXX_CACHE_DIRTY) != 0)
#define IS_ERASED(p) ((((p)->flags) & N25QXXX_CACHE_DIRTY) != 0)
#define IS_VALID(p) ((((p)->flags) & N25QXXX_CACHE_VALID) != 0)
#define IS_DIRTY(p) ((((p)->flags) & N25QXXX_CACHE_DIRTY) != 0)
#define IS_ERASED(p) ((((p)->flags) & N25QXXX_CACHE_DIRTY) != 0)
#define SET_VALID(p) do { (p)->flags |= N25QXXX_CACHE_VALID; } while (0)
#define SET_DIRTY(p) do { (p)->flags |= N25QXXX_CACHE_DIRTY; } while (0)
#define SET_ERASED(p) do { (p)->flags |= N25QXXX_CACHE_DIRTY; } while (0)
#define SET_VALID(p) do { (p)->flags |= N25QXXX_CACHE_VALID; } while (0)
#define SET_DIRTY(p) do { (p)->flags |= N25QXXX_CACHE_DIRTY; } while (0)
#define SET_ERASED(p) do { (p)->flags |= N25QXXX_CACHE_DIRTY; } while (0)
#define CLR_VALID(p) do { (p)->flags &= ~N25QXXX_CACHE_VALID; } while (0)
#define CLR_DIRTY(p) do { (p)->flags &= ~N25QXXX_CACHE_DIRTY; } while (0)
#define CLR_ERASED(p) do { (p)->flags &= ~N25QXXX_CACHE_DIRTY; } while (0)
#define CLR_VALID(p) do { (p)->flags &= ~N25QXXX_CACHE_VALID; } while (0)
#define CLR_DIRTY(p) do { (p)->flags &= ~N25QXXX_CACHE_DIRTY; } while (0)
#define CLR_ERASED(p) do { (p)->flags &= ~N25QXXX_CACHE_DIRTY; } while (0)
/* 512 byte sector support **********************************************************/
@ -335,10 +342,6 @@ static ssize_t n25qxxx_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
FAR uint8_t *buffer);
static int n25qxxx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg);
/************************************************************************************
* Private Data
************************************************************************************/
/************************************************************************************
* Private Functions
************************************************************************************/
@ -354,15 +357,16 @@ static void n25qxxx_lock(FAR struct qspi_dev_s *qspi)
* transfers. The bus should be locked before the chip is selected.
*
* This is a blocking call and will not return until we have exclusive access to
* the QuadSPI buss. We will retain that exclusive access until the bus is unlocked.
* the QuadSPI buss. We will retain that exclusive access until the bus is
* unlocked.
*/
(void)QSPI_LOCK(qspi, true);
/* After locking the QuadSPI bus, the we also need call the setfrequency, setbits, and
* setmode methods to make sure that the QuadSPI is properly configured for the device.
* If the QuadSPI buss is being shared, then it may have been left in an incompatible
* state.
/* After locking the QuadSPI bus, the we also need call the setfrequency, setbits,
* and setmode methods to make sure that the QuadSPI is properly configured for
* the device. If the QuadSPI buss is being shared, then it may have been left in
* an incompatible state.
*/
QSPI_SETMODE(qspi, CONFIG_N25QXXX_QSPIMODE);
@ -480,11 +484,11 @@ static uint8_t n25qxxx_read_status(FAR struct n25qxxx_dev_s *priv)
static void n25qxxx_write_status(FAR struct n25qxxx_dev_s *priv)
{
n25qxxx_write_enable(priv);
/* take care to mask of the SRP bit; it is one-time-programmable */
priv->cmdbuf[0] &= ~STATUS_SRP0_MASK;
n25qxxx_command_write(priv->qspi, N25QXXX_WRITE_STATUS,
(FAR const void *)priv->cmdbuf, 1);
n25qxxx_write_disable(priv);
@ -584,31 +588,37 @@ static inline int n25qxxx_readid(struct n25qxxx_dev_s *priv)
priv->pageshift = N25Q016_PAGE_SHIFT;
priv->nsectors = N25Q016_SECTOR_COUNT;
break;
case N25Q032_JEDEC_CAPACITY:
priv->sectorshift = N25Q032_SECTOR_SHIFT;
priv->pageshift = N25Q032_PAGE_SHIFT;
priv->nsectors = N25Q032_SECTOR_COUNT;
break;
case N25Q064_JEDEC_CAPACITY:
priv->sectorshift = N25Q064_SECTOR_SHIFT;
priv->pageshift = N25Q064_PAGE_SHIFT;
priv->nsectors = N25Q064_SECTOR_COUNT;
break;
case N25Q128_JEDEC_CAPACITY:
priv->sectorshift = N25Q128_SECTOR_SHIFT;
priv->pageshift = N25Q128_PAGE_SHIFT;
priv->nsectors = N25Q128_SECTOR_COUNT;
break;
case N25Q256_JEDEC_CAPACITY:
priv->sectorshift = N25Q256_SECTOR_SHIFT;
priv->pageshift = N25Q256_PAGE_SHIFT;
priv->nsectors = N25Q256_SECTOR_COUNT;
break;
case N25Q512_JEDEC_CAPACITY:
priv->sectorshift = N25Q512_SECTOR_SHIFT;
priv->pageshift = N25Q512_PAGE_SHIFT;
priv->nsectors = N25Q512_SECTOR_COUNT;
break;
case N25Q00_JEDEC_CAPACITY:
priv->sectorshift = N25Q00_SECTOR_SHIFT;
priv->pageshift = N25Q00_PAGE_SHIFT;
@ -658,13 +668,14 @@ static int n25qxxx_protect(FAR struct n25qxxx_dev_s *priv,
* necessary to protect the range of sectors.
*/
priv->cmdbuf[0] |= (STATUS_BP3_MASK|STATUS_BP_MASK);
priv->cmdbuf[0] |= (STATUS_BP3_MASK | STATUS_BP_MASK);
n25qxxx_write_status(priv);
/* Check the new status */
priv->cmdbuf[0] = n25qxxx_read_status(priv);
if ((priv->cmdbuf[0] & (STATUS_BP3_MASK|STATUS_BP_MASK)) != (STATUS_BP3_MASK|STATUS_BP_MASK))
if ((priv->cmdbuf[0] & (STATUS_BP3_MASK | STATUS_BP_MASK)) !=
(STATUS_BP3_MASK | STATUS_BP_MASK))
{
return -EACCES;
}
@ -695,8 +706,9 @@ static int n25qxxx_unprotect(FAR struct n25qxxx_dev_s *priv,
if ((priv->cmdbuf[0] & STATUS_SRP0_MASK) == STATUS_SRP0_LOCKED)
{
/* the SRP bit is one time programmable; if it's set, there's nothing that
you can do to unset it.
* you can do to unset it.
*/
return -EACCES;
}
@ -715,7 +727,7 @@ static int n25qxxx_unprotect(FAR struct n25qxxx_dev_s *priv,
{
return -EACCES;
}
return OK;
}
@ -738,11 +750,11 @@ static bool n25qxxx_isprotected(FAR struct n25qxxx_dev_s *priv, uint8_t status,
{
bp |= 8;
}
/* the BP field is essentially the power-of-two of the number of 64k sectors,
saturated to the device size.
* saturated to the device size.
*/
if ( 0 == bp )
{
return false;
@ -1215,8 +1227,6 @@ static ssize_t n25qxxx_bread(FAR struct mtd_dev_s *dev, off_t startblock,
#endif
return nbytes;
return 0;
}
/************************************************************************************
@ -1254,8 +1264,6 @@ static ssize_t n25qxxx_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
n25qxxx_unlock(priv->qspi);
return ret < 0 ? ret : nblocks;
return 0;
}
/************************************************************************************
@ -1284,8 +1292,6 @@ static ssize_t n25qxxx_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbyt
fvdbg("return nbytes: %d\n", (int)nbytes);
return (ssize_t)nbytes;
return 0;
}
/************************************************************************************
@ -1448,8 +1454,10 @@ FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi, bool unpro
goto errout_with_readbuf;
}
/* specify the number of dummy cycles via the 'volatile configuration register' */
/* Specify the number of dummy cycles via the 'volatile configuration
* register'
*/
priv->cmdbuf[0] = n25qxxx_read_volcfg(priv);
priv->cmdbuf[0] &= 0x0f;
priv->cmdbuf[0] |= (CONFIG_N25QXXX_DUMMIES<<4);

24
graphics/Kconfig
View File

@ -56,6 +56,30 @@ config NX_WRITEONLY
Automatically defined if NX_LCDDRIVER and LCD_NOGETRUN are
defined.
config NX_UPDATE
bool "Display update hooks"
default n
---help---
Enable a callout to inform some external module that the display has
been updated. This would be useful in a couple for cases.
- When a serial LCD is used, but a framebuffer is used to access the
LCD. In this case, the update callout can be used to refresh the
affected region of the display.
- When VNC is enabled. This is case, this callout is necessary to
update the remote frame buffer to match the local framebuffer.
When this feature is enabled, some external logic must provide this
interface:
void nx_notify_rectangle(FAR NX_PLANEINFOTYPE *pinfo,
FAR const struct nxgl_rect_s *rect);
That is the function that will handle the notification. It
receives the rectangular region that was updated in the provided
plane.
menu "Supported Pixel Depths"
config NX_DISABLE_1BPP

17
graphics/nxbe/nxbe_bitmap.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* graphics/nxbe/nxbe_bitmap.c
*
* Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -75,8 +75,17 @@ static void nxs_clipcopy(FAR struct nxbe_clipops_s *cops,
FAR const struct nxgl_rect_s *rect)
{
struct nx_bitmap_s *bminfo = (struct nx_bitmap_s *)cops;
/* Copy the rectangular region */
plane->copyrectangle(&plane->pinfo, rect, bminfo->src,
&bminfo->origin, bminfo->stride);
#ifdef CONFIG_NX_UPDATE
/* Notify external logic that the display has been updated */
nx_notify_rectangle(&plane->pinfo, rect);
#endif
}
/****************************************************************************
@ -106,8 +115,8 @@ static void nxs_clipcopy(FAR struct nxbe_clipops_s *cops,
****************************************************************************/
void nxbe_bitmap(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s *dest,
FAR const void *src[CONFIG_NX_NPLANES],
FAR const struct nxgl_point_s *origin, unsigned int stride)
FAR const void *src[CONFIG_NX_NPLANES],
FAR const struct nxgl_point_s *origin, unsigned int stride)
{
struct nx_bitmap_s info;
struct nxgl_rect_s bounds;
@ -153,6 +162,7 @@ void nxbe_bitmap(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s *de
nxgl_rectintersect(&remaining, &bounds, &wnd->bounds);
nxgl_rectintersect(&remaining, &remaining, &wnd->be->bkgd.bounds);
if (nxgl_nullrect(&remaining))
{
return;
@ -177,4 +187,3 @@ void nxbe_bitmap(FAR struct nxbe_window_s *wnd, FAR const struct nxgl_rect_s *de
&info.cops, &wnd->be->plane[i]);
}
}

12
graphics/nxbe/nxbe_fill.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* graphics/nxbe/nxbe_fill.c
*
* Copyright (C) 2008-2009, 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -40,6 +40,7 @@
#include <nuttx/config.h>
#include <nuttx/nx/nxglib.h>
#include <nuttx/nx/nx.h>
#include "nxbe.h"
@ -71,7 +72,16 @@ static void nxbe_clipfill(FAR struct nxbe_clipops_s *cops,
FAR const struct nxgl_rect_s *rect)
{
struct nxbe_fill_s *fillinfo = (struct nxbe_fill_s *)cops;
/* Draw the rectangle */
plane->fillrectangle(&plane->pinfo, rect, fillinfo->color);
#ifdef CONFIG_NX_UPDATE
/* Notify external logic that the display has been updated */
nx_notify_rectangle(&plane->pinfo, rect);
#endif
}
/****************************************************************************

33
graphics/nxbe/nxbe_filltrapezoid.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* graphics/nxbe/nxbe_filltrapezoid.c
*
* Copyright (C) 2008-2009, 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -44,6 +44,18 @@
#include "nxbe.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef MIN
# define MIN(a,b) (((a) < (b)) ? (a) : (b))
#endif
#ifndef MAX
# define MAX(a,b) (((a) > (b)) ? (a) : (b))
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@ -73,7 +85,26 @@ static void nxbe_clipfilltrapezoid(FAR struct nxbe_clipops_s *cops,
FAR const struct nxgl_rect_s *rect)
{
struct nxbe_filltrap_s *fillinfo = (struct nxbe_filltrap_s *)cops;
#ifdef CONFIG_NX_UPDATE
struct nxgl_rect_s update;
#endif
/* Draw the trapezond */
plane->filltrapezoid(&plane->pinfo, &fillinfo->trap, rect, fillinfo->color);
#ifdef CONFIG_NX_UPDATE
/* Notify external logic that the display has been updated */
update.pt1.x = MIN(MAX(fillinfo->trap.top.x1, rect->pt1.x),
MAX(fillinfo->trap.bot.x1, rect->pt1.x));
update.pt1.y = MAX(fillinfo->trap.top.y, rect->pt1.y);
update.pt2.x = MAX(MIN(fillinfo->trap.top.x2, rect->pt2.x),
MIN(fillinfo->trap.bot.x2, rect->pt2.x));
update.pt2.y = MIN(fillinfo->trap.bot.y, rect->pt2.y);
nx_notify_rectangle(&plane->pinfo, &update);
#endif
}
/****************************************************************************

18
graphics/nxbe/nxbe_move.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* graphics/nxbe/nxbe_move.c
*
* Copyright (C) 2008-2009, 2011-2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2009, 2011-2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -78,6 +78,9 @@ static void nxbe_clipmovesrc(FAR struct nxbe_clipops_s *cops,
{
struct nxbe_move_s *info = (struct nxbe_move_s *)cops;
struct nxgl_point_s offset;
#ifdef CONFIG_NX_UPDATE
struct nxgl_rect_s update;
#endif
if (info->offset.x != 0 || info->offset.y != 0)
{
@ -86,7 +89,20 @@ static void nxbe_clipmovesrc(FAR struct nxbe_clipops_s *cops,
offset.x = rect->pt1.x + info->offset.x;
offset.y = rect->pt1.y + info->offset.y;
/* Move the source rectangle to the destination position */
plane->moverectangle(&plane->pinfo, rect, &offset);
#ifdef CONFIG_NX_UPDATE
/* Notify external logic that the display has been updated */
update.pt1.x = offset.x;
update.pt1.y = offset.y;
update.pt2.x = rect->pt2.x + info->offset.x;
update.pt2.y = rect->pt2.y + info->offset.y;
nx_notify_rectangle(&plane->pinfo, &update);
#endif
}
}

18
graphics/nxbe/nxbe_setpixel.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* graphics/nxbe/nxbe_setpixel.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -40,6 +40,7 @@
#include <nuttx/config.h>
#include <nuttx/nx/nxglib.h>
#include <nuttx/nx/nx.h>
#include "nxbe.h"
@ -71,7 +72,16 @@ static void nxbe_clipfill(FAR struct nxbe_clipops_s *cops,
FAR const struct nxgl_rect_s *rect)
{
struct nxbe_setpixel_s *fillinfo = (struct nxbe_setpixel_s *)cops;
/* Set the pixel */
plane->setpixel(&plane->pinfo, &rect->pt1, fillinfo->color);
#ifdef CONFIG_NX_UPDATE
/* Notify external logic that the display has been updated */
nx_notify_rectangle(&plane->pinfo, rect);
#endif
}
/****************************************************************************
@ -79,7 +89,7 @@ static void nxbe_clipfill(FAR struct nxbe_clipops_s *cops,
****************************************************************************/
/****************************************************************************
* Name: nxbe_fill
* Name: nxbe_setpixel
*
* Description:
* Fill the specified rectangle in the window with the specified color
@ -95,8 +105,8 @@ static void nxbe_clipfill(FAR struct nxbe_clipops_s *cops,
****************************************************************************/
void nxbe_setpixel(FAR struct nxbe_window_s *wnd,
FAR const struct nxgl_point_s *pos,
nxgl_mxpixel_t color[CONFIG_NX_NPLANES])
FAR const struct nxgl_point_s *pos,
nxgl_mxpixel_t color[CONFIG_NX_NPLANES])
{
struct nxbe_setpixel_s info;
struct nxgl_rect_s rect;

2
include/nuttx/mtd/mtd.h
View File

@ -524,7 +524,7 @@ FAR struct mtd_dev_s *s25fl1_initialize(FAR struct qspi_dev_s *qspi,
struct qspi_dev_s; /* Forward reference */
FAR struct mtd_dev_s *n25qxxx_initialize(FAR struct qspi_dev_s *qspi,
bool unprotect);
bool unprotect);
/****************************************************************************
* Name: up_flashinitialize

26
include/nuttx/nx/nx.h
View File

@ -901,6 +901,32 @@ int nx_bitmap(NXWINDOW hwnd, FAR const struct nxgl_rect_s *dest,
FAR const void *src[CONFIG_NX_NPLANES],
FAR const struct nxgl_point_s *origin, unsigned int stride);
/****************************************************************************
* Name: nx_notify_rectangle
*
* Description:
* When CONFIG_NX_UPDATE=y, then the graphics system will callout to
* inform some external module that the display has been updated. This
* would be useful in a couple for cases.
*
* - When a serial LCD is used, but a framebuffer is used to access the
* LCD. In this case, the update callout can be used to refresh the
* affected region of the display.
*
* - When VNC is enabled. This is case, this callout is necessary to
* update the remote frame buffer to match the local framebuffer.
*
* When this feature is enabled, some external logic must provide this
* interface. This is the function that will handle the notification. It
* receives the rectangular region that was updated on the provided plane.
*
****************************************************************************/
#ifdef CONFIG_NX_UPDATE
void nx_notify_rectangle(FAR NX_PLANEINFOTYPE *pinfo,
FAR const struct nxgl_rect_s *rect);
#endif
/****************************************************************************
* Name: nx_kbdin
*

1
include/nuttx/video/fb.h
View File

@ -218,6 +218,7 @@ struct fb_planeinfo_s
FAR void *fbmem; /* Start of frame buffer memory */
uint32_t fblen; /* Length of frame buffer memory in bytes */
fb_coord_t stride; /* Length of a line in bytes */
uint8_t display; /* Display number */
uint8_t bpp; /* Bits per pixel */
};

18
include/nuttx/video/rfb.h
View File

@ -251,7 +251,7 @@ struct rfb_clientinit_s
/* 6.3.2 ServerInit
*
* "After receiving the ClientInit message, the server sends a ServerInit
* message. This tells the client the width and height of the server’s
* message. This tells the client the width and height of the server’s
* framebuffer, its pixel format and the name associated with the desktop:
*/
@ -512,7 +512,7 @@ struct rfb_clientcuttext_s
{
uint8_t msgtype; /* U8 Message type */
uint8_t padding[3];
uint8_t length[2]; /* U8 Length */
uint8_t length[4]; /* U32 Length */
uint8_t text[1]; /* U8 Text, actual length is Length */
};
@ -547,7 +547,7 @@ struct rfb_rectangle_s
uint8_t data[1]; /* Pixel data, actual size varies */
};
#define SIZEOF_RFB_RECTANGES(n,d) \
#define SIZEOF_RFB_RECTANGES(d) \
(sizeof(struct rfb_framebufferupdate_s) + (d) - 1)
struct rfb_framebufferupdate_s
@ -558,8 +558,8 @@ struct rfb_framebufferupdate_s
struct rfb_rectangle_s rect[1]; /* Actual number is nrect */
};
#define SIZEOF_RFB_FRAMEBUFFERUPDATE_S(n,r) \
(sizeof(struct rfb_framebufferupdate_s) + (r) - sizeof(rfb_rectangle_s))
#define SIZEOF_RFB_FRAMEBUFFERUPDATE_S(r) \
(sizeof(struct rfb_framebufferupdate_s) + (r) - sizeof(struct rfb_rectangle_s))
/* 6.5.2 SetColourMapEntries
*
@ -612,7 +612,7 @@ struct rfb_servercuttext_s
{
uint8_t msgtype; /* U8 Message type */
uint8_t padding[3];
uint8_t length[2]; /* U8 Length */
uint8_t length[4]; /* U32 Length */
uint8_t text[1]; /* U8 Text, actual length is Length */
};
@ -853,7 +853,7 @@ struct rfb_subrect_s
struct rfb_srle_s
{
uint8_t length[4]; /* U32 Length */
uint8_t data[1]; /* U8 zlibData, actual size is length */
uint8_t data[1]; /* U8 zlibData, actual size is length */
};
#define SIZEOF_RFB_SRLE_S(n,r) \
@ -880,7 +880,7 @@ struct rfb_srle_s
* bottom seven bits indicate the size of the palette used - zero means no
* palette, one means that the tile is of a single colour, 2 to 127
* indicate a palette of that size. The possible values of subencoding are:"
*/
*/
#define RFB_SUBENCODING_RAW 0 /* Raw pixel data */
#define RFB_SUBENCODING_SOLID 1 /* A solid tile of a single color */
@ -1010,7 +1010,7 @@ struct rfb_palettendx_s
* byte the most significant bit represents the leftmost pixel, with a
* 1-bit meaning the corresponding pixel in the cursor is valid."
*
* REVISIT: Also difficult to represent: A variable length pixel arry
* REVISIT: Also difficult to represent: A variable length pixel array
* followed by a variable length bit mask.
*/