diff --git a/ChangeLog b/ChangeLog
index 51acad5a40..916c9a6c26 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -2237,4 +2237,6 @@
 	* arch/arm/src/stm32: Fixes to several STM32F40xxx files (contributed by
 	  Mikhail Bychek).
 	* configs/stm3210e-eval/src/up_lcd.c:  Fix banding problem on the R61580
-	  LCD
\ No newline at end of file
+	  LCD
+	* configs/stm3240g-eval/ostest:  The basic STM32F40xx bringup is functional
+	  (11/12/06) and passes the OS test.
diff --git a/arch/arm/src/stm32/stm32_gpio.c b/arch/arm/src/stm32/stm32_gpio.c
index a22d208838..309df3520f 100644
--- a/arch/arm/src/stm32/stm32_gpio.c
+++ b/arch/arm/src/stm32/stm32_gpio.c
@@ -515,8 +515,8 @@ int stm32_configgpio(uint32_t cfgset)
     }
 
   regval  = getreg32(base + STM32_GPIO_OSPEED_OFFSET);
-  regval &= ~GPIO_OSPEED_MASK(pos);
-  regval |= (setting << GPIO_OSPEED_SHIFT(pos));
+  regval &= ~GPIO_OSPEED_MASK(pin);
+  regval |= (setting << GPIO_OSPEED_SHIFT(pin));
   putreg32(regval, base + STM32_GPIO_OSPEED_OFFSET);
 
   /* Set push-pull/open-drain (Only outputs and alternate function pins) */
diff --git a/configs/stm3240g-eval/include/board.h b/configs/stm3240g-eval/include/board.h
index b66997235e..8ed7663430 100755
--- a/configs/stm3240g-eval/include/board.h
+++ b/configs/stm3240g-eval/include/board.h
@@ -124,16 +124,16 @@
 #define STM32_HCLK_FREQUENCY    STM32_SYSCLK_FREQUENCY
 #define STM32_BOARD_HCLK        STM32_HCLK_FREQUENCY  /* same as above, to satisfy compiler */
 
-/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
-
-#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE1_HCLKd2 /* PCLK2 = HCLK / 2 */
-#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
-
 /* APB1 clock (PCLK1) is HCLK/4 (42MHz) */
 
-#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE2_HCLKd4 /* PCLK1 = HCLK / 4 */
+#define STM32_RCC_CFGR_PPRE1    RCC_CFGR_PPRE1_HCLKd4 /* PCLK1 = HCLK / 4 */
 #define STM32_PCLK1_FREQUENCY   (STM32_HCLK_FREQUENCY/4)
 
+/* APB2 clock (PCLK2) is HCLK/2 (84MHz) */
+
+#define STM32_RCC_CFGR_PPRE2    RCC_CFGR_PPRE2_HCLKd2 /* PCLK2 = HCLK / 2 */
+#define STM32_PCLK2_FREQUENCY   (STM32_HCLK_FREQUENCY/2)
+
 /* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
  * otherwise frequency is 2xAPBx. 
  * Note: TIM1,8 are on APB2, others on APB1