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l2cc: Do not repeat disabling the cache when the cache is already disabled

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When l2cc is already in disable state, performing a disable operation
again will flush incorrect cache data to memory

Signed-off-by: zhangyuan21 <zhangyuan21@xiaomi.com>
This commit is contained in:
zhangyuan21 2023-04-18 08:50:30 +08:00 committed by Xiang Xiao
parent 69fd539886
commit 6605f95133
2 changed files with 12 additions and 18 deletions
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15
arch/arm/src/armv7-a/arm_l2cc_pl310.c
View File

@ -437,6 +437,12 @@ void l2cc_enable(void)
/* Invalidate and enable the cache (must be disabled to do this!) */ /* Invalidate and enable the cache (must be disabled to do this!) */
flags = enter_critical_section(); flags = enter_critical_section();
if ((getreg32(L2CC_CR) & L2CC_CR_L2CEN) != 0)
{
l2cc_disable();
}
l2cc_invalidate_all(); l2cc_invalidate_all();
putreg32(L2CC_CR_L2CEN, L2CC_CR); putreg32(L2CC_CR_L2CEN, L2CC_CR);
ARM_DSB(); ARM_DSB();
@ -520,17 +526,11 @@ void l2cc_sync(void)
void l2cc_invalidate_all(void) void l2cc_invalidate_all(void)
{ {
irqstate_t flags; irqstate_t flags;
uint32_t regval;
/* Invalidate all ways */ /* Invalidate all ways */
flags = enter_critical_section(); flags = enter_critical_section();
/* Disable the L2 cache while we invalidate it */
regval = getreg32(L2CC_CR);
l2cc_disable();
/* Invalidate all ways by writing the bit mask of ways to be invalidated /* Invalidate all ways by writing the bit mask of ways to be invalidated
* the Invalidate Way Register (IWR). * the Invalidate Way Register (IWR).
*/ */
@ -547,9 +547,6 @@ void l2cc_invalidate_all(void)
putreg32(0, L2CC_CSR); putreg32(0, L2CC_CSR);
/* Then re-enable the L2 cache if it was enabled before */
putreg32(regval, L2CC_CR);
leave_critical_section(flags); leave_critical_section(flags);
} }

15
arch/arm/src/armv7-r/arm_l2cc_pl310.c
View File

@ -437,6 +437,12 @@ void l2cc_enable(void)
/* Invalidate and enable the cache (must be disabled to do this!) */ /* Invalidate and enable the cache (must be disabled to do this!) */
flags = enter_critical_section(); flags = enter_critical_section();
if ((getreg32(L2CC_CR) & L2CC_CR_L2CEN) != 0)
{
l2cc_disable();
}
l2cc_invalidate_all(); l2cc_invalidate_all();
putreg32(L2CC_CR_L2CEN, L2CC_CR); putreg32(L2CC_CR_L2CEN, L2CC_CR);
ARM_DSB(); ARM_DSB();
@ -520,17 +526,11 @@ void l2cc_sync(void)
void l2cc_invalidate_all(void) void l2cc_invalidate_all(void)
{ {
irqstate_t flags; irqstate_t flags;
uint32_t regval;
/* Invalidate all ways */ /* Invalidate all ways */
flags = enter_critical_section(); flags = enter_critical_section();
/* Disable the L2 cache while we invalidate it */
regval = getreg32(L2CC_CR);
l2cc_disable();
/* Invalidate all ways by writing the bit mask of ways to be invalidated /* Invalidate all ways by writing the bit mask of ways to be invalidated
* the Invalidate Way Register (IWR). * the Invalidate Way Register (IWR).
*/ */
@ -547,9 +547,6 @@ void l2cc_invalidate_all(void)
putreg32(0, L2CC_CSR); putreg32(0, L2CC_CSR);
/* Then re-enable the L2 cache if it was enabled before */
putreg32(regval, L2CC_CR);
leave_critical_section(flags); leave_critical_section(flags);
} }