Mea Culpa. Fix nxstyle problems from PR879

In a fit of confusion, I accidentally committed PR 879 before it passed its nxstyle check (it did pass all of its build tests, but not the style check).  It was really my intention to merge PR878, but I screwed that up and merged 879 instead.

This PR makes amends by passing all of the .c and .h files modified by PR879 through nxstyle and correcting all reported style problems.
This commit is contained in:
Gregory Nutt 2020-04-26 08:18:10 -06:00 committed by Alan Carvalho de Assis
parent d6f7821b15
commit 6766aa0ed5
15 changed files with 117 additions and 165 deletions

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@ -49,6 +49,7 @@
/**************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/* Configuration ************************************************************/ /* Configuration ************************************************************/
/* If this is a kernel build, how many nested system calls should we /* If this is a kernel build, how many nested system calls should we
@ -242,7 +243,6 @@ static inline void setbasepri(uint32_t basepri)
: "memory"); : "memory");
} }
# define raisebasepri(b) setbasepri(b); # define raisebasepri(b) setbasepri(b);
/* Disable IRQs */ /* Disable IRQs */

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@ -1,36 +1,20 @@
/**************************************************************************** /****************************************************************************
* arch/arm/include/irq.h * arch/arm/include/irq.h
* *
* Copyright (C) 2007-2009, 2011, 2015, 2019 Gregory Nutt. All rights * Licensed to the Apache Software Foundation (ASF) under one or more
* reserved. * contributor license agreements. See the NOTICE file distributed with
* Author: Gregory Nutt <gnutt@nuttx.org> * this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
* *
* Redistribution and use in source and binary forms, with or without * http://www.apache.org/licenses/LICENSE-2.0
* modification, are permitted provided that the following conditions
* are met:
* *
* 1. Redistributions of source code must retain the above copyright * Unless required by applicable law or agreed to in writing, software
* notice, this list of conditions and the following disclaimer. * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* 2. Redistributions in binary form must reproduce the above copyright * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* notice, this list of conditions and the following disclaimer in * License for the specific language governing permissions and limitations
* the documentation and/or other materials provided with the * under the License.
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************/ ****************************************************************************/

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@ -1,35 +1,20 @@
/**************************************************************************** /****************************************************************************
* arch/arm/include/syscall.h * arch/arm/include/syscall.h
* *
* Copyright (C) 2011, 2019 Gregory Nutt. All rights reserved. * Licensed to the Apache Software Foundation (ASF) under one or more
* Author: Gregory Nutt <gnutt@nuttx.org> * contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
* *
* Redistribution and use in source and binary forms, with or without * http://www.apache.org/licenses/LICENSE-2.0
* modification, are permitted provided that the following conditions
* are met:
* *
* 1. Redistributions of source code must retain the above copyright * Unless required by applicable law or agreed to in writing, software
* notice, this list of conditions and the following disclaimer. * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* 2. Redistributions in binary form must reproduce the above copyright * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* notice, this list of conditions and the following disclaimer in * License for the specific language governing permissions and limitations
* the documentation and/or other materials provided with the * under the License.
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************/ ****************************************************************************/

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@ -1,35 +1,20 @@
/**************************************************************************** /****************************************************************************
* arch/arm/include/types.h * arch/arm/include/types.h
* *
* Copyright (C) 2007-2009, 2016 Gregory Nutt. All rights reserved. * Licensed to the Apache Software Foundation (ASF) under one or more
* Author: Gregory Nutt <gnutt@nuttx.org> * contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
* *
* Redistribution and use in source and binary forms, with or without * http://www.apache.org/licenses/LICENSE-2.0
* modification, are permitted provided that the following conditions
* are met:
* *
* 1. Redistributions of source code must retain the above copyright * Unless required by applicable law or agreed to in writing, software
* notice, this list of conditions and the following disclaimer. * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* 2. Redistributions in binary form must reproduce the above copyright * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* notice, this list of conditions and the following disclaimer in * License for the specific language governing permissions and limitations
* the documentation and/or other materials provided with the * under the License.
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************/ ****************************************************************************/
@ -98,9 +83,9 @@ typedef signed int _ssize_t;
typedef unsigned int _size_t; typedef unsigned int _size_t;
#endif #endif
/* This is the size of the interrupt state save returned by up_irq_save(). For /* This is the size of the interrupt state save returned by up_irq_save().
* ARM, a 32 register value is returned, for the thumb2, Cortex-M3, the 16-bit * For ARM, a 32 register value is returned, for the thumb2, Cortex-M3, the
* primask register value is returned, * 16-bit primask register value is returned,
*/ */
#ifdef __thumb2__ #ifdef __thumb2__

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@ -1,4 +1,4 @@
/*************************************************************************************** /***********************************************************************************************
* arch/arm/src/armv8-m/dwt.h * arch/arm/src/armv8-m/dwt.h
* *
* Copyright (c) 2009 - 2013 ARM LIMITED * Copyright (c) 2009 - 2013 ARM LIMITED

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@ -68,6 +68,7 @@
/******************************************************************************************************************************* /*******************************************************************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
*******************************************************************************************************************************/ *******************************************************************************************************************************/
/* ETM Register Base Address ***************************************************************************************************/ /* ETM Register Base Address ***************************************************************************************************/
#define ETM_BASE (0xe0041000ul) #define ETM_BASE (0xe0041000ul)

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@ -21,17 +21,17 @@
#ifndef __ARCH_ARM_SRC_ARMV8-M_FPB_H #ifndef __ARCH_ARM_SRC_ARMV8-M_FPB_H
#define __ARCH_ARM_SRC_ARMV8-M_FPB_H #define __ARCH_ARM_SRC_ARMV8-M_FPB_H
/****************************************************************************** /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
******************************************************************************/ ****************************************************************************/
/* Flash Patch and Breakpoint Unit FPB ***************************************/ /* Flash Patch and Breakpoint Unit FPB **************************************/
/* FPB Register Base Address *************************************************/ /* FPB Register Base Address ************************************************/
#define FPB_BASE 0xe0002000 #define FPB_BASE 0xe0002000
/* FPB Register Offsets *******************************************************/ /* FPB Register Offsets *****************************************************/
#define FPB_CTRL_OFFSET 0x0000 /* Control */ #define FPB_CTRL_OFFSET 0x0000 /* Control */
#define FPB_REMAP_OFFSET 0x0004 /* Remap */ #define FPB_REMAP_OFFSET 0x0004 /* Remap */
@ -44,7 +44,7 @@
#define FPB_COMP6_OFFSET 0x0020 /* Comparator 6 */ #define FPB_COMP6_OFFSET 0x0020 /* Comparator 6 */
#define FPB_COMP7_OFFSET 0x0024 /* Comparator 7 */ #define FPB_COMP7_OFFSET 0x0024 /* Comparator 7 */
/* FPB Register Addresses *****************************************************/ /* FPB Register Addresses ***************************************************/
#define FPB_CTRL (FPB_BASE + FPB_CTRL_OFFSET) #define FPB_CTRL (FPB_BASE + FPB_CTRL_OFFSET)
#define FPB_REMAP (FPB_BASE + FPB_REMAP_OFFSET) #define FPB_REMAP (FPB_BASE + FPB_REMAP_OFFSET)
@ -57,7 +57,7 @@
#define FPB_COMP6 (FPB_BASE + FPB_COMP6_OFFSET) #define FPB_COMP6 (FPB_BASE + FPB_COMP6_OFFSET)
#define FPB_COMP7 (FPB_BASE + FPB_COMP7_OFFSET #define FPB_COMP7 (FPB_BASE + FPB_COMP7_OFFSET
/* FPB Register Bitfield Definitions ******************************************/ /* FPB Register Bitfield Definitions ****************************************/
/* FPB_CTRL */ /* FPB_CTRL */

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@ -74,6 +74,7 @@
***********************************************************************************************/ ***********************************************************************************************/
/* Instrumentation Trace Macrocell Register (ITM) Definitions **********************************/ /* Instrumentation Trace Macrocell Register (ITM) Definitions **********************************/
/* ITM Register Base Address *******************************************************************/ /* ITM Register Base Address *******************************************************************/
#define ITM_BASE (0xe0000000ul) #define ITM_BASE (0xe0000000ul)

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@ -39,7 +39,7 @@
#define __ARCH_ARM_SRC_ARMV8_M_ITM_SYSLOG_H #define __ARCH_ARM_SRC_ARMV8_M_ITM_SYSLOG_H
/**************************************************************************** /****************************************************************************
* Public Functions * Public Function Prototypes
****************************************************************************/ ****************************************************************************/
/**************************************************************************** /****************************************************************************

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@ -34,6 +34,7 @@
/* Exception/interrupt vector numbers *******************************************************/ /* Exception/interrupt vector numbers *******************************************************/
/* Vector 0: Reset stack pointer value */ /* Vector 0: Reset stack pointer value */
/* Vector 1: Reset */ /* Vector 1: Reset */
#define NVIC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */ #define NVIC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
#define NVIC_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */ #define NVIC_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */

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@ -5,7 +5,8 @@
* *
* All rights reserved. * All rights reserved.
* Redistribution and use in source and binary forms, with or without * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met: * modification, are permitted provided that the following conditions are
* met:
* - Redistributions of source code must retain the above copyright * - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer. * notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright * - Redistributions in binary form must reproduce the above copyright
@ -14,18 +15,18 @@
* - Neither the name of ARM nor the names of its contributors may be used * - Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without * to endorse or promote products derived from this software without
* specific prior written permission. * specific prior written permission.
* * *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * AND CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* POSSIBILITY OF SUCH DAMAGE. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
* Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved. * Copyright (C) 2014 Pierre-noel Bouteville . All rights reserved.
* Copyright (C) 2014 Gregory Nutt. All rights reserved. * Copyright (C) 2014 Gregory Nutt. All rights reserved.

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@ -55,9 +55,12 @@
* Private Functions * Private Functions
****************************************************************************/ ****************************************************************************/
void __cyg_profile_func_enter(void *func, void *caller) __attribute__((naked, no_instrument_function)); void __cyg_profile_func_enter(void *func, void *caller)
void __cyg_profile_func_exit(void *func, void *caller) __attribute__((naked, no_instrument_function)); __attribute__((naked, no_instrument_function));
void __stack_overflow_trap(void) __attribute__((naked, no_instrument_function)); void __cyg_profile_func_exit(void *func, void *caller)
__attribute__((naked, no_instrument_function));
void __stack_overflow_trap(void)
__attribute__((naked, no_instrument_function));
/**************************************************************************** /****************************************************************************
* Name: __stack_overflow_trap * Name: __stack_overflow_trap
@ -70,6 +73,7 @@ void __stack_overflow_trap(void)
uint32_t regval; uint32_t regval;
/* force hard fault */ /* force hard fault */
regval = getreg32(NVIC_INTCTRL); regval = getreg32(NVIC_INTCTRL);
regval |= NVIC_INTCTRL_NMIPENDSET; regval |= NVIC_INTCTRL_NMIPENDSET;
putreg32(regval, NVIC_INTCTRL); putreg32(regval, NVIC_INTCTRL);

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@ -265,7 +265,8 @@ static int systick_interrupt(int irq, FAR void *context, FAR void *arg)
struct timer_lowerhalf_s *systick_initialize(bool coreclk, struct timer_lowerhalf_s *systick_initialize(bool coreclk,
unsigned int freq, int minor) unsigned int freq, int minor)
{ {
struct systick_lowerhalf_s *lower = (struct systick_lowerhalf_s *)&g_systick_lower; struct systick_lowerhalf_s *lower =
(struct systick_lowerhalf_s *)&g_systick_lower;
/* Calculate the working clock frequency if need */ /* Calculate the working clock frequency if need */
@ -284,7 +285,8 @@ struct timer_lowerhalf_s *systick_initialize(bool coreclk,
if (coreclk) if (coreclk)
{ {
putreg32(NVIC_SYSTICK_CTRL_CLKSOURCE | NVIC_SYSTICK_CTRL_TICKINT, NVIC_SYSTICK_CTRL); putreg32(NVIC_SYSTICK_CTRL_CLKSOURCE | NVIC_SYSTICK_CTRL_TICKINT,
NVIC_SYSTICK_CTRL);
} }
else else
{ {

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@ -41,9 +41,9 @@
#include "chip.h" #include "chip.h"
#include "up_internal.h" #include "up_internal.h"
/************************************************************************************ /****************************************************************************
* Pre-processor Definitions * Pre-processor Definitions
************************************************************************************/ ****************************************************************************/
#define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4) #define IDLE_STACK ((unsigned)&_ebss+CONFIG_IDLETHREAD_STACKSIZE-4)
@ -63,17 +63,17 @@ extern void __start(void);
extern void exception_common(void); extern void exception_common(void);
/************************************************************************************ /****************************************************************************
* Public data * Public data
************************************************************************************/ ****************************************************************************/
/* The v7m vector table consists of an array of function pointers, with the first /* The v7m vector table consists of an array of function pointers, with the
* slot (vector zero) used to hold the initial stack pointer. * first slot (vector zero) used to hold the initial stack pointer.
* *
* As all exceptions (interrupts) are routed via exception_common, we just need to * As all exceptions (interrupts) are routed via exception_common, we just
* fill this array with pointers to it. * need to fill this array with pointers to it.
* *
* Note that the [ ... ] designated initialiser is a GCC extension. * Note that the [ ... ] designated initializer is a GCC extension.
*/ */
unsigned _vectors[] __attribute__((section(".vectors"))) = unsigned _vectors[] __attribute__((section(".vectors"))) =

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@ -1,35 +1,20 @@
/**************************************************************************** /****************************************************************************
* common/up_internal.h * common/up_internal.h
* *
* Copyright (C) 2007-2015, 2018-2019 Gregory Nutt. All rights reserved. * Licensed to the Apache Software Foundation (ASF) under one or more
* Author: Gregory Nutt <gnutt@nuttx.org> * contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
* *
* Redistribution and use in source and binary forms, with or without * http://www.apache.org/licenses/LICENSE-2.0
* modification, are permitted provided that the following conditions
* are met:
* *
* 1. Redistributions of source code must retain the above copyright * Unless required by applicable law or agreed to in writing, software
* notice, this list of conditions and the following disclaimer. * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* 2. Redistributions in binary form must reproduce the above copyright * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* notice, this list of conditions and the following disclaimer in * License for the specific language governing permissions and limitations
* the documentation and/or other materials provided with the * under the License.
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************/ ****************************************************************************/
@ -97,7 +82,8 @@
* some configurations. * some configurations.
*/ */
#if defined(CONFIG_ARCH_CORTEXM0) || defined(CONFIG_ARCH_ARMV7M) || defined(CONFIG_ARCH_ARMV8M) #if defined(CONFIG_ARCH_CORTEXM0) || defined(CONFIG_ARCH_ARMV7M) || \
defined(CONFIG_ARCH_ARMV8M)
/* If the floating point unit is present and enabled, then save the /* If the floating point unit is present and enabled, then save the
* floating point registers as well as normal ARM registers. This only * floating point registers as well as normal ARM registers. This only
@ -129,7 +115,8 @@
# define up_restorestate(regs) (CURRENT_REGS = regs) # define up_restorestate(regs) (CURRENT_REGS = regs)
/* Otherwise, for the ARM7 and ARM9. The state is copied in full from stack /* Otherwise, for the ARM7 and ARM9. The state is copied in full from stack
* to stack. This is not very efficient and should be fixed to match Cortex-A5. * to stack. This is not very efficient and should be fixed to match
* Cortex-A5.
*/ */
#else #else
@ -234,14 +221,14 @@ EXTERN uint32_t g_intstackalloc; /* Allocated stack base */
EXTERN uint32_t g_intstackbase; /* Initial top of interrupt stack */ EXTERN uint32_t g_intstackbase; /* Initial top of interrupt stack */
#endif #endif
/* These 'addresses' of these values are setup by the linker script. They are /* These 'addresses' of these values are setup by the linker script. They
* not actual uint32_t storage locations! They are only used meaningfully in the * are not actual uint32_t storage locations! They are only used
* following way: * meaningfully in the following way:
* *
* - The linker script defines, for example, the symbol_sdata. * - The linker script defines, for example, the symbol_sdata.
* - The declareion extern uint32_t _sdata; makes C happy. C will believe * - The declareion extern uint32_t _sdata; makes C happy. C will believe
* that the value _sdata is the address of a uint32_t variable _data (it is * that the value _sdata is the address of a uint32_t variable _data (it
* not!). * is not!).
* - We can recoved the linker value then by simply taking the address of * - We can recoved the linker value then by simply taking the address of
* of _data. like: uint32_t *pdata = &_sdata; * of _data. like: uint32_t *pdata = &_sdata;
*/ */
@ -254,9 +241,9 @@ EXTERN uint32_t _edata; /* End+1 of .data */
EXTERN uint32_t _sbss; /* Start of .bss */ EXTERN uint32_t _sbss; /* Start of .bss */
EXTERN uint32_t _ebss; /* End+1 of .bss */ EXTERN uint32_t _ebss; /* End+1 of .bss */
/* Sometimes, functions must be executed from RAM. In this case, the following /* Sometimes, functions must be executed from RAM. In this case, the
* macro may be used (with GCC!) to specify a function that will execute from * following macro may be used (with GCC!) to specify a function that will
* RAM. For example, * execute from RAM. For example,
* *
* int __ramfunc__ foo (void); * int __ramfunc__ foo (void);
* int __ramfunc__ foo (void) { return bar; } * int __ramfunc__ foo (void) { return bar; }
@ -301,7 +288,7 @@ EXTERN uint32_t _eramfuncs; /* Copy destination end address in RAM */
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
/* Low level initialization provided by board-level logic ******************/ /* Low level initialization provided by board-level logic *******************/
void arm_boot(void); void arm_boot(void);
@ -332,7 +319,8 @@ void up_pminitialize(void);
/* Exception handling logic unique to the Cortex-M family */ /* Exception handling logic unique to the Cortex-M family */
#if defined(CONFIG_ARCH_CORTEXM0) || defined(CONFIG_ARCH_ARMV7M) || defined(CONFIG_ARCH_ARMV8M) #if defined(CONFIG_ARCH_CORTEXM0) || defined(CONFIG_ARCH_ARMV7M) || \
defined(CONFIG_ARCH_ARMV8M)
/* Interrupt acknowledge and dispatch */ /* Interrupt acknowledge and dispatch */
@ -474,10 +462,10 @@ void up_wdtinit(void);
/* Networking ***************************************************************/ /* Networking ***************************************************************/
/* Defined in board/xyz_network.c for board-specific Ethernet implementations, /* Defined in board/xyz_network.c for board-specific Ethernet
* or chip/xyx_ethernet.c for chip-specific Ethernet implementations, or * implementations, or chip/xyx_ethernet.c for chip-specific Ethernet
* common/up_etherstub.c for a corner case where the network is enabled yet * implementations, or common/up_etherstub.c for a corner case where the
* there is no Ethernet driver to be initialized. * network is enabled yet there is no Ethernet driver to be initialized.
* *
* Use of common/up_etherstub.c is deprecated. The preferred mechanism is to * Use of common/up_etherstub.c is deprecated. The preferred mechanism is to
* use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in * use CONFIG_NETDEV_LATEINIT=y to suppress the call to up_netinitialize() in