Low level UART for SAM3U
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2517 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
parent
8678ae366c
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68307fd710
@ -49,6 +49,7 @@
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#include "sam3u_internal.h"
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#include "sam3u_pmc.h"
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#include "sam3u_uart.h"
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/**************************************************************************
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* Private Definitions
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@ -56,6 +57,10 @@
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/* Configuration **********************************************************/
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/* If the USART is not being used as a UART, then it really isn't enabled
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* for our purposes.
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*/
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#ifndef CONFIG_USART0_ISUART
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# undef CONFIG_SAM3U_USART0
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#endif
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@ -114,38 +119,90 @@
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#if defined(CONFIG_UART_SERIAL_CONSOLE)
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# define SAM3U_CONSOLE_BASE SAM3U_UART_BASE
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# define SAM3U_CONSOLE_BAUD CONFIG_USART_BAUD
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# define SAM3U_CONSOLE_BITS CONFIG_USART_BITS
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# define SAM3U_CONSOLE_PARITY CONFIG_USART_PARITY
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# define SAM3U_CONSOLE_2STOP CONFIG_USART_2STOP
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# define SAM3U_CONSOLE_BAUD CONFIG_UART_BAUD
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# define SAM3U_CONSOLE_BITS CONFIG_UART_BITS
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# define SAM3U_CONSOLE_PARITY CONFIG_UART_PARITY
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# define SAM3U_CONSOLE_2STOP CONFIG_UART_2STOP
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# define GPIO_CONSOLE_RXD GPIO_UART_RXD
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# define GPIO_CONSOLE_TXD GPIO_UART_TXD
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# undef GPIO_CONSOLE_CTS
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# undef GPIO_CONSOLE_RTS
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#elif defined(CONFIG_USART0_SERIAL_CONSOLE)
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# define SAM3U_CONSOLE_BASE SAM3U_USART0_BASE
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# define SAM3U_CONSOLE_BAUD CONFIG_USART0_BAUD
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# define SAM3U_CONSOLE_BITS CONFIG_USART0_BITS
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# define SAM3U_CONSOLE_PARITY CONFIG_USART0_PARITY
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# define SAM3U_CONSOLE_2STOP CONFIG_USART0_2STOP
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# define GPIO_CONSOLE_RXD GPIO_USART0_RXD
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# define GPIO_CONSOLE_TXD GPIO_USART0_TXD
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# define GPIO_CONSOLE_CTS GPIO_USART0_CTS
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# define GPIO_CONSOLE_RTS GPIO_USART0_RTS
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#elif defined(CONFIG_USART1_SERIAL_CONSOLE)
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# define SAM3U_CONSOLE_BASE SAM3U_USART1_BASE
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# define SAM3U_CONSOLE_BAUD CONFIG_USART1_BAUD
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# define SAM3U_CONSOLE_BITS CONFIG_USART1_BITS
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# define SAM3U_CONSOLE_PARITY CONFIG_USART1_PARITY
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# define SAM3U_CONSOLE_2STOP CONFIG_USART1_2STOP
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# define GPIO_CONSOLE_RXD GPIO_USART1_RXD
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# define GPIO_CONSOLE_TXD GPIO_USART1_TXD
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# define GPIO_CONSOLE_CTS GPIO_USART1_CTS
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# define GPIO_CONSOLE_RTS GPIO_USART1_RTS
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#elif defined(CONFIG_USART2_SERIAL_CONSOLE)
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# define SAM3U_CONSOLE_BASE SAM3U_USART2_BASE
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# define SAM3U_CONSOLE_BAUD CONFIG_USART2_BAUD
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# define SAM3U_CONSOLE_BITS CONFIG_USART2_BITS
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# define SAM3U_CONSOLE_PARITY CONFIG_USART2_PARITY
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# define SAM3U_CONSOLE_2STOP CONFIG_USART2_2STOP
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# define GPIO_CONSOLE_RXD GPIO_USART2_RXD
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# define GPIO_CONSOLE_TXD GPIO_USART2_TXD
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# define GPIO_CONSOLE_CTS GPIO_USART2_CTS
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# define GPIO_CONSOLE_RTS GPIO_USART2_RTS
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#elif defined(CONFIG_USART3_SERIAL_CONSOLE)
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# define SAM3U_CONSOLE_BASE SAM3U_USART3_BASE
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# define SAM3U_CONSOLE_BAUD CONFIG_USART3_BAUD
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# define SAM3U_CONSOLE_BITS CONFIG_USART3_BITS
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# define SAM3U_CONSOLE_PARITY CONFIG_USART3_PARITY
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# define SAM3U_CONSOLE_2STOP CONFIG_USART3_2STOP
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# define GPIO_CONSOLE_RXD GPIO_USART3_RXD
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# define GPIO_CONSOLE_TXD GPIO_USART3_TXD
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# define GPIO_CONSOLE_CTS GPIO_USART3_CTS
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# define GPIO_CONSOLE_RTS GPIO_USART3_RTS
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#else
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# error "No CONFIG_U[S]ARTn_SERIAL_CONSOLE Setting"
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#endif
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/* Select the settings for the mode register */
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#if SAM3U_CONSOLE_BITS == 5
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# define MR_CHRL_VALUE USART_MR_CHRL_5BITS /* 5 bits */
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#elif SAM3U_CONSOLE_BITS == 6
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# define MR_CHRL_VALUE USART_MR_CHRL_6BITS /* 6 bits */
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#elif SAM3U_CONSOLE_BITS == 7
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# define MR_CHRL_VALUE USART_MR_CHRL_7BITS /* 7 bits */
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#elif SAM3U_CONSOLE_BITS == 8
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# define MR_CHRL_VALUE USART_MR_CHRL_8BITS /* 8 bits */
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#elif SAM3U_CONSOLE_BITS == 9 && !defined(CONFIG_UART_SERIAL_CONSOLE)
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# define MR_CHRL_VALUE USART_MR_MODE9
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#else
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# error "Invlaid number of bits"
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#endif
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#if SAM3U_CONSOLE_PARITY == 1
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# define MR_PAR_VALUE UART_MR_PAR_ODD
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#elif SAM3U_CONSOLE_PARITY == 2
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# define MR_PAR_VALUE UART_MR_PAR_EVEN
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#else
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# define MR_PAR_VALUE UART_MR_PAR_NONE
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#endif
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#if SAM3U_CONSOLE_2STOP != 0
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# define MR_NBSTOP_VALUE USART_MR_NBSTOP_2
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#else
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# define MR_NBSTOP_VALUE USART_MR_NBSTOP_1
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#endif
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#define MR_VALUE (USART_MR_MODE_NORMAL|USART_MR_USCLKS_MCK|MR_CHRL_VALUE|MR_PAR_VALUE|MR_NBSTOP_VALUE)
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/**************************************************************************
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* Private Types
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**************************************************************************/
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@ -180,7 +237,13 @@
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void up_lowputc(char ch)
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{
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#warning "To be provided"
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/* Wait for the transmitter to be available */
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while ((getreg32(SAM3U_CONSOLE_BASE+SAM3U_UART_SR_OFFSET) & UART_INT_TXEMPTY) == 0);
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/* Send the character */
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putreg32((uint32_t)ch, SAM3U_CONSOLE_BASE+SAM3U_UART_THR_OFFSET);
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}
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/**************************************************************************
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@ -197,12 +260,66 @@ void sam3u_lowsetup(void)
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{
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uint32_t regval;
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#warning "To be provided"
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/* Enable clocking for the UART */
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/* Enable clocking for the selected UART/USARTs */
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regval = getreg32(SAM3U_PMC_PCER);
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#ifdef CONFIG_SAM3U_USART
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regval |= (1 << SAM3U_PID_UART);
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#endif
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#ifdef CONFIG_SAM3U_USART0
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regval |= (1 << SAM3U_PID_USART0);
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#endif
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#ifdef CONFIG_SAM3U_USART1
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regval |= (1 << SAM3U_PID_USART1);
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#endif
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#ifdef CONFIG_SAM3U_USART2
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regval |= (1 << SAM3U_PID_USART2);
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#endif
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#ifdef CONFIG_SAM3U_USART3
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regval |= (1 << SAM3U_PID_USART3);
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#endif
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putreg32(regval, SAM3U_PMC_PCER);
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/* Configure UART pins */
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#ifdef GPIO_CONSOLE_RXD
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(void)sam3u_configgpio(GPIO_CONSOLE_RXD);
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#endif
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#ifdef GPIO_CONSOLE_TXD
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(void)sam3u_configgpio(GPIO_CONSOLE_TXD);
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#endif
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#ifdef GPIO_CONSOLE_CTS
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(void)sam3u_configgpio(GPIO_CONSOLE_CTS);
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#endif
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#ifdef GPIO_CONSOLE_RTS
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(void)sam3u_configgpio(GPIO_CONSOLE_RTS);
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#endif
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/* Configure the console (only) */
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#ifdef HAVE_CONSOLE
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/* Reset and disable receiver and transmitter */
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putreg32((UART_CR_RSTRX|UART_CR_RSTTX|UART_CR_RXDIS|UART_CR_TXDIS),
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SAM3U_CONSOLE_BASE+SAM3U_UART_CR_OFFSET);
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/* Disable all interrupts */
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putreg32(0xffffffff, SAM3U_CONSOLE_BASE+SAM3U_UART_IDR_OFFSET);
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/* Set up the mode register */
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putreg32(MR_VALUE, AM3U_CONSOLE_BASE+SAM3U_UART_MR_OFFSET);
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/* Configure the console baud */
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putreg32(((SAM3U_MCK_FREQUENCY + (SAM3U_CONSOLE_BAUD << 3))/(SAM3U_CONSOLE_BAUD << 4)),
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SAM3U_CONSOLE_BASE+SAM3U_UART_BRGR_OFFSET);
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/* Enable receiver & transmitter */
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putreg32((UART_CR_RXEN|UART_CR_TXEN),
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SAM3U_CONSOLE_BASE+SAM3U_UART_CR_OFFSET);
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#endif
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}
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@ -232,12 +232,12 @@
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#define USART_MR_CPHA (1 << 8) /* Bit 8: SPI Clock Phase (USART only) */
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#define UART_MR_PAR_SHIFT (9) /* Bits 9-11: Parity Type (Common) */
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#define UART_MR_PAR_MASK (7 << UART_MR_PAR_SHIFT)
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# define UART_MR_PAR_ EVEN (0 << UART_MR_PAR_SHIFT) /* Even parity (Common) */
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# define UART_MR_PAR_ ODD (1 << UART_MR_PAR_SHIFT) /* Odd parity (Common) */
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# define UART_MR_PAR_ SPACE (2 << UART_MR_PAR_SHIFT) /* Space: parity forced to 0 (Common) */
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# define UART_MR_PAR_ MARK (3 << UART_MR_PAR_SHIFT) /* Mark: parity forced to 1 (Common) */
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# define UART_MR_PAR_ NONE (4 << UART_MR_PAR_SHIFT) /* No parity (Common) */
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# define UART_MR_PAR_ MULTIDROP (6 << UART_MR_PAR_SHIFT) /* Multidrop mode (USART only) */
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# define UART_MR_PAR_EVEN (0 << UART_MR_PAR_SHIFT) /* Even parity (Common) */
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# define UART_MR_PAR_ODD (1 << UART_MR_PAR_SHIFT) /* Odd parity (Common) */
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# define UART_MR_PAR_SPACE (2 << UART_MR_PAR_SHIFT) /* Space: parity forced to 0 (Common) */
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# define UART_MR_PAR_MARK (3 << UART_MR_PAR_SHIFT) /* Mark: parity forced to 1 (Common) */
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# define UART_MR_PAR_NONE (4 << UART_MR_PAR_SHIFT) /* No parity (Common) */
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# define UART_MR_PAR_MULTIDROP (6 << UART_MR_PAR_SHIFT) /* Multidrop mode (USART only) */
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#define USART_MR_NBSTOP_SHIFT (12) /* Bits 12-13: Number of Stop Bits (USART only) */
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#define USART_MR_NBSTOP_MASK (3 << USART_MR_NBSTOP_SHIFT)
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# define USART_MR_NBSTOP_1 (0 << USART_MR_NBSTOP_SHIFT) /* 1 stop bit 1 stop bit */
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@ -249,7 +249,8 @@
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# define UART_MR_CHMODE_ECHO (1 << UART_MR_CHMODE_SHIFT) /* Automatic Echo */
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# define UART_MR_CHMODE_LLPBK (2 << UART_MR_CHMODE_SHIFT) /* Local Loopback */
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# define UART_MR_CHMODE_RLPBK (3 << UART_MR_CHMODE_SHIFT) /* Remote Loopback */
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#define USART_MR_MSBF/CPOL (1 << 16) /* Bit 16: Bit Order or SPI Clock Polarity (USART only) */
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#define USART_MR_MSBF (1 << 16) /* Bit 16: Bit Order or SPI Clock Polarity (USART only) */
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#define USART_MR_CPOL (1 << 16)
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#define USART_MR_MODE9 (1 << 17) /* Bit 17: 9-bit Character Length (USART only) */
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#define USART_MR_CLKO (1 << 18) /* Bit 18: Clock Output Select (USART only) */
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#define USART_MR_OVER (1 << 19) /* Bit 19: Oversampling Mode (USART only) */
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