Add framework for SSD1289 LCD on Shenzhou
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5184 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
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@ -3390,3 +3390,8 @@
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even multiple of 4, 8, or 16 bytes.
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* arch/arm/src/stm32/stm32_idle.c: Fixes STM32F107 DMA issues:
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We cannot go into sleep mode while Ethernet is actively DMAing.
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* configs/shenzhou/src/up_ssd1289.c: Add infrastructure to support
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SSD1289 LCD. Initial checkin is just a clone of the
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STM32F4Discovery's FSMC-based LCD interface. The Shenzhou
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will need a completely need bit-banging interface; this
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initial check-in is only for the framework.
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@ -136,7 +136,7 @@ PN NAME SIGNAL NOTES
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RMII_CRSDV Ethernet PHY
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56 PD9 MII_RXD0 Ethernet PHY
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57 PD10 MII_RXD1 Ethernet PHY
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58 PD11 SD_CS Active low: Pulled high
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58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
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59 PD12 WIRELESS_CS To the NRF24L01 2.4G wireless module
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60 PD13 LCD_RS To TFT LCD (CN13)
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61 PD14 LCD_WR To TFT LCD (CN13)
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@ -84,6 +84,10 @@ ifeq ($(CONFIG_WATCHDOG),y)
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CSRCS += up_watchdog.c
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endif
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ifeq ($(CONFIG_LCD_SSD1289),y)
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CSRCS += up_ssd1289.c
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endif
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COBJS = $(CSRCS:.c=$(OBJEXT))
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SRCS = $(ASRCS) $(CSRCS)
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@ -154,30 +154,37 @@
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* -- ---- -------------- -------------------------------------------------------------------
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* PN NAME SIGNAL NOTES
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* -- ---- -------------- -------------------------------------------------------------------
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* 37 PB2 DATA_LE To TFT LCD (CN13)
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* 96 PB9 F_CS To both the TFT LCD (CN13) and to the W25X16 SPI FLASH
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* 34 PC5 TP_INT JP6. To TFT LCD (CN13) module
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* 65 PC8 LCD_CS Active low: Pulled high
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* 66 PC9 TP_CS Active low: Pulled high
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* 60 PD13 LCD_RS To TFT LCD (CN13)
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* 61 PD14 LCD_WR To TFT LCD (CN13)
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* 62 PD15 LCD_RD To TFT LCD (CN13)
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* 97 PE0 DB00 To TFT LCD (CN13)
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* 98 PE1 DB01 To TFT LCD (CN13)
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* 1 PE2 DB02 To TFT LCD (CN13)
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* 2 PE3 DB03 To TFT LCD (CN13)
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* 3 PE4 DB04 To TFT LCD (CN13)
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* 4 PE5 DB05 To TFT LCD (CN13)
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* 5 PE6 DB06 To TFT LCD (CN13)
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* 38 PE7 DB07 To TFT LCD (CN13)
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* 39 PE8 DB08 To TFT LCD (CN13)
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* 40 PE9 DB09 To TFT LCD (CN13)
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* 41 PE10 DB10 To TFT LCD (CN13)
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* 42 PE11 DB11 To TFT LCD (CN13)
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* 43 PE12 DB12 To TFT LCD (CN13)
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* 44 PE13 DB13 To TFT LCD (CN13)
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* 45 PE14 DB14 To TFT LCD (CN13)
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* 46 PE15 DB15 To TFT LCD (CN13)
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* 37 PB2 DATA_LE To TFT LCD (CN13, ping 28)
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* 96 PB9 F_CS To both the TFT LCD (CN13, pin 30) and to the W25X16 SPI FLASH
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* 34 PC5 TP_INT JP6. To TFT LCD (CN13) module (CN13, pin 26)
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* 65 PC8 LCD_CS Active low: Pulled high (CN13, pin 19)
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* 66 PC9 TP_CS Active low: Pulled high (CN13, pin 31)
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* 78 PC10 SPI3_SCK To TFT LCD (CN13, pin 29)
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* 79 PC11 SPI3_MISO To TFT LCD (CN13, pin 25)
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* 80 PC12 SPI3_MOSI To TFT LCD (CN13, pin 27)
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* 58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
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* 60 PD13 LCD_RS To TFT LCD (CN13, pin 20)
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* 61 PD14 LCD_WR To TFT LCD (CN13, pin 21)
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* 62 PD15 LCD_RD To TFT LCD (CN13, pin 22)
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* 97 PE0 DB00 To TFT LCD (CN13, pin 3)
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* 98 PE1 DB01 To TFT LCD (CN13, pin 4)
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* 1 PE2 DB02 To TFT LCD (CN13, pin 5)
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* 2 PE3 DB03 To TFT LCD (CN13, pin 6)
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* 3 PE4 DB04 To TFT LCD (CN13, pin 7)
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* 4 PE5 DB05 To TFT LCD (CN13, pin 8)
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* 5 PE6 DB06 To TFT LCD (CN13, pin 9)
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* 38 PE7 DB07 To TFT LCD (CN13, pin 10)
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* 39 PE8 DB08 To TFT LCD (CN13, pin 11)
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* 40 PE9 DB09 To TFT LCD (CN13, pin 12)
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* 41 PE10 DB10 To TFT LCD (CN13, pin 13)
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* 42 PE11 DB11 To TFT LCD (CN13, pin 16)
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* 43 PE12 DB12 To TFT LCD (CN13, pin 15)
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* 44 PE13 DB13 To TFT LCD (CN13, pin 16)
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* 45 PE14 DB14 To TFT LCD (CN13, pin 17)
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* 46 PE15 DB15 To TFT LCD (CN13, pin 18)
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*
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* NOTE: The backlight signl NC_BL (CN13, pin 24) is pulled high and not under
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* software control
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*/
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#define GPIO_LCD_CS (GPIO_OUTPUT|GPIO_CNF_OUTPP|GPIO_MODE_50MHz|\
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@ -230,7 +237,7 @@
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* PN NAME SIGNAL NOTES
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* -- ---- -------------- -------------------------------------------------------------------
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* 53 PB14 SD_CD Active low: Pulled high
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* 58 PD11 SD_CS Active low: Pulled high
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* 58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
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*/
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#define GPIO_SD_CD (GPIO_INPUT|GPIO_CNF_INFLOAT|GPIO_EXTI|GPIO_PORTB|GPIO_PIN14)
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425
configs/shenzhou/src/up_ssd1289.c
Normal file
425
configs/shenzhou/src/up_ssd1289.c
Normal file
@ -0,0 +1,425 @@
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/************************************************************************************
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* configs/shenzhou/src/up_ssd1289.c
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* arch/arm/src/board/up_ssd1289.c
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*
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* This logic supports the connection of an SSD1289-based LCD to the Shenzhou IV
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* board.
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*
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* Copyright (C) 2012 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <string.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/spi.h>
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#include <nuttx/lcd/lcd.h>
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#include <nuttx/lcd/ssd1289.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "stm32.h"
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#include "stm32_internal.h"
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#include "shenzhou-internal.h"
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#ifdef CONFIG_LCD_SSD1289
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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#ifndef CONFIG_STM32_FSMC
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# error "CONFIG_STM32_FSMC is required to use the LCD"
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#endif
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/* Define CONFIG_DEBUG_LCD to enable detailed LCD debug output. Verbose debug must
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* also be enabled.
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*/
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_VERBOSE
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# undef CONFIG_DEBUG_GRAPHICS
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# undef CONFIG_DEBUG_LCD
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#endif
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#ifndef CONFIG_DEBUG_VERBOSE
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# undef CONFIG_DEBUG_LCD
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#endif
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/* Shenzhou LCD Hardware Definitions ************************************************/
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/* LCD /CS is CE1 == NOR/SRAM Bank 1
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*
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* Bank 1 = 0x60000000 | 0x00000000
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* Bank 2 = 0x60000000 | 0x04000000
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* Bank 3 = 0x60000000 | 0x08000000
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* Bank 4 = 0x60000000 | 0x0c000000
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*
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* FSMC address bit 16 is used to distinguish command and data. FSMC address bits
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* 0-24 correspond to ARM address bits 1-25.
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*/
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#define STM32_LCDBASE ((uintptr_t)(0x60000000 | 0x00000000))
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#define LCD_INDEX (STM32_LCDBASE)
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#define LCD_DATA (STM32_LCDBASE + 0x00020000)
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/* SRAM pin definitions */
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#define LCD_NADDRLINES 1 /* A16 */
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#define LCD_NDATALINES 16 /* D0-15 */
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/* Debug ****************************************************************************/
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#ifdef CONFIG_DEBUG_LCD
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# define lcddbg dbg
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# define lcdvdbg vdbg
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#else
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# define lcddbg(x...)
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# define lcdvdbg(x...)
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#endif
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/************************************************************************************
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* Private Type Definition
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************************************************************************************/
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/**************************************************************************************
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* Private Function Protototypes
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**************************************************************************************/
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/* Low Level LCD access */
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static void stm32_select(FAR struct ssd1289_lcd_s *dev);
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static void stm32_deselect(FAR struct ssd1289_lcd_s *dev);
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static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index);
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#ifndef CONFIG_SSD1289_WRONLY
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static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev);
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#endif
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static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data);
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static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power);
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/************************************************************************************
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* Private Data
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************************************************************************************/
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/* TFT LCD
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*
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* -- ---- -------------- -------------------------------------------------------------------
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* PN NAME SIGNAL NOTES
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* -- ---- -------------- -------------------------------------------------------------------
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* 37 PB2 DATA_LE To TFT LCD (CN13, ping 28)
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* 96 PB9 F_CS To both the TFT LCD (CN13, pin 30) and to the W25X16 SPI FLASH
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* 34 PC5 TP_INT JP6. To TFT LCD (CN13) module (CN13, pin 26)
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* 65 PC8 LCD_CS Active low: Pulled high (CN13, pin 19)
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* 66 PC9 TP_CS Active low: Pulled high (CN13, pin 31)
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* 78 PC10 SPI3_SCK To TFT LCD (CN13, pin 29)
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* 79 PC11 SPI3_MISO To TFT LCD (CN13, pin 25)
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* 80 PC12 SPI3_MOSI To TFT LCD (CN13, pin 27)
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* 58 PD11 SD_CS Active low: Pulled high (See also TFT LCD CN13, pin 32)
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* 60 PD13 LCD_RS To TFT LCD (CN13, pin 20)
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* 61 PD14 LCD_WR To TFT LCD (CN13, pin 21)
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* 62 PD15 LCD_RD To TFT LCD (CN13, pin 22)
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* 97 PE0 DB00 To TFT LCD (CN13, pin 3)
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* 98 PE1 DB01 To TFT LCD (CN13, pin 4)
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* 1 PE2 DB02 To TFT LCD (CN13, pin 5)
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* 2 PE3 DB03 To TFT LCD (CN13, pin 6)
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* 3 PE4 DB04 To TFT LCD (CN13, pin 7)
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* 4 PE5 DB05 To TFT LCD (CN13, pin 8)
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* 5 PE6 DB06 To TFT LCD (CN13, pin 9)
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* 38 PE7 DB07 To TFT LCD (CN13, pin 10)
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* 39 PE8 DB08 To TFT LCD (CN13, pin 11)
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* 40 PE9 DB09 To TFT LCD (CN13, pin 12)
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* 41 PE10 DB10 To TFT LCD (CN13, pin 13)
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* 42 PE11 DB11 To TFT LCD (CN13, pin 16)
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* 43 PE12 DB12 To TFT LCD (CN13, pin 15)
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* 44 PE13 DB13 To TFT LCD (CN13, pin 16)
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* 45 PE14 DB14 To TFT LCD (CN13, pin 17)
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* 46 PE15 DB15 To TFT LCD (CN13, pin 18)
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*
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* NOTE: The backlight signl NC_BL (CN13, pin 24) is pulled high and not under
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* software control
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*/
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#define GPIO_LCD_RESET (GPIO_OUTPUT|GPIO_PUSHPULL|GPIO_SPEED_50MHz|\
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GPIO_OUTPUT_SET|GPIO_PORTC|GPIO_PIN6)
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/* GPIO configurations unique to the LCD */
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static const uint32_t g_lcdconfig[] =
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{
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/* PC6(RESET), FSMC_A16, FSMC_NOE, FSMC_NWE, and FSMC_NE1 */
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GPIO_LCD_RESET, GPIO_FSMC_A16, GPIO_FSMC_NOE, GPIO_FSMC_NWE, GPIO_FSMC_NE1
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};
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#define NLCD_CONFIG (sizeof(g_lcdconfig)/sizeof(uint32_t))
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/* This is the driver state structure (there is no retained state information) */
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static struct ssd1289_lcd_s g_ssd1289 =
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{
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.select = stm32_select,
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.deselect = stm32_deselect,
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.index = stm32_index,
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#ifndef CONFIG_SSD1289_WRONLY
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.read = stm32_read,
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#endif
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.write = stm32_write,
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.backlight = stm32_backlight
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};
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/* The saved instance of the LCD driver */
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static FAR struct lcd_dev_s *g_ssd1289drvr;
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_select
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*
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* Description:
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* Select the LCD device
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*
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************************************************************************************/
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static void stm32_select(FAR struct ssd1289_lcd_s *dev)
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{
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/* Does not apply to this hardware */
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}
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/************************************************************************************
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* Name: stm32_deselect
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*
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* Description:
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* De-select the LCD device
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*
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************************************************************************************/
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static void stm32_deselect(FAR struct ssd1289_lcd_s *dev)
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{
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/* Does not apply to this hardware */
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}
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/************************************************************************************
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* Name: stm32_deselect
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*
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* Description:
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* Set the index register
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*
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************************************************************************************/
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static void stm32_index(FAR struct ssd1289_lcd_s *dev, uint8_t index)
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{
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putreg16((uint16_t)index, LCD_INDEX);
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}
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/************************************************************************************
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* Name: stm32_read
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*
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* Description:
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* Read LCD data (GRAM data or register contents)
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*
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************************************************************************************/
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#ifndef CONFIG_SSD1289_WRONLY
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static uint16_t stm32_read(FAR struct ssd1289_lcd_s *dev)
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{
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return getreg16(LCD_DATA);
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}
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#endif
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/************************************************************************************
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* Name: stm32_write
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*
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* Description:
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* Write LCD data (GRAM data or register contents)
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*
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************************************************************************************/
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static void stm32_write(FAR struct ssd1289_lcd_s *dev, uint16_t data)
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{
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putreg16((uint16_t)data, LCD_DATA);
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}
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/************************************************************************************
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* Name: stm32_write
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*
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* Description:
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* Write LCD data (GRAM data or register contents)
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*
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************************************************************************************/
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static void stm32_backlight(FAR struct ssd1289_lcd_s *dev, int power)
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{
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#warning "Missing logic"
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}
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/************************************************************************************
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* Name: stm32_selectlcd
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*
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* Description:
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* Initialize to the LCD
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*
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************************************************************************************/
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void stm32_selectlcd(void)
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{
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/* Configure GPIO pins */
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stm32_extmemdata(LCD_NDATALINES); /* Common data lines: D0-D15 */
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stm32_extmemgpios(g_lcdconfig, NLCD_CONFIG); /* LCD-specific control lines */
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/* Enable AHB clocking to the FSMC */
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stm32_enablefsmc();
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/* Color LCD configuration (LCD configured as follow):
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*
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* - Data/Address MUX = Disable "FSMC_BCR_MUXEN" just not enable it.
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* - Extended Mode = Disable "FSMC_BCR_EXTMOD"
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* - Memory Type = SRAM "FSMC_BCR_SRAM"
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* - Data Width = 16bit "FSMC_BCR_MWID16"
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* - Write Operation = Enable "FSMC_BCR_WREN"
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* - Asynchronous Wait = Disable
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*/
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/* Bank1 NOR/SRAM control register configuration */
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putreg32(FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
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/* Bank1 NOR/SRAM timing register configuration */
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putreg32(FSMC_BTR_ADDSET(5) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(9) | FSMC_BTR_BUSTRUN(0) |
|
||||
FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) | FSMC_BTR_ACCMODA, STM32_FSMC_BTR1);
|
||||
|
||||
putreg32(0xffffffff, STM32_FSMC_BWTR1);
|
||||
|
||||
/* Enable the bank by setting the MBKEN bit */
|
||||
|
||||
putreg32(FSMC_BCR_MBKEN | FSMC_BCR_SRAM | FSMC_BCR_MWID16 | FSMC_BCR_WREN, STM32_FSMC_BCR1);
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
|
||||
/************************************************************************************
|
||||
* Name: up_lcdinitialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the LCD video hardware. The initial state of the LCD is fully
|
||||
* initialized, display memory cleared, and the LCD ready to use, but with the power
|
||||
* setting at 0 (full off).
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
int up_lcdinitialize(void)
|
||||
{
|
||||
/* Only initialize the driver once */
|
||||
|
||||
if (!g_ssd1289drvr)
|
||||
{
|
||||
lcdvdbg("Initializing\n");
|
||||
|
||||
/* Configure GPIO pins and configure the FSMC to support the LCD */
|
||||
|
||||
stm32_selectlcd();
|
||||
|
||||
/* Reset the LCD (active low) */
|
||||
|
||||
stm32_gpiowrite(GPIO_LCD_RESET, false);
|
||||
up_mdelay(5);
|
||||
stm32_gpiowrite(GPIO_LCD_RESET, true);
|
||||
|
||||
/* Configure and enable the LCD */
|
||||
|
||||
up_mdelay(50);
|
||||
g_ssd1289drvr = ssd1289_lcdinitialize(&g_ssd1289);
|
||||
if (!g_ssd1289drvr)
|
||||
{
|
||||
lcddbg("ERROR: ssd1289_lcdinitialize failed\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
}
|
||||
|
||||
/* Clear the display (setting it to the color 0=black) */
|
||||
|
||||
#if 0 /* Already done in the driver */
|
||||
ssd1289_clear(g_ssd1289drvr, 0);
|
||||
#endif
|
||||
|
||||
/* Turn the display off */
|
||||
|
||||
g_ssd1289drvr->setpower(g_ssd1289drvr, 0);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: up_lcdgetdev
|
||||
*
|
||||
* Description:
|
||||
* Return a a reference to the LCD object for the specified LCD. This allows
|
||||
* suport for multiple LCD devices.
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
FAR struct lcd_dev_s *up_lcdgetdev(int lcddev)
|
||||
{
|
||||
DEBUGASSERT(lcddev == 0);
|
||||
return g_ssd1289drvr;
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Name: up_lcduninitialize
|
||||
*
|
||||
* Description:
|
||||
* Unitialize the LCD support
|
||||
*
|
||||
************************************************************************************/
|
||||
|
||||
void up_lcduninitialize(void)
|
||||
{
|
||||
/* Turn the display off */
|
||||
|
||||
g_ssd1289drvr->setpower(g_ssd1289drvr, 0);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_LCD_SSD1289 */
|
Loading…
Reference in New Issue
Block a user