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arch/arm/src/stm32/stm32f33xx_adc.c: Eliminate warnings about cj_channels and j_chanlist being set but not used.

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This commit is contained in:
Gregory Nutt 2017-11-12 10:17:10 -06:00
parent 425f769f0f
commit 692ebdf9d4
2 changed files with 15 additions and 5 deletions
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5
TODO
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@ -300,12 +300,13 @@ o Task/Scheduler (sched/)
./risc-v/src/common/up_internal.h:EXTERN uint32_t g_idle_topstack;
./x86/src/common/up_internal.h:extern uint32_t g_idle_topstack;
That omits there architectures: sh1, sim, xtensa, z16, z80,
That omits these architectures: sh1, sim, xtensa, z16, z80,
ez80, and z8. All would have to support this common
globlal variable.
Also, the stack itself may be 8-, 16-, or 32-bits wide,
depending upon the architecture.
depending upon the architecture and do have differing
alignment requirements.
2. Another problem is colorizing that stack to use with
stack usage monitoring logic. There is logic in some

15
arch/arm/src/stm32/stm32f33xxx_adc.c
View File

@ -74,6 +74,10 @@
#if defined(CONFIG_STM32_ADC1) || defined(CONFIG_STM32_ADC2)
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* This implementation is for the STM32F33XXX only.
*
* STM32F33XXX chips are intended for digital power conversion applications,
@ -115,9 +119,6 @@
# define ADC2_HAVE_JEXTSEL
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* RCC reset ****************************************************************/
#define STM32_RCC_RSTR STM32_RCC_AHBRSTR
@ -387,7 +388,9 @@ struct stm32_dev_s
#endif
uint8_t rnchannels; /* Number of regular channels */
uint8_t cr_channels; /* Number of configured regular channels */
#ifdef ADC_HAVE_INJECTED
uint8_t cj_channels; /* Number of configured injected channels */
#endif
uint8_t intf; /* ADC interface number */
uint8_t resolution; /* ADC resolution*/
uint8_t current; /* Current ADC channel being converted */
@ -2282,8 +2285,10 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
FAR struct adc_dev_s *dev;
FAR struct stm32_dev_s *priv;
uint8_t cr_channels = 0;
#ifdef ADC_HAVE_INJECTED
uint8_t cj_channels = 0;
FAR uint8_t *j_chanlist = NULL;
#endif
switch (intf)
{
@ -2293,8 +2298,10 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
ainfo("ADC1 selected\n");
dev = &g_adcdev1;
cr_channels = channels - ADC1_INJECTED_CHAN;
#ifdef ADC_HAVE_INJECTED
cj_channels = ADC1_INJECTED_CHAN;
j_chanlist = (FAR uint8_t *)chanlist + cr_channels;
#endif
break;
}
#endif
@ -2304,8 +2311,10 @@ struct adc_dev_s *stm32_adcinitialize(int intf, FAR const uint8_t *chanlist,
ainfo("ADC2 selected\n");
dev = &g_adcdev2;
cr_channels = channels - ADC2_INJECTED_CHAN;
#ifdef ADC_HAVE_INJECTED
cj_channels = ADC2_INJECTED_CHAN;
j_chanlist = chanlist + cr_channels;
#endif
break;
}
#endif