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arm-m/barrier: fix green hills build ARM_ISB error

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according to armv6-m/armv7-m arch reference manual:
the three ISB {<opt>}, DSB {<opt>}, DMB {<opt>} instructions <opt>
field are defined as:
Specifies an optional limitation on the ISB/DSB/DMB operation. Allowered
values are:
Full system ISB/DSB/DMB operation, encoded as option=='1111'. Can be
omitted.
All other encodings of the options are RESERVED.
the "#opt" field of "isb #opt"

So we could remove the options field in Armv7-m platform.
The following are the build error with greenhills compiler:

CC:  common/arm_exit.c [asarm] (error #2071) /tmp/gh_001h70j1.si 92: bad parameter
  isb 15
------^

[asarm] (error #2071) /tmp/gh_001h70j1.si 112: bad parameter
  isb 15
------^

[asarm] (error) errors during processing

According to armv8-m arch reference manual:
the ISB/DMB instruction's "opt" encoding rule is same as
armv6-m/armv7-m, but the "DSB" instruction is different, in armv8-m, the
"DSB {<opt>}" field has two valid encoding options: 0b0000, 0b0100.
and all other encoding options are reserved.

In Armv7-a/Armv8-a, the dsb/dmb option field has 8 valid state value.

Signed-off-by: guoshichao <guoshichao@xiaomi.com>
This commit is contained in:
guoshichao 2024-06-19 15:20:30 +08:00 committed by Alan Carvalho de Assis
parent 6da525704d
commit 693e869404
6 changed files with 22 additions and 22 deletions
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12
arch/arm/src/armv6-m/barriers.h
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@ -31,12 +31,12 @@
/* ARMv6-M memory barriers */
#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
#define arm_dsb() __asm__ __volatile__ ("dsb " : : : "memory")
#define arm_isb() __asm__ __volatile__ ("isb " : : : "memory")
#define arm_dmb() __asm__ __volatile__ ("dmb " : : : "memory")
#define ARM_DSB() arm_dsb(15)
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#define ARM_DSB() arm_dsb()
#define ARM_ISB() arm_isb()
#define ARM_DMB() arm_dmb()
#endif /* __ARCH_ARM_SRC_ARMV6_M_BARRIERS_H */

4
arch/arm/src/armv7-a/barriers.h
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@ -31,15 +31,15 @@
/* ARMv7-A memory barriers */
#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
#define arm_isb() __asm__ __volatile__ ("isb " : : : "memory")
#define arm_nop() __asm__ __volatile__ ("nop\n")
#define arm_sev() __asm__ __volatile__ ("sev\n")
#define ARM_DSB() arm_dsb(15)
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#define ARM_ISB() arm_isb()
#define ARM_NOP() arm_nop()
#define ARM_SEV() arm_sev()

12
arch/arm/src/armv7-m/barriers.h
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@ -31,12 +31,12 @@
/* ARMv7-M memory barriers */
#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
#define arm_dsb() __asm__ __volatile__ ("dsb " : : : "memory")
#define arm_isb() __asm__ __volatile__ ("isb " : : : "memory")
#define arm_dmb() __asm__ __volatile__ ("dmb " : : : "memory")
#define ARM_DSB() arm_dsb(15)
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#define ARM_DSB() arm_dsb()
#define ARM_ISB() arm_isb()
#define ARM_DMB() arm_dmb()
#endif /* __ARCH_ARM_SRC_ARMV7_M_BARRIERS_H */

4
arch/arm/src/armv7-r/barriers.h
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@ -31,15 +31,15 @@
/* ARMv7-R memory barriers */
#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
#define arm_isb() __asm__ __volatile__ ("isb " : : : "memory")
#define arm_nop() __asm__ __volatile__ ("nop\n")
#define arm_sev() __asm__ __volatile__ ("sev\n")
#define ARM_DSB() arm_dsb(15)
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#define ARM_ISB() arm_isb()
#define ARM_NOP() arm_nop()
#define ARM_SEV() arm_sev()

8
arch/arm/src/armv8-m/barriers.h
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@ -31,12 +31,12 @@
/* ARMv8-M memory barriers */
#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
#define arm_isb() __asm__ __volatile__ ("isb " : : : "memory")
#define arm_dmb() __asm__ __volatile__ ("dmb " : : : "memory")
#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
#define ARM_ISB() arm_isb()
#define ARM_DMB() arm_dmb()
#define ARM_DSB() arm_dsb(15)
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#endif /* __ARCH_ARM_SRC_ARMV8_M_BARRIERS_H */

4
arch/arm/src/armv8-r/barriers.h
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@ -31,15 +31,15 @@
/* ARMv8-R memory barriers */
#define arm_isb(n) __asm__ __volatile__ ("isb " #n : : : "memory")
#define arm_dsb(n) __asm__ __volatile__ ("dsb " #n : : : "memory")
#define arm_dmb(n) __asm__ __volatile__ ("dmb " #n : : : "memory")
#define arm_isb() __asm__ __volatile__ ("isb " : : : "memory")
#define arm_nop() __asm__ __volatile__ ("nop\n")
#define arm_sev() __asm__ __volatile__ ("sev\n")
#define ARM_DSB() arm_dsb(15)
#define ARM_ISB() arm_isb(15)
#define ARM_DMB() arm_dmb(15)
#define ARM_ISB() arm_isb()
#define ARM_NOP() arm_nop()
#define ARM_SEV() arm_sev()