From 69e6e17407da5df34a46328d7314bbc68c8a613e Mon Sep 17 00:00:00 2001 From: Masayuki Ishikawa Date: Mon, 20 Feb 2023 16:42:01 +0900 Subject: [PATCH] arch: imxrt: Enable IMXRT_ENET_ENHANCEDBD if !ARMV7M_DCACHE_WRITETHROUGH Summary: - I noticed that there are two kinds of descriptors for imxrt_enet.c - The first one is the legacy descriptor and its size is 8bytes. - The second one is the enhanced descriptor and its size is 32bytes. - In both cases, we can not use a descriptor chain like stm32. - Considering cache line alignment, the second one is perfect because one descriptor fits the Cortex-M7 cache line which would fix networking stability issues in d-cache write-back mode. Impact: - imxrt ethernet in d-cache write-back mode Testing: - Tested with ixmrt1060-evk:netnsh_dcache_wb (will be added later) Signed-off-by: Masayuki Ishikawa --- arch/arm/src/imxrt/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/src/imxrt/Kconfig b/arch/arm/src/imxrt/Kconfig index ead7d7919d..5dc6c436cb 100644 --- a/arch/arm/src/imxrt/Kconfig +++ b/arch/arm/src/imxrt/Kconfig @@ -2070,7 +2070,8 @@ config IMXRT_ENET_NTXBUFFERS config IMXRT_ENET_ENHANCEDBD bool # not optional - default n + default n if ARMV7M_DCACHE_WRITETHROUGH + default y if !ARMV7M_DCACHE_WRITETHROUGH config IMXRT_ENET_NETHIFS int # Not optional