SAMV7 EMAC: Add conditional logic to account the fact that the SAMV71 has 6 rather than 3 queues after version 1.
This commit is contained in:
Ian McAfee
Gregory Nutt
parent
50fda0d748
commit
6a2c43b0c1
@ -86,6 +86,7 @@
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#include "cache.h"
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#include "chip/sam_pinmap.h"
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#include "chip/sam_chipid.h"
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#include "sam_gpio.h"
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#include "sam_periphclks.h"
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#include "sam_ethernet.h"
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@ -331,7 +332,19 @@
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#define EMAC_QUEUE_0 0
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#define EMAC_QUEUE_1 1
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#define EMAC_QUEUE_2 2
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#define EMAC_NQUEUES 3
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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/* After chip version 1, the SAMV71 increased from 3 to 6 queue */
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# define EMAC_QUEUE_3 3
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# define EMAC_QUEUE_4 4
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# define EMAC_QUEUE_5 5
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# define EMAC_NQUEUES (g_emac_nqueues)
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# define EMAC_MAX_NQUEUES 6
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#else
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# define EMAC_NQUEUES 3
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# define EMAC_MAX_NQUEUES 3
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#endif
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/* Interrupt settings */
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@ -537,7 +550,7 @@ struct sam_emac_s
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/* Transfer queues */
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struct sam_queue_s xfrq[EMAC_NQUEUES];
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struct sam_queue_s xfrq[EMAC_MAX_NQUEUES];
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/* Debug stuff */
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@ -924,6 +937,16 @@ static uint8_t g_pktbuf1[MAX_NET_DEV_MTU + CONFIG_NET_GUARDSIZE];
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/* EMAC1 peripheral state */
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static struct sam_emac_s g_emac1;
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#endif /* CONFIG_SAMV7_EMAC1 */
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/* The SAMV71 may support from 3 to 6 queue, depending upon the chip
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* revision. NOTE that this is a global setting and applies to both
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* EMAC peripherals.
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*/
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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static uint8_t g_emac_nqueues = 3;
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#endif
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/****************************************************************************
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@ -2677,6 +2700,16 @@ static int sam_ifup(struct net_driver_s *dev)
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sam_emac_configure(priv);
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sam_queue_configure(priv, EMAC_QUEUE_1);
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sam_queue_configure(priv, EMAC_QUEUE_2);
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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if (g_emac_nqueues > 3)
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{
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sam_queue_configure(priv, EMAC_QUEUE_3);
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sam_queue_configure(priv, EMAC_QUEUE_4);
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sam_queue_configure(priv, EMAC_QUEUE_5);
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}
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#endif
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sam_queue0_configure(priv);
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/* Set the MAC address (should have been configured while we were down) */
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@ -4540,10 +4573,28 @@ static void sam_emac_reset(struct sam_emac_s *priv)
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sam_rxreset(priv, EMAC_QUEUE_1);
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sam_rxreset(priv, EMAC_QUEUE_2);
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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if (g_emac_nqueues > 3)
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{
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sam_rxreset(priv, EMAC_QUEUE_3);
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sam_rxreset(priv, EMAC_QUEUE_4);
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sam_rxreset(priv, EMAC_QUEUE_5);
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}
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#endif
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sam_txreset(priv, EMAC_QUEUE_0);
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sam_txreset(priv, EMAC_QUEUE_1);
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sam_txreset(priv, EMAC_QUEUE_2);
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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if (g_emac_nqueues > 3)
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{
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sam_txreset(priv, EMAC_QUEUE_3);
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sam_txreset(priv, EMAC_QUEUE_4);
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sam_txreset(priv, EMAC_QUEUE_5);
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}
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#endif
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/* Disable Rx and Tx, plus the statistics registers. */
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regval = sam_getreg(priv, SAM_EMAC_NCR_OFFSET);
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@ -4561,10 +4612,28 @@ static void sam_emac_reset(struct sam_emac_s *priv)
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sam_rxreset(priv, EMAC_QUEUE_1);
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sam_rxreset(priv, EMAC_QUEUE_2);
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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if (g_emac_nqueues > 3)
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{
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sam_rxreset(priv, EMAC_QUEUE_3);
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sam_rxreset(priv, EMAC_QUEUE_4);
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sam_rxreset(priv, EMAC_QUEUE_5);
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}
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#endif
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sam_txreset(priv, EMAC_QUEUE_0);
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sam_txreset(priv, EMAC_QUEUE_1);
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sam_txreset(priv, EMAC_QUEUE_2);
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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if (g_emac_nqueues > 3)
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{
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sam_txreset(priv, EMAC_QUEUE_3);
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sam_txreset(priv, EMAC_QUEUE_4);
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sam_txreset(priv, EMAC_QUEUE_5);
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}
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#endif
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/* Make sure that RX and TX are disabled; clear statistics registers */
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sam_putreg(priv, SAM_EMAC_NCR_OFFSET, EMAC_NCR_CLRSTAT);
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@ -4875,12 +4944,36 @@ int sam_emac_initialize(int intf)
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{
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struct sam_emac_s *priv;
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const struct sam_emacattr_s *attr;
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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uint32_t regval;
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#endif
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uint8_t *pktbuf;
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#if defined(CONFIG_NETDEV_PHY_IOCTL) && defined(CONFIG_ARCH_PHY_INTERRUPT)
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uint8_t phytype;
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#endif
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int ret;
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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/* Determine if the chip has 3 or 6 queues. This logic is for the
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* V71 only -- if you are using a different chip in the family,
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* the version number at which to switch from 3 to 6 queues may
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* be different. For the V71, versions 1 and higher have 6 queues.
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*
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* If both emacs are enabled, this code will be run twice, which
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* should not be a problem as the result will be the same each time
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* it is run.
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*/
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regval = getreg32(SAM_CHIPID_CIDR);
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if ((regval & CHIPID_CIDR_ARCH_MASK) == CHIPID_CIDR_ARCH_SAMV71)
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{
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if (((regval & CHIPID_CIDR_VERSION_MASK) >> CHIPID_CIDR_VERSION_SHIFT) > 0)
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{
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g_emac_nqueues = 6;
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}
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}
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#endif
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#if defined(CONFIG_SAMV7_EMAC0)
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if (intf == EMAC0_INTF)
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{
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@ -128,7 +128,7 @@
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* See include/nuttx/net/telnet.h */
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/****************************************************************************
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* Pulbic Type Definitions
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* Public Type Definitions
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****************************************************************************/
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/* See include/net/if.h, include/net/route.h, and include/net/arp.h */
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