add littlefs support for gd32f450zk-eval board

This commit is contained in:
GD32-MCU 2023-04-01 16:32:13 +08:00 committed by Alan Carvalho de Assis
parent 2650fa9509
commit 6a799fef6c
6 changed files with 246 additions and 3 deletions

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@ -69,14 +69,14 @@
# define FMC_PROGMEM_SECTOR_SIZES {_K(16), _K(16), _K(16), _K(16)}
# define FMC_PROGMEM_SECTOR_NUM (4)
# define FMC_PROGMEM_SECTOR_SADDR (0x08100000)
# define FMC_PROGMEM_SECTOR_EADDR (0x0813FFFF)
# define FMC_PROGMEM_SECTOR_EADDR (0x0810FFFF)
# elif defined(CONFIG_GD32F4_FLASH_CONFIG_K)
# define FMC_PROGMEM_SECTOR_SIZES {_K(16), _K(16), _K(16), _K(16)}
# define FMC_PROGMEM_SECTOR_NUM (4)
# define FMC_PROGMEM_SECTOR_SADDR (0x08100000)
# define FMC_PROGMEM_SECTOR_EADDR (0x0813FFFF)
# define FMC_PROGMEM_SECTOR_EADDR (0x0810FFFF)
# endif

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@ -112,6 +112,13 @@ config GD32F450ZK_EVAL_GD25_NXFFS
a wear-leveling, NuttX FLASH file system (NXFFS). The downside of
NXFFS is that it can be very slow.
config GD32F450ZK_EVAL_GD25_LITTLEFS
bool "Create GD25 serial FLASH LFS file system"
depends on FS_LITTLEFS
---help---
Create the MTD driver for the GD25 and mount the GD25 device as
a wear-leveling, LittleFS FLASH file system (LFS).
endchoice # GD25 serial FLASH configuration
config GD32F450ZK_EVAL_AT24_TEST

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@ -0,0 +1,89 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="gd32f450zk-eval"
CONFIG_ARCH_BOARD_GD32F450ZK_EVAL=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="gd32f4"
CONFIG_ARCH_CHIP_GD32F450ZK=y
CONFIG_ARCH_CHIP_GD32F4=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_DEBUG_CUSTOMOPT=y
CONFIG_DEBUG_OPTLEVEL="-O0"
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ETH0_PHY_DP83848C=y
CONFIG_FS_LITTLEFS=y
CONFIG_FS_LITTLEFS_PROGRAM_SIZE_FACTOR=1
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_TMPFS=y
CONFIG_GD32F4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_GD32F4_ENETMAC=y
CONFIG_GD32F4_FLASH_CONFIG_K=y
CONFIG_GD32F4_FMC=y
CONFIG_GD32F4_MTD=y
CONFIG_GD32F4_PHY_SR=16
CONFIG_GD32F4_PHY_SR_100FD=0x0004
CONFIG_GD32F4_PHY_SR_100HD=0x0000
CONFIG_GD32F4_PHY_SR_10FD=0x0006
CONFIG_GD32F4_PHY_SR_10HD=0x0002
CONFIG_GD32F4_PHY_SR_ALTCONFIG=y
CONFIG_GD32F4_PHY_SR_ALTMODE=0x006
CONFIG_GD32F4_PROGMEM=y
CONFIG_GD32F4_RMII_EXTCLK=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETINIT_DRIPADDR=0x0a320301
CONFIG_NETINIT_IPADDR=0x0a320336
CONFIG_NETINIT_MACADDR_1=0x20304050
CONFIG_NETINIT_MACADDR_2=0x6080
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_DISCOVER=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ETH_PKTSIZE=1500
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_IGMP=y
CONFIG_NET_LOOPBACK=y
CONFIG_NET_ROUTE=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART0_SERIAL_CONSOLE=y

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@ -0,0 +1,93 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH="arm"
CONFIG_ARCH_BOARD="gd32f450zk-eval"
CONFIG_ARCH_BOARD_GD32F450ZK_EVAL=y
CONFIG_ARCH_BUTTONS=y
CONFIG_ARCH_CHIP="gd32f4"
CONFIG_ARCH_CHIP_GD32F450ZK=y
CONFIG_ARCH_CHIP_GD32F4=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=16717
CONFIG_BUILTIN=y
CONFIG_DEBUG_CUSTOMOPT=y
CONFIG_DEBUG_OPTLEVEL="-O0"
CONFIG_DEBUG_SYMBOLS=y
CONFIG_ETH0_PHY_DP83848C=y
CONFIG_FS_LITTLEFS=y
CONFIG_FS_PROCFS=y
CONFIG_FS_PROCFS_REGISTER=y
CONFIG_FS_TMPFS=y
CONFIG_GD25_SPIFREQUENCY=4000000
CONFIG_GD32F450ZK_EVAL_GD25_BLOCKMOUNT=y
CONFIG_GD32F450ZK_EVAL_GD25_LITTLEFS=y
CONFIG_GD32F4_168MHZ=y
CONFIG_GD32F4_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
CONFIG_GD32F4_ENETMAC=y
CONFIG_GD32F4_FLASH_CONFIG_K=y
CONFIG_GD32F4_PHY_SR=16
CONFIG_GD32F4_PHY_SR_100FD=0x0004
CONFIG_GD32F4_PHY_SR_100HD=0x0000
CONFIG_GD32F4_PHY_SR_10FD=0x0006
CONFIG_GD32F4_PHY_SR_10HD=0x0002
CONFIG_GD32F4_PHY_SR_ALTCONFIG=y
CONFIG_GD32F4_PHY_SR_ALTMODE=0x006
CONFIG_GD32F4_RMII_EXTCLK=y
CONFIG_GD32F4_SPI5=y
CONFIG_HAVE_CXX=y
CONFIG_HAVE_CXXINITIALIZE=y
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INTELHEX_BINARY=y
CONFIG_MM_REGIONS=2
CONFIG_MTD=y
CONFIG_MTD_BYTE_WRITE=y
CONFIG_MTD_GD25=y
CONFIG_NET=y
CONFIG_NETDB_DNSCLIENT=y
CONFIG_NETINIT_DRIPADDR=0x0a320301
CONFIG_NETINIT_IPADDR=0x0a320336
CONFIG_NETINIT_MACADDR_1=0x20304050
CONFIG_NETINIT_MACADDR_2=0x6080
CONFIG_NETINIT_NOMAC=y
CONFIG_NETUTILS_DISCOVER=y
CONFIG_NETUTILS_WEBCLIENT=y
CONFIG_NET_ARP_IPIN=y
CONFIG_NET_ARP_SEND=y
CONFIG_NET_BROADCAST=y
CONFIG_NET_ETH_PKTSIZE=1500
CONFIG_NET_ICMP=y
CONFIG_NET_ICMP_SOCKET=y
CONFIG_NET_IGMP=y
CONFIG_NET_LOOPBACK=y
CONFIG_NET_ROUTE=y
CONFIG_NET_STATISTICS=y
CONFIG_NET_TCP=y
CONFIG_NET_UDP=y
CONFIG_NET_UDP_CHECKSUMS=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=512
CONFIG_NSH_LINELEN=64
CONFIG_NSH_READLINE=y
CONFIG_PREALLOC_TIMERS=4
CONFIG_RAM_SIZE=114688
CONFIG_RAM_START=0x20000000
CONFIG_RAW_BINARY=y
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_HPWORK=y
CONFIG_SCHED_LPWORK=y
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=6
CONFIG_START_MONTH=12
CONFIG_START_YEAR=2011
CONFIG_SYSTEM_DHCPC_RENEW=y
CONFIG_SYSTEM_NSH=y
CONFIG_SYSTEM_PING=y
CONFIG_TASK_NAME_SIZE=0
CONFIG_USART0_SERIAL_CONSOLE=y

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@ -104,7 +104,7 @@ int board_app_initialize(uintptr_t arg)
}
#endif
#ifdef CONFIG_FS_NXFFS
#ifndef CONFIG_DISABLE_MOUNTPOINT
# ifdef CONFIG_GD32F4_PROGMEM
@ -118,6 +118,7 @@ int board_app_initialize(uintptr_t arg)
syslog(LOG_ERR, "ERROR: progmem_initialize failed\n");
}
# if defined(CONFIG_FS_NXFFS)
/* Initialize to provide NXFFS on the MTD interface */
ret = nxffs_initialize(mtd);
@ -135,7 +136,33 @@ int board_app_initialize(uintptr_t arg)
syslog(LOG_ERR, "ERROR: Failed to mount the NXFFS volume: %d\n",
ret);
}
# elif defined(CONFIG_FS_LITTLEFS)
/* Initialize to provide LittleFS on the MTD interface */
ret = register_mtddriver("/dev/fmc", mtd, 0755, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret);
return ret;
}
/* Mount the file system at /mnt/fmc */
ret = nx_mount("/dev/fmc", "/mnt/fmc", "littlefs", 0, NULL);
if (ret < 0)
{
ret = nx_mount("/dev/fmc", "/mnt/fmc", "littlefs", 0,
"forceformat");
if (ret < 0)
{
ferr("ERROR: Failed to mount the FS volume: %d\n", ret);
return ret;
}
}
syslog(LOG_INFO, "INFO: LittleFS volume /mnt/fmc mount " \
"on chip flash success: %d\n", ret);
# endif
# endif
# ifdef HAVE_GD25

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@ -122,6 +122,33 @@ int gd32_gd25_automount(int minor)
syslog(LOG_INFO, "INFO: NXFFS volume /mnt/gd25 mount \
spi flash success: %d\n", ret);
#elif defined(CONFIG_GD32F450ZK_EVAL_GD25_LITTLEFS)
/* Initialize to provide LittleFS on the MTD interface */
ret = register_mtddriver("/dev/spiflash", mtd, 0755, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to register MTD: %d\n", ret);
return ret;
}
/* Mount the file system at /mnt/gd25 */
ret = nx_mount("/dev/spiflash", "/mnt/gd25", "littlefs", 0, NULL);
if (ret < 0)
{
ret = nx_mount("/dev/spiflash", "/mnt/gd25", "littlefs", 0,
"forceformat");
if (ret < 0)
{
ferr("ERROR: Failed to mount the FS volume: %d\n", ret);
return ret;
}
}
syslog(LOG_INFO, "INFO: LittleFS volume /mnt/gd25 mount \
spi flash success: %d\n", ret);
#endif
/* Now we are initialized */