imxrt:Serial refactor out tx dma semaphore
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@ -760,7 +760,6 @@ struct imxrt_uart_s
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#ifdef SERIAL_HAVE_TXDMA
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const unsigned int dma_txreqsrc; /* DMAMUX source of TX DMA request */
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DMACH_HANDLE txdma; /* currently-open trasnmit DMA stream */
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sem_t txdmasem; /* Indicate TX DMA completion */
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#endif
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/* RX DMA state */
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@ -1062,7 +1061,7 @@ static char g_lpuart8rxbuffer[CONFIG_LPUART8_RXBUFSIZE];
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static char g_lpuart8txbuffer[LPUART8_TXBUFSIZE_ADJUSTED] \
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LPUART8_TXBUFSIZE_ALGN;
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#endif
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#ifdef CONFIG_IMXRT_LPUART9
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static char g_lpuart9rxbuffer[CONFIG_LPUART9_RXBUFSIZE];
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static char g_lpuart9txbuffer[LPUART9_TXBUFSIZE_ADJUSTED]
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@ -1148,7 +1147,6 @@ static struct imxrt_uart_s g_lpuart1priv =
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# ifdef CONFIG_LPUART1_TXDMA
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.dma_txreqsrc = IMXRT_DMACHAN_LPUART1_TX,
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.txdmasem = SEM_INITIALIZER(1),
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# endif
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# ifdef CONFIG_LPUART1_RXDMA
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.dma_rxreqsrc = IMXRT_DMACHAN_LPUART1_RX,
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@ -1217,7 +1215,6 @@ static struct imxrt_uart_s g_lpuart2priv =
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# ifdef CONFIG_LPUART2_TXDMA
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.dma_txreqsrc = IMXRT_DMACHAN_LPUART2_TX,
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.txdmasem = SEM_INITIALIZER(1),
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# endif
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# ifdef CONFIG_LPUART2_RXDMA
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.dma_rxreqsrc = IMXRT_DMACHAN_LPUART2_RX,
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@ -1284,7 +1281,6 @@ static struct imxrt_uart_s g_lpuart3priv =
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# ifdef CONFIG_LPUART3_TXDMA
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.dma_txreqsrc = IMXRT_DMACHAN_LPUART3_TX,
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.txdmasem = SEM_INITIALIZER(1),
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# endif
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# ifdef CONFIG_LPUART3_RXDMA
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.dma_rxreqsrc = IMXRT_DMACHAN_LPUART3_RX,
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@ -1351,7 +1347,6 @@ static struct imxrt_uart_s g_lpuart4priv =
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# ifdef CONFIG_LPUART4_TXDMA
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.dma_txreqsrc = IMXRT_DMACHAN_LPUART4_TX,
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.txdmasem = SEM_INITIALIZER(1),
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# endif
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# ifdef CONFIG_LPUART4_RXDMA
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.dma_rxreqsrc = IMXRT_DMACHAN_LPUART4_RX,
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@ -1418,7 +1413,6 @@ static struct imxrt_uart_s g_lpuart5priv =
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# ifdef CONFIG_LPUART5_TXDMA
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.dma_txreqsrc = IMXRT_DMACHAN_LPUART5_TX,
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.txdmasem = SEM_INITIALIZER(1),
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# endif
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# ifdef CONFIG_LPUART5_RXDMA
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.dma_rxreqsrc = IMXRT_DMACHAN_LPUART5_RX,
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@ -1485,7 +1479,6 @@ static struct imxrt_uart_s g_lpuart6priv =
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# ifdef CONFIG_LPUART6_TXDMA
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.dma_txreqsrc = IMXRT_DMACHAN_LPUART6_TX,
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.txdmasem = SEM_INITIALIZER(1),
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# endif
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# ifdef CONFIG_LPUART6_RXDMA
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.dma_rxreqsrc = IMXRT_DMACHAN_LPUART6_RX,
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@ -1552,7 +1545,6 @@ static struct imxrt_uart_s g_lpuart7priv =
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# ifdef CONFIG_LPUART7_TXDMA
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.dma_txreqsrc = IMXRT_DMACHAN_LPUART7_TX,
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.txdmasem = SEM_INITIALIZER(1),
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# endif
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# ifdef CONFIG_LPUART7_RXDMA
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.dma_rxreqsrc = IMXRT_DMACHAN_LPUART7_RX,
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@ -1619,7 +1611,6 @@ static struct imxrt_uart_s g_lpuart8priv =
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# ifdef CONFIG_LPUART8_TXDMA
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.dma_txreqsrc = IMXRT_DMACHAN_LPUART8_TX,
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.txdmasem = SEM_INITIALIZER(1),
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# endif
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# ifdef CONFIG_LPUART8_RXDMA
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.dma_rxreqsrc = IMXRT_DMACHAN_LPUART8_RX,
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@ -3095,8 +3086,9 @@ static bool imxrt_dma_rxavailable(struct uart_dev_s *dev)
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* Name: imxrt_dma_txcallback
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*
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* Description:
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* This function clears dma buffer at complete of DMA transfer and wakes up
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* threads waiting for space in buffer.
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* This function clears dma buffer at completion of DMA transfer. It wakes
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* up threads waiting for space in buffer and restarts the DMA if there is
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* more data to send.
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*
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****************************************************************************/
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@ -3105,19 +3097,20 @@ static void imxrt_dma_txcallback(DMACH_HANDLE handle, void *arg, bool done,
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int result)
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{
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struct imxrt_uart_s *priv = (struct imxrt_uart_s *)arg;
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/* Update 'nbytes' indicating number of bytes actually transferred by DMA.
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* This is important to free TX buffer space by 'uart_xmitchars_done'.
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*/
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priv->dev.dmatx.nbytes = priv->dev.dmatx.length + priv->dev.dmatx.nlength;
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/* Adjust the pointers */
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/* Adjust the pointers and unblock writers */
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uart_xmitchars_done(&priv->dev);
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/* Release waiter */
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/* Send more data if available */
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nxsem_post(&priv->txdmasem);
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imxrt_dma_txavailable(&priv->dev);
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}
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#endif
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@ -3136,9 +3129,7 @@ static void imxrt_dma_txavailable(struct uart_dev_s *dev)
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/* Only send when the DMA is idle */
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int rv = nxsem_trywait(&priv->txdmasem);
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if (rv == 0)
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if (imxrt_dmach_idle(priv->txdma) == 0)
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{
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uart_xmitchars_dma(dev);
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}
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