imxrt: Correctly update PLL, bit has to toggled instead of being set
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c641148bc4
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6b79aea0cf
@ -412,22 +412,22 @@ static void imxrt_pll2_pfd(void)
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if (g_initial_clkconfig.sys_pll2.pfd0 > 0)
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if (g_initial_clkconfig.sys_pll2.pfd0 > 0)
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{
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{
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reg |= ANADIG_PLL_SYS_PLL2_UPDATE_PFD0_UPDATE;
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reg ^= ANADIG_PLL_SYS_PLL2_UPDATE_PFD0_UPDATE;
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}
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}
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if (g_initial_clkconfig.sys_pll2.pfd1 > 0)
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if (g_initial_clkconfig.sys_pll2.pfd1 > 0)
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{
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{
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reg |= ANADIG_PLL_SYS_PLL2_UPDATE_PFD1_UPDATE;
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reg ^= ANADIG_PLL_SYS_PLL2_UPDATE_PFD1_UPDATE;
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}
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}
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if (g_initial_clkconfig.sys_pll2.pfd2 > 0)
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if (g_initial_clkconfig.sys_pll2.pfd2 > 0)
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{
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{
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reg |= ANADIG_PLL_SYS_PLL2_UPDATE_PFD2_UPDATE;
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reg ^= ANADIG_PLL_SYS_PLL2_UPDATE_PFD2_UPDATE;
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}
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}
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if (g_initial_clkconfig.sys_pll2.pfd3 > 0)
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if (g_initial_clkconfig.sys_pll2.pfd3 > 0)
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{
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{
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reg |= ANADIG_PLL_SYS_PLL2_UPDATE_PFD3_UPDATE;
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reg ^= ANADIG_PLL_SYS_PLL2_UPDATE_PFD3_UPDATE;
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}
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}
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putreg32(reg, IMXRT_ANADIG_PLL_SYS_PLL2_UPDATE);
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putreg32(reg, IMXRT_ANADIG_PLL_SYS_PLL2_UPDATE);
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