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STM32: Add IAR-style STM32F1xx vectors. Tested on STM32F103RB and STM32F107RC.

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This commit is contained in:
Aleksandr Vyhovanec 2016-08-24 10:10:33 -06:00 committed by Gregory Nutt
parent 221fcfd8f1
commit 6bc952a2cc
1 changed files with 392 additions and 3 deletions
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395
arch/arm/src/stm32/iar/stm32_vectors.S
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@ -176,7 +176,207 @@ __vector_table:
#if defined(CONFIG_STM32_STM32L15XX)
# include "chip/stm32l15xxx_vectors.h"
#elif defined(CONFIG_STM32_STM32F10XX)
# include "chip/stm32f10xxx_vectors.h"
# if defined(CONFIG_STM32_VALUELINE)
DCD stm32_wwdg /* Vector 16+0: Window Watchdog interrupt */
DCD stm32_pvd /* Vector 16+1: PVD through EXTI Line detection interrupt */
DCD stm32_tamper /* Vector 16+2: Tamper interrupt */
DCD stm32_rtc /* Vector 16+3: RTC Wakeup through EXTI line interrupt */
DCD stm32_flash /* Vector 16+4: Flash global interrupt */
DCD stm32_rcc /* Vector 16+5: RCC global interrupt */
DCD stm32_exti0 /* Vector 16+6: EXTI Line 0 interrupt */
DCD stm32_exti1 /* Vector 16+7: EXTI Line 1 interrupt */
DCD stm32_exti2 /* Vector 16+8: EXTI Line 2 interrupt */
DCD stm32_exti3 /* Vector 16+9: EXTI Line 3 interrupt */
DCD stm32_exti4 /* Vector 16+10: EXTI Line 4 interrupt */
DCD stm32_dma1ch1 /* Vector 16+11: DMA1 Channel 1 global interrupt */
DCD stm32_dma1ch2 /* Vector 16+12: DMA1 Channel 2 global interrupt */
DCD stm32_dma1ch3 /* Vector 16+13: DMA1 Channel 3 global interrupt */
DCD stm32_dma1ch4 /* Vector 16+14: DMA1 Channel 4 global interrupt */
DCD stm32_dma1ch5 /* Vector 16+15: DMA1 Channel 5 global interrupt */
DCD stm32_dma1ch6 /* Vector 16+16: DMA1 Channel 6 global interrupt */
DCD stm32_dma1ch7 /* Vector 16+17: DMA1 Channel 7 global interrupt */
DCD stm32_adc1 /* Vector 16+18: ADC1 global interrupt */
DCD stm32_reserved /* Vector 16+19: Reserved 0 */
DCD stm32_reserved /* Vector 16+20: Reserved 1 */
DCD stm32_reserved /* Vector 16+21: Reserved 2 */
DCD stm32_reserved /* Vector 16+22: Reserved 3 */
DCD stm32_exti95 /* Vector 16+23: EXTI Line[9:5] interrupts */
DCD stm32_tim1brk /* Vector 16+24: TIM1 Break interrupt; TIM15 global interrupt */
DCD stm32_tim1up /* Vector 16+25: TIM1 Update interrupt; TIM16 global interrupt */
DCD stm32_tim1trgcom /* Vector 16+26: TIM1 Trigger and Commutation interrupts; TIM17 global interrupt */
DCD stm32_tim1cc /* Vector 16+27: TIM1 Capture Compare interrupt */
DCD stm32_tim2 /* Vector 16+28: TIM2 global interrupt */
DCD stm32_tim3 /* Vector 16+29: TIM3 global interrupt */
DCD stm32_tim4 /* Vector 16+30: TIM4 global interrupt */
DCD stm32_i2c1ev /* Vector 16+31: I2C1 event interrupt */
DCD stm32_i2c1er /* Vector 16+32: I2C1 error interrupt */
DCD stm32_i2c2ev /* Vector 16+33: I2C2 event interrupt */
DCD stm32_i2c2er /* Vector 16+34: I2C2 error interrupt */
DCD stm32_spi1 /* Vector 16+35: SPI1 global interrupt */
DCD stm32_spi2 /* Vector 16+36: SPI2 global interrupt */
DCD stm32_usart1 /* Vector 16+37: USART1 global interrupt */
DCD stm32_usart2 /* Vector 16+38: USART2 global interrupt */
DCD stm32_usart3 /* Vector 16+39: USART3 global interrupt */
DCD stm32_exti1510 /* Vector 16+40: EXTI Line[15:10] interrupts */
DCD stm32_rtcalr /* Vector 16+41: RTC alarms (A and B) through EXTI line interrupt */
DCD stm32_cec /* Vector 16+42: CEC global interrupt */
DCD stm32_tim12 /* Vector 16+43: TIM12 global interrupt */
DCD stm32_tim13 /* Vector 16+44: TIM13 global interrupt */
DCD stm32_tim14 /* Vector 16+45: TIM14 global interrupt */
DCD stm32_reserved /* Vector 16+46: Reserved 4 */
DCD stm32_reserved /* Vector 16+47: Reserved 5 */
DCD stm32_fsmc /* Vector 16+48: FSMC global interrupt */
DCD stm32_reserved /* Vector 16+49: Reserved 6 */
DCD stm32_tim5 /* Vector 16+50: TIM5 global interrupt */
DCD stm32_spi3 /* Vector 16+51: SPI3 global interrupt */
DCD stm32_uart4 /* Vector 16+52: USART2 global interrupt */
DCD stm32_uart5 /* Vector 16+53: UART5 global interrupt */
DCD stm32_tim6 /* Vector 16+54: TIM6 global interrupt */
DCD stm32_tim7 /* Vector 16+55: TIM7 global interrupt */
DCD stm32_dma2ch1 /* Vector 16+56: DMA2 Channel 1 global interrupt */
DCD stm32_dma2ch2 /* Vector 16+57: DMA2 Channel 2 global interrupt */
DCD stm32_dma2ch3 /* Vector 16+58: DMA2 Channel 3 global interrupt */
DCD stm32_dma2ch45 /* Vector 16+59: DMA2 Channel 4 and 5 global interrupt */
DCD stm32_dma2ch5 /* Vector 16+60: DMA2 Channel 5 global interrupt */
# elif defined(CONFIG_STM32_CONNECTIVITYLINE)
DCD stm32_wwdg /* Vector 16+0: Window Watchdog interrupt */
DCD stm32_pvd /* Vector 16+1: PVD through EXTI Line detection interrupt */
DCD stm32_tamper /* Vector 16+2: Tamper interrupt */
DCD stm32_rtc /* Vector 16+3: RTC global interrupt */
DCD stm32_flash /* Vector 16+4: Flash global interrupt */
DCD stm32_rcc /* Vector 16+5: RCC global interrupt */
DCD stm32_exti0 /* Vector 16+6: EXTI Line 0 interrupt */
DCD stm32_exti1 /* Vector 16+7: EXTI Line 1 interrupt */
DCD stm32_exti2 /* Vector 16+8: EXTI Line 2 interrupt */
DCD stm32_exti3 /* Vector 16+9: EXTI Line 3 interrupt */
DCD stm32_exti4 /* Vector 16+10: EXTI Line 4 interrupt */
DCD stm32_dma1ch1 /* Vector 16+11: DMA1 Channel 1 global interrupt */
DCD stm32_dma1ch2 /* Vector 16+12: DMA1 Channel 2 global interrupt */
DCD stm32_dma1ch3 /* Vector 16+13: DMA1 Channel 3 global interrupt */
DCD stm32_dma1ch4 /* Vector 16+14: DMA1 Channel 4 global interrupt */
DCD stm32_dma1ch5 /* Vector 16+15: DMA1 Channel 5 global interrupt */
DCD stm32_dma1ch6 /* Vector 16+16: DMA1 Channel 6 global interrupt */
DCD stm32_dma1ch7 /* Vector 16+17: DMA1 Channel 7 global interrupt */
DCD stm32_adc12 /* Vector 16+18: ADC1 and ADC2 global interrupt */
DCD stm32_can1tx /* Vector 16+19: CAN1 TX interrupts */
DCD stm32_can1rx0 /* Vector 16+20: CAN1 RX0 interrupts */
DCD stm32_can1rx /* Vector 16+21: CAN1 RX1 interrupt */
DCD stm32_can1sce /* Vector 16+22: CAN1 SCE interrupt */
DCD stm32_exti95 /* Vector 16+23: EXTI Line[9:5] interrupts */
DCD stm32_tim1brk /* Vector 16+24: TIM1 Break interrupt */
DCD stm32_tim1up /* Vector 16+25: TIM1 Update interrupt */
DCD stm32_tim1trgcom /* Vector 16+26: TIM1 Trigger and Commutation interrupts */
DCD stm32_tim1cc /* Vector 16+27: TIM1 Capture Compare interrupt */
DCD stm32_tim2 /* Vector 16+28: TIM2 global interrupt */
DCD stm32_tim3 /* Vector 16+29: TIM3 global interrupt */
DCD stm32_tim4 /* Vector 16+30: TIM4 global interrupt */
DCD stm32_i2c1ev /* Vector 16+31: I2C1 event interrupt */
DCD stm32_i2c1er /* Vector 16+32: I2C1 error interrupt */
DCD stm32_i2c2ev /* Vector 16+33: I2C2 event interrupt */
DCD stm32_i2c2er /* Vector 16+34: I2C2 error interrupt */
DCD stm32_spi1 /* Vector 16+35: SPI1 global interrupt */
DCD stm32_spi2 /* Vector 16+36: SPI2 global interrupt */
DCD stm32_usart1 /* Vector 16+37: USART1 global interrupt */
DCD stm32_usart2 /* Vector 16+38: USART2 global interrupt */
DCD stm32_usart3 /* Vector 16+39: USART3 global interrupt */
DCD stm32_exti1510 /* Vector 16+40: EXTI Line[15:10] interrupts */
DCD stm32_rtcalr /* Vector 16+41: RTC alarm through EXTI line interrupt */
DCD stm32_otgfswkup /* Vector 16+42: USB On-The-Go FS Wakeup through EXTI line interrupt */
DCD stm32_reserved /* Vector 16+43: Reserved 0 */
DCD stm32_reserved /* Vector 16+44: Reserved 1 */
DCD stm32_reserved /* Vector 16+45: Reserved 2 */
DCD stm32_reserved /* Vector 16+46: Reserved 3 */
DCD stm32_reserved /* Vector 16+47: Reserved 4 */
DCD stm32_reserved /* Vector 16+48: Reserved 5 */
DCD stm32_reserved /* Vector 16+49: Reserved 6 */
DCD stm32_tim5 /* Vector 16+50: TIM5 global interrupt */
DCD stm32_spi3 /* Vector 16+51: SPI3 global interrupt */
DCD stm32_uart4 /* Vector 16+52: UART4 global interrupt */
DCD stm32_uart5 /* Vector 16+53: UART5 global interrupt */
DCD stm32_tim6 /* Vector 16+54: TIM6 global interrupt */
DCD stm32_tim7 /* Vector 16+55: TIM7 global interrupt */
DCD stm32_dma2ch1 /* Vector 16+56: DMA2 Channel 1 global interrupt */
DCD stm32_dma2ch2 /* Vector 16+57: DMA2 Channel 2 global interrupt */
DCD stm32_dma2ch3 /* Vector 16+58: DMA2 Channel 3 global interrupt */
DCD stm32_dma2ch4 /* Vector 16+59: DMA2 Channel 4 global interrupt */
DCD stm32_dma2ch5 /* Vector 16+60: DMA2 Channel 5 global interrupt */
DCD stm32_eth /* Vector 16+61: Ethernet global interrupt */
DCD stm32_ethwkup /* Vector 16+62: Ethernet Wakeup through EXTI line interrupt */
DCD stm32_can2tx /* Vector 16+63: CAN2 TX interrupts */
DCD stm32_can2rx0 /* Vector 16+64: CAN2 RX0 interrupts */
DCD stm32_can2rx1 /* Vector 16+65: CAN2 RX1 interrupt */
DCD stm32_can2sce /* Vector 16+66: CAN2 SCE interrupt */
DCD stm32_otgfs /* Vector 16+67: USB On The Go FS global interrupt */
# else /* CONFIG_STM32_CONNECTIVITYLINE */
DCD stm32_wwdg /* Vector 16+0: Window Watchdog interrupt */
DCD stm32_pvd /* Vector 16+1: PVD through EXTI Line detection interrupt */
DCD stm32_tamper /* Vector 16+2: Tamper interrupt */
DCD stm32_rtc /* Vector 16+3: RTC global interrupt */
DCD stm32_flash /* Vector 16+4: Flash global interrupt */
DCD stm32_rcc /* Vector 16+5: RCC global interrupt */
DCD stm32_exti0 /* Vector 16+6: EXTI Line 0 interrupt */
DCD stm32_exti1 /* Vector 16+7: EXTI Line 1 interrupt */
DCD stm32_exti2 /* Vector 16+8: EXTI Line 2 interrupt */
DCD stm32_exti3 /* Vector 16+9: EXTI Line 3 interrupt */
DCD stm32_exti4 /* Vector 16+10: EXTI Line 4 interrupt */
DCD stm32_dma1ch1 /* Vector 16+11: DMA1 Channel 1 global interrupt */
DCD stm32_dma1ch2 /* Vector 16+12: DMA1 Channel 2 global interrupt */
DCD stm32_dma1ch3 /* Vector 16+13: DMA1 Channel 3 global interrupt */
DCD stm32_dma1ch4 /* Vector 16+14: DMA1 Channel 4 global interrupt */
DCD stm32_dma1ch5 /* Vector 16+15: DMA1 Channel 5 global interrupt */
DCD stm32_dma1ch6 /* Vector 16+16: DMA1 Channel 6 global interrupt */
DCD stm32_dma1ch7 /* Vector 16+17: DMA1 Channel 7 global interrupt */
DCD stm32_adc12 /* Vector 16+18: ADC1 and ADC2 global interrupt */
DCD stm32_usbhpcantx /* Vector 16+19: USB High Priority or CAN TX interrupts*/
DCD stm32_usblpcanrx0 /* Vector 16+20: USB Low Priority or CAN RX0 interrupts*/
DCD stm32_can1rx1 /* Vector 16+21: CAN1 RX1 interrupt */
DCD stm32_can1sce /* Vector 16+22: CAN1 SCE interrupt */
DCD stm32_exti95 /* Vector 16+23: EXTI Line[9:5] interrupts */
DCD stm32_tim1brk /* Vector 16+24: TIM1 Break interrupt */
DCD stm32_tim1up /* Vector 16+25: TIM1 Update interrupt */
DCD stm32_tim1rtgcom /* Vector 16+26: TIM1 Trigger and Commutation interrupts */
DCD stm32_tim1cc /* Vector 16+27: TIM1 Capture Compare interrupt */
DCD stm32_tim2 /* Vector 16+28: TIM2 global interrupt */
DCD stm32_tim3 /* Vector 16+29: TIM3 global interrupt */
DCD stm32_tim4 /* Vector 16+30: TIM4 global interrupt */
DCD stm32_i2c1ev /* Vector 16+31: I2C1 event interrupt */
DCD stm32_i2c1er /* Vector 16+32: I2C1 error interrupt */
DCD stm32_i2c2ev /* Vector 16+33: I2C2 event interrupt */
DCD stm32_i2c2er /* Vector 16+34: I2C2 error interrupt */
DCD stm32_spi1 /* Vector 16+35: SPI1 global interrupt */
DCD stm32_spi2 /* Vector 16+36: SPI2 global interrupt */
DCD stm32_usart1 /* Vector 16+37: USART1 global interrupt */
DCD stm32_usart2 /* Vector 16+38: USART2 global interrupt */
DCD stm32_usart3 /* Vector 16+39: USART3 global interrupt */
DCD stm32_exti1510 /* Vector 16+40: EXTI Line[15:10] interrupts */
DCD stm32_rtcalr /* Vector 16+41: RTC alarm through EXTI line interrupt */
DCD stm32_usbwkup /* Vector 16+42: USB wakeup from suspend through EXTI line interrupt*/
DCD stm32_tim8brk /* Vector 16+43: TIM8 Break interrupt */
DCD stm32_tim8up /* Vector 16+44: TIM8 Update interrupt */
DCD stm32_tim8trgcom /* Vector 16+45: TIM8 Trigger and Commutation interrupts */
DCD stm32_tim8cc /* Vector 16+46: TIM8 Capture Compare interrupt */
DCD stm32_adc3 /* Vector 16+47: ADC3 global interrupt */
DCD stm32_fsmc /* Vector 16+48: FSMC global interrupt */
DCD stm32_sdio /* Vector 16+49: SDIO global interrupt */
DCD stm32_tim5 /* Vector 16+50: TIM5 global interrupt */
DCD stm32_spi3 /* Vector 16+51: SPI3 global interrupt */
DCD stm32_uart4 /* Vector 16+52: UART4 global interrupt */
DCD stm32_uart5 /* Vector 16+53: UART5 global interrupt */
DCD stm32_tim6 /* Vector 16+54: TIM6 global interrupt */
DCD stm32_tim7 /* Vector 16+55: TIM7 global interrupt */
DCD stm32_dma2ch1 /* Vector 16+56: DMA2 Channel 1 global interrupt */
DCD stm32_dma2ch2 /* Vector 16+57: DMA2 Channel 2 global interrupt */
DCD stm32_dma2ch3 /* Vector 16+58: DMA2 Channel 3 global interrupt */
DCD stm32_dma2ch45 /* Vector 16+59: DMA2 Channel 4&5 global interrupt */
# endif /* CONFIG_STM32_CONNECTIVITYLINE */
#elif defined(CONFIG_STM32_STM32F20XX)
DCD stm32_wwdg /* Vector 16+0: Window Watchdog interrupt */
DCD stm32_pvd /* Vector 16+1: PVD through EXTI Line detection interrupt */
@ -278,7 +478,7 @@ __vector_table:
* .text
************************************************************************************/
SECTION .text:CODE:NOROOT(2)
SECTION .text:CODE:NOROOT(8)
handlers:
HANDLER stm32_reserved, STM32_IRQ_RESERVED /* Unexpected/reserved vector */
@ -304,8 +504,196 @@ handlers:
#if defined(CONFIG_STM32_STM32L15XX)
# include "chip/stm32l15xxx_vectors.h"
#elif defined(CONFIG_STM32_STM32F10XX)
# include "chip/stm32f10xxx_vectors.h"
# if defined(CONFIG_STM32_VALUELINE)
HANDLER stm32_wwdg, STM32_IRQ_WWDG /* Vector 16+0: Window Watchdog interrupt */
HANDLER stm32_pvd, STM32_IRQ_PVD /* Vector 16+1: PVD through EXTI Line detection interrupt */
HANDLER stm32_tamper, STM32_IRQ_TAMPER /* Vector 16+2: Tamper interrupt */
HANDLER stm32_rtc, STM32_IRQ_RTC /* Vector 16+3: RTC Wakeup through EXTI line interrupt */
HANDLER stm32_flash, STM32_IRQ_FLASH /* Vector 16+4: Flash global interrupt */
HANDLER stm32_rcc, STM32_IRQ_RCC /* Vector 16+5: RCC global interrupt */
HANDLER stm32_exti0, STM32_IRQ_EXTI0 /* Vector 16+6: EXTI Line 0 interrupt */
HANDLER stm32_exti1, STM32_IRQ_EXTI1 /* Vector 16+7: EXTI Line 1 interrupt */
HANDLER stm32_exti2, STM32_IRQ_EXTI2 /* Vector 16+8: EXTI Line 2 interrupt */
HANDLER stm32_exti3, STM32_IRQ_EXTI3 /* Vector 16+9: EXTI Line 3 interrupt */
HANDLER stm32_exti4, STM32_IRQ_EXTI4 /* Vector 16+10: EXTI Line 4 interrupt */
HANDLER stm32_dma1ch1, STM32_IRQ_DMA1CH1 /* Vector 16+11: DMA1 Channel 1 global interrupt */
HANDLER stm32_dma1ch2, STM32_IRQ_DMA1CH2 /* Vector 16+12: DMA1 Channel 2 global interrupt */
HANDLER stm32_dma1ch3, STM32_IRQ_DMA1CH3 /* Vector 16+13: DMA1 Channel 3 global interrupt */
HANDLER stm32_dma1ch4, STM32_IRQ_DMA1CH4 /* Vector 16+14: DMA1 Channel 4 global interrupt */
HANDLER stm32_dma1ch5, STM32_IRQ_DMA1CH5 /* Vector 16+15: DMA1 Channel 5 global interrupt */
HANDLER stm32_dma1ch6, STM32_IRQ_DMA1CH6 /* Vector 16+16: DMA1 Channel 6 global interrupt */
HANDLER stm32_dma1ch7, STM32_IRQ_DMA1CH7 /* Vector 16+17: DMA1 Channel 7 global interrupt */
HANDLER stm32_adc1, STM32_IRQ_ADC1 /* Vector 16+18: ADC1 global interrupt */
HANDLER stm32_exti95, STM32_IRQ_EXTI95 /* Vector 16+23: EXTI Line[9:5] interrupts */
HANDLER stm32_tim1brk, STM32_IRQ_TIM1BRK /* Vector 16+24: TIM1 Break interrupt; TIM15 global interrupt */
HANDLER stm32_tim1up, STM32_IRQ_TIM1UP /* Vector 16+25: TIM1 Update interrupt; TIM16 global interrupt */
HANDLER stm32_tim1trgcom, STM32_IRQ_TIM1TRGCOM /* Vector 16+26: TIM1 Trigger and Commutation interrupts; TIM17 global interrupt */
HANDLER stm32_tim1cc, STM32_IRQ_TIM1CC /* Vector 16+27: TIM1 Capture Compare interrupt */
HANDLER stm32_tim2, STM32_IRQ_TIM2 /* Vector 16+28: TIM2 global interrupt */
HANDLER stm32_tim3, STM32_IRQ_TIM3 /* Vector 16+29: TIM3 global interrupt */
HANDLER stm32_tim4, STM32_IRQ_TIM4 /* Vector 16+30: TIM4 global interrupt */
HANDLER stm32_i2c1ev, STM32_IRQ_I2C1EV /* Vector 16+31: I2C1 event interrupt */
HANDLER stm32_i2c1er, STM32_IRQ_I2C1ER /* Vector 16+32: I2C1 error interrupt */
HANDLER stm32_i2c2ev, STM32_IRQ_I2C2EV /* Vector 16+33: I2C2 event interrupt */
HANDLER stm32_i2c2er, STM32_IRQ_I2C2ER /* Vector 16+34: I2C2 error interrupt */
HANDLER stm32_spi1, STM32_IRQ_SPI1 /* Vector 16+35: SPI1 global interrupt */
HANDLER stm32_spi2, STM32_IRQ_SPI2 /* Vector 16+36: SPI2 global interrupt */
HANDLER stm32_usart1, STM32_IRQ_USART1 /* Vector 16+37: USART1 global interrupt */
HANDLER stm32_usart2, STM32_IRQ_USART2 /* Vector 16+38: USART2 global interrupt */
HANDLER stm32_usart3, STM32_IRQ_USART3 /* Vector 16+39: USART3 global interrupt */
HANDLER stm32_exti1510, STM32_IRQ_EXTI1510 /* Vector 16+40: EXTI Line[15:10] interrupts */
HANDLER stm32_rtcalr, STM32_IRQ_RTCALR /* Vector 16+41: RTC alarms (A and B) through EXTI line interrupt */
HANDLER stm32_cec, STM32_IRQ_CEC /* Vector 16+42: CEC global interrupt */
HANDLER stm32_tim12, STM32_IRQ_TIM12 /* Vector 16+43: TIM12 global interrupt */
HANDLER stm32_tim13, STM32_IRQ_TIM13 /* Vector 16+44: TIM13 global interrupt */
HANDLER stm32_tim14, STM32_IRQ_TIM14 /* Vector 16+45: TIM14 global interrupt */
HANDLER stm32_fsmc, STM32_IRQ_FSMC /* Vector 16+48: FSMC global interrupt */
HANDLER stm32_tim5, STM32_IRQ_TIM5 /* Vector 16+50: TIM5 global interrupt */
HANDLER stm32_spi3, STM32_IRQ_SPI3 /* Vector 16+51: SPI3 global interrupt */
HANDLER stm32_uart4, STM32_IRQ_UART4 /* Vector 16+52: USART2 global interrupt */
HANDLER stm32_uart5, STM32_IRQ_UART5 /* Vector 16+53: UART5 global interrupt */
HANDLER stm32_tim6, STM32_IRQ_TIM6 /* Vector 16+54: TIM6 global interrupt */
HANDLER stm32_tim7, STM32_IRQ_TIM7 /* Vector 16+55: TIM7 global interrupt */
HANDLER stm32_dma2ch1, STM32_IRQ_DMA2CH1 /* Vector 16+56: DMA2 Channel 1 global interrupt */
HANDLER stm32_dma2ch2, STM32_IRQ_DMA2CH2 /* Vector 16+57: DMA2 Channel 2 global interrupt */
HANDLER stm32_dma2ch3, STM32_IRQ_DMA2CH3 /* Vector 16+58: DMA2 Channel 3 global interrupt */
HANDLER stm32_dma2ch45, STM32_IRQ_DMA2CH45 /* Vector 16+59: DMA2 Channel 4 and 5 global interrupt */
HANDLER stm32_dma2ch5, STM32_IRQ_DMA2CH5 /* Vector 16+60: DMA2 Channel 5 global interrupt */
# elif defined(CONFIG_STM32_CONNECTIVITYLINE)
HANDLER stm32_wwdg, STM32_IRQ_WWDG /* Vector 16+0: Window Watchdog interrupt */
HANDLER stm32_pvd, STM32_IRQ_PVD /* Vector 16+1: PVD through EXTI Line detection interrupt */
HANDLER stm32_tamper, STM32_IRQ_TAMPER /* Vector 16+2: Tamper interrupt */
HANDLER stm32_rtc, STM32_IRQ_RTC /* Vector 16+3: RTC global interrupt */
HANDLER stm32_flash, STM32_IRQ_FLASH /* Vector 16+4: Flash global interrupt */
HANDLER stm32_rcc, STM32_IRQ_RCC /* Vector 16+5: RCC global interrupt */
HANDLER stm32_exti0, STM32_IRQ_EXTI0 /* Vector 16+6: EXTI Line 0 interrupt */
HANDLER stm32_exti1, STM32_IRQ_EXTI1 /* Vector 16+7: EXTI Line 1 interrupt */
HANDLER stm32_exti2, STM32_IRQ_EXTI2 /* Vector 16+8: EXTI Line 2 interrupt */
HANDLER stm32_exti3, STM32_IRQ_EXTI3 /* Vector 16+9: EXTI Line 3 interrupt */
HANDLER stm32_exti4, STM32_IRQ_EXTI4 /* Vector 16+10: EXTI Line 4 interrupt */
HANDLER stm32_dma1ch1, STM32_IRQ_DMA1CH1 /* Vector 16+11: DMA1 Channel 1 global interrupt */
HANDLER stm32_dma1ch2, STM32_IRQ_DMA1CH2 /* Vector 16+12: DMA1 Channel 2 global interrupt */
HANDLER stm32_dma1ch3, STM32_IRQ_DMA1CH3 /* Vector 16+13: DMA1 Channel 3 global interrupt */
HANDLER stm32_dma1ch4, STM32_IRQ_DMA1CH4 /* Vector 16+14: DMA1 Channel 4 global interrupt */
HANDLER stm32_dma1ch5, STM32_IRQ_DMA1CH5 /* Vector 16+15: DMA1 Channel 5 global interrupt */
HANDLER stm32_dma1ch6, STM32_IRQ_DMA1CH6 /* Vector 16+16: DMA1 Channel 6 global interrupt */
HANDLER stm32_dma1ch7, STM32_IRQ_DMA1CH7 /* Vector 16+17: DMA1 Channel 7 global interrupt */
HANDLER stm32_adc12, STM32_IRQ_ADC12 /* Vector 16+18: ADC1 and ADC2 global interrupt */
HANDLER stm32_can1tx, STM32_IRQ_CAN1TX /* Vector 16+19: CAN1 TX interrupts */
HANDLER stm32_can1rx0, STM32_IRQ_CAN1RX0 /* Vector 16+20: CAN1 RX0 interrupts */
HANDLER stm32_can1rx, STM32_IRQ_CAN1RX1 /* Vector 16+21: CAN1 RX1 interrupt */
HANDLER stm32_can1sce, STM32_IRQ_CAN1SCE /* Vector 16+22: CAN1 SCE interrupt */
HANDLER stm32_exti95, STM32_IRQ_EXTI95 /* Vector 16+23: EXTI Line[9:5] interrupts */
HANDLER stm32_tim1brk, STM32_IRQ_TIM1BRK /* Vector 16+24: TIM1 Break interrupt */
HANDLER stm32_tim1up, STM32_IRQ_TIM1UP /* Vector 16+25: TIM1 Update interrupt */
HANDLER stm32_tim1trgcom, STM32_IRQ_TIM1TRGCOM /* Vector 16+26: TIM1 Trigger and Commutation interrupts */
HANDLER stm32_tim1cc, STM32_IRQ_TIM1CC /* Vector 16+27: TIM1 Capture Compare interrupt */
HANDLER stm32_tim2, STM32_IRQ_TIM2 /* Vector 16+28: TIM2 global interrupt */
HANDLER stm32_tim3, STM32_IRQ_TIM3 /* Vector 16+29: TIM3 global interrupt */
HANDLER stm32_tim4, STM32_IRQ_TIM4 /* Vector 16+30: TIM4 global interrupt */
HANDLER stm32_i2c1ev, STM32_IRQ_I2C1EV /* Vector 16+31: I2C1 event interrupt */
HANDLER stm32_i2c1er, STM32_IRQ_I2C1ER /* Vector 16+32: I2C1 error interrupt */
HANDLER stm32_i2c2ev, STM32_IRQ_I2C2EV /* Vector 16+33: I2C2 event interrupt */
HANDLER stm32_i2c2er, STM32_IRQ_I2C2ER /* Vector 16+34: I2C2 error interrupt */
HANDLER stm32_spi1, STM32_IRQ_SPI1 /* Vector 16+35: SPI1 global interrupt */
HANDLER stm32_spi2, STM32_IRQ_SPI2 /* Vector 16+36: SPI2 global interrupt */
HANDLER stm32_usart1, STM32_IRQ_USART1 /* Vector 16+37: USART1 global interrupt */
HANDLER stm32_usart2, STM32_IRQ_USART2 /* Vector 16+38: USART2 global interrupt */
HANDLER stm32_usart3, STM32_IRQ_USART3 /* Vector 16+39: USART3 global interrupt */
HANDLER stm32_exti1510, STM32_IRQ_EXTI1510 /* Vector 16+40: EXTI Line[15:10] interrupts */
HANDLER stm32_rtcalr, STM32_IRQ_RTCALRM /* Vector 16+41: RTC alarm through EXTI line interrupt */
HANDLER stm32_otgfswkup, STM32_IRQ_OTGFSWKUP /* Vector 16+42: USB On-The-Go FS Wakeup through EXTI line interrupt */
HANDLER stm32_tim5, STM32_IRQ_TIM5 /* Vector 16+50: TIM5 global interrupt */
HANDLER stm32_spi3, STM32_IRQ_SPI3 /* Vector 16+51: SPI3 global interrupt */
HANDLER stm32_uart4 , STM32_IRQ_UART4 /* Vector 16+52: UART4 global interrupt */
HANDLER stm32_uart5, STM32_IRQ_UART5 /* Vector 16+53: UART5 global interrupt */
HANDLER stm32_tim6, STM32_IRQ_TIM6 /* Vector 16+54: TIM6 global interrupt */
HANDLER stm32_tim7, STM32_IRQ_TIM7 /* Vector 16+55: TIM7 global interrupt */
HANDLER stm32_dma2ch1, STM32_IRQ_DMA2CH1 /* Vector 16+56: DMA2 Channel 1 global interrupt */
HANDLER stm32_dma2ch2, STM32_IRQ_DMA2CH2 /* Vector 16+57: DMA2 Channel 2 global interrupt */
HANDLER stm32_dma2ch3, STM32_IRQ_DMA2CH3 /* Vector 16+58: DMA2 Channel 3 global interrupt */
HANDLER stm32_dma2ch4, STM32_IRQ_DMA2CH4 /* Vector 16+59: DMA2 Channel 4 global interrupt */
HANDLER stm32_dma2ch5, STM32_IRQ_DMA2CH5 /* Vector 16+60: DMA2 Channel 5 global interrupt */
HANDLER stm32_eth, STM32_IRQ_ETH /* Vector 16+61: Ethernet global interrupt */
HANDLER stm32_ethwkup, STM32_IRQ_ETHWKUP /* Vector 16+62: Ethernet Wakeup through EXTI line interrupt */
HANDLER stm32_can2tx, STM32_IRQ_CAN2TX /* Vector 16+63: CAN2 TX interrupts */
HANDLER stm32_can2rx0, STM32_IRQ_CAN2RX0 /* Vector 16+64: CAN2 RX0 interrupts */
HANDLER stm32_can2rx1, STM32_IRQ_CAN2RX1 /* Vector 16+65: CAN2 RX1 interrupt */
HANDLER stm32_can2sce, STM32_IRQ_CAN2SCE /* Vector 16+66: CAN2 SCE interrupt */
HANDLER stm32_otgfs, STM32_IRQ_OTGFS /* Vector 16+67: USB On The Go FS global interrupt */
# else /* CONFIG_STM32_CONNECTIVITYLINE */
HANDLER stm32_wwdg, STM32_IRQ_WWDG /* Vector 16+0: Window Watchdog interrupt */
HANDLER stm32_pvd, STM32_IRQ_PVD /* Vector 16+1: PVD through EXTI Line detection interrupt */
HANDLER stm32_tamper, STM32_IRQ_TAMPER /* Vector 16+2: Tamper interrupt */
HANDLER stm32_rtc, STM32_IRQ_RTC /* Vector 16+3: RTC global interrupt */
HANDLER stm32_flash, STM32_IRQ_FLASH /* Vector 16+4: Flash global interrupt */
HANDLER stm32_rcc, STM32_IRQ_RCC /* Vector 16+5: RCC global interrupt */
HANDLER stm32_exti0, STM32_IRQ_EXTI0 /* Vector 16+6: EXTI Line 0 interrupt */
HANDLER stm32_exti1, STM32_IRQ_EXTI1 /* Vector 16+7: EXTI Line 1 interrupt */
HANDLER stm32_exti2, STM32_IRQ_EXTI2 /* Vector 16+8: EXTI Line 2 interrupt */
HANDLER stm32_exti3, STM32_IRQ_EXTI3 /* Vector 16+9: EXTI Line 3 interrupt */
HANDLER stm32_exti4, STM32_IRQ_EXTI4 /* Vector 16+10: EXTI Line 4 interrupt */
HANDLER stm32_dma1ch1, STM32_IRQ_DMA1CH1 /* Vector 16+11: DMA1 Channel 1 global interrupt */
HANDLER stm32_dma1ch2, STM32_IRQ_DMA1CH2 /* Vector 16+12: DMA1 Channel 2 global interrupt */
HANDLER stm32_dma1ch3, STM32_IRQ_DMA1CH3 /* Vector 16+13: DMA1 Channel 3 global interrupt */
HANDLER stm32_dma1ch4, STM32_IRQ_DMA1CH4 /* Vector 16+14: DMA1 Channel 4 global interrupt */
HANDLER stm32_dma1ch5, STM32_IRQ_DMA1CH5 /* Vector 16+15: DMA1 Channel 5 global interrupt */
HANDLER stm32_dma1ch6, STM32_IRQ_DMA1CH6 /* Vector 16+16: DMA1 Channel 6 global interrupt */
HANDLER stm32_dma1ch7, STM32_IRQ_DMA1CH7 /* Vector 16+17: DMA1 Channel 7 global interrupt */
HANDLER stm32_adc12, STM32_IRQ_ADC12 /* Vector 16+18: ADC1 and ADC2 global interrupt */
HANDLER stm32_usbhpcantx, STM32_IRQ_USBHPCANTX /* Vector 16+19: USB High Priority or CAN TX interrupts*/
HANDLER stm32_usblpcanrx0, STM32_IRQ_USBLPCANRX0 /* Vector 16+20: USB Low Priority or CAN RX0 interrupts*/
HANDLER stm32_can1rx1, STM32_IRQ_CAN1RX1 /* Vector 16+21: CAN1 RX1 interrupt */
HANDLER stm32_can1sce, STM32_IRQ_CAN1SCE /* Vector 16+22: CAN1 SCE interrupt */
HANDLER stm32_exti95, STM32_IRQ_EXTI95 /* Vector 16+23: EXTI Line[9:5] interrupts */
HANDLER stm32_tim1brk, STM32_IRQ_TIM1BRK /* Vector 16+24: TIM1 Break interrupt */
HANDLER stm32_tim1up, STM32_IRQ_TIM1UP /* Vector 16+25: TIM1 Update interrupt */
HANDLER stm32_tim1rtgcom, STM32_IRQ_TIM1TRGCOM /* Vector 16+26: TIM1 Trigger and Commutation interrupts */
HANDLER stm32_tim1cc, STM32_IRQ_TIM1CC /* Vector 16+27: TIM1 Capture Compare interrupt */
HANDLER stm32_tim2, STM32_IRQ_TIM2 /* Vector 16+28: TIM2 global interrupt */
HANDLER stm32_tim3, STM32_IRQ_TIM3 /* Vector 16+29: TIM3 global interrupt */
HANDLER stm32_tim4, STM32_IRQ_TIM4 /* Vector 16+30: TIM4 global interrupt */
HANDLER stm32_i2c1ev, STM32_IRQ_I2C1EV /* Vector 16+31: I2C1 event interrupt */
HANDLER stm32_i2c1er, STM32_IRQ_I2C1ER /* Vector 16+32: I2C1 error interrupt */
HANDLER stm32_i2c2ev, STM32_IRQ_I2C2EV /* Vector 16+33: I2C2 event interrupt */
HANDLER stm32_i2c2er, STM32_IRQ_I2C2ER /* Vector 16+34: I2C2 error interrupt */
HANDLER stm32_spi1, STM32_IRQ_SPI1 /* Vector 16+35: SPI1 global interrupt */
HANDLER stm32_spi2, STM32_IRQ_SPI2 /* Vector 16+36: SPI2 global interrupt */
HANDLER stm32_usart1, STM32_IRQ_USART1 /* Vector 16+37: USART1 global interrupt */
HANDLER stm32_usart2, STM32_IRQ_USART2 /* Vector 16+38: USART2 global interrupt */
HANDLER stm32_usart3, STM32_IRQ_USART3 /* Vector 16+39: USART3 global interrupt */
HANDLER stm32_exti1510, STM32_IRQ_EXTI1510 /* Vector 16+40: EXTI Line[15:10] interrupts */
HANDLER stm32_rtcalr, STM32_IRQ_RTCALRM /* Vector 16+41: RTC alarm through EXTI line interrupt */
HANDLER stm32_usbwkup, STM32_IRQ_USBWKUP /* Vector 16+42: USB wakeup from suspend through EXTI line interrupt*/
HANDLER stm32_tim8brk, STM32_IRQ_TIM8BRK /* Vector 16+43: TIM8 Break interrupt */
HANDLER stm32_tim8up, STM32_IRQ_TIM8UP /* Vector 16+44: TIM8 Update interrupt */
HANDLER stm32_tim8trgcom, STM32_IRQ_TIM8TRGCOM /* Vector 16+45: TIM8 Trigger and Commutation interrupts */
HANDLER stm32_tim8cc, STM32_IRQ_TIM8CC /* Vector 16+46: TIM8 Capture Compare interrupt */
HANDLER stm32_adc3, STM32_IRQ_ADC3 /* Vector 16+47: ADC3 global interrupt */
HANDLER stm32_fsmc, STM32_IRQ_FSMC /* Vector 16+48: FSMC global interrupt */
HANDLER stm32_sdio, STM32_IRQ_SDIO /* Vector 16+49: SDIO global interrupt */
HANDLER stm32_tim5, STM32_IRQ_TIM5 /* Vector 16+50: TIM5 global interrupt */
HANDLER stm32_spi3, STM32_IRQ_SPI3 /* Vector 16+51: SPI3 global interrupt */
HANDLER stm32_uart4, STM32_IRQ_UART4 /* Vector 16+52: UART4 global interrupt */
HANDLER stm32_uart5, STM32_IRQ_UART5 /* Vector 16+53: UART5 global interrupt */
HANDLER stm32_tim6, STM32_IRQ_TIM6 /* Vector 16+54: TIM6 global interrupt */
HANDLER stm32_tim7, STM32_IRQ_TIM7 /* Vector 16+55: TIM7 global interrupt */
HANDLER stm32_dma2ch1, STM32_IRQ_DMA2CH1 /* Vector 16+56: DMA2 Channel 1 global interrupt */
HANDLER stm32_dma2ch2, STM32_IRQ_DMA2CH2 /* Vector 16+57: DMA2 Channel 2 global interrupt */
HANDLER stm32_dma2ch3, STM32_IRQ_DMA2CH3 /* Vector 16+58: DMA2 Channel 3 global interrupt */
HANDLER stm32_dma2ch45, STM32_IRQ_DMA2CH45 /* Vector 16+59: DMA2 Channel 4&5 global interrupt */
# endif /* CONFIG_STM32_CONNECTIVITYLINE */
#elif defined(CONFIG_STM32_STM32F20XX)
HANDLER stm32_wwdg, STM32_IRQ_WWDG /* Vector 16+0: Window Watchdog interrupt */
HANDLER stm32_pvd, STM32_IRQ_PVD /* Vector 16+1: PVD through EXTI Line detection interrupt */
HANDLER stm32_tamper, STM32_IRQ_TAMPER /* Vector 16+2: Tamper and time stamp interrupts */
@ -387,6 +775,7 @@ handlers:
HANDLER stm32_dcmi, STM32_IRQ_DCMI /* Vector 16+78: DCMI global interrupt */
HANDLER stm32_cryp, STM32_IRQ_CRYP /* Vector 16+79: CRYP crypto global interrupt */
HANDLER stm32_hash, STM32_IRQ_HASH /* Vector 16+80: Hash and Rng global interrupt */
#elif defined(CONFIG_STM32_STM32F30XX)
# include "chip/stm32f30xxx_vectors.h"
#elif defined(CONFIG_STM32_STM32F37XX)