diff --git a/arch/arm/src/sama5/Kconfig b/arch/arm/src/sama5/Kconfig index 7d381124f6..fdcff94539 100644 --- a/arch/arm/src/sama5/Kconfig +++ b/arch/arm/src/sama5/Kconfig @@ -804,7 +804,7 @@ config SAMA5_FLEXCOM0_SPI bool "SPI" select SAMA5_FLEXCOM_SPI -config SAMA5_FLEXCOM0_SPI +config SAMA5_FLEXCOM0_TWI bool "TWI" select SAMA5_FLEXCOM_TWI @@ -825,7 +825,7 @@ config SAMA5_FLEXCOM1_SPI bool "SPI" select SAMA5_FLEXCOM_SPI -config SAMA5_FLEXCOM1_SPI +config SAMA5_FLEXCOM1_TWI bool "TWI" select SAMA5_FLEXCOM_TWI @@ -846,7 +846,7 @@ config SAMA5_FLEXCOM2_SPI bool "SPI" select SAMA5_FLEXCOM_SPI -config SAMA5_FLEXCOM2_SPI +config SAMA5_FLEXCOM2_TWI bool "TWI" select SAMA5_FLEXCOM_TWI @@ -867,7 +867,7 @@ config SAMA5_FLEXCOM3_SPI select USART3_SERIALDRIVER select ARCH_HAVE_SERIAL_TERMIOS -config SAMA5_FLEXCOM3_SPI +config SAMA5_FLEXCOM3_TWI bool "TWI" select SAMA5_FLEXCOM_TWI @@ -888,7 +888,7 @@ config SAMA5_FLEXCOM4_SPI bool "SPI" select SAMA5_FLEXCOM_SPI -config SAMA5_FLEXCOM4_SPI +config SAMA5_FLEXCOM4_TWI bool "TWI" select SAMA5_FLEXCOM_TWI diff --git a/boards/arm/sama5/sama5d2-xult/Kconfig b/boards/arm/sama5/sama5d2-xult/Kconfig index d6adcd44e0..0011cf6d97 100644 --- a/boards/arm/sama5/sama5d2-xult/Kconfig +++ b/boards/arm/sama5/sama5d2-xult/Kconfig @@ -80,7 +80,7 @@ config SAMA5D27_SDMMC0_MOUNT_FSTYPE default "vfat" depends on SAMA5_SDMMC0 -config SAMA5_SDMMC1_WIDTH_D1_D8 +config SAMA5_SDMMC0_WIDTH_D1_D8 bool "SDMMC0 data bus width 8 bits" default y depends on SAMA5_SDMMC0 diff --git a/boards/arm/sama5/sama5d2-xult/include/board.h b/boards/arm/sama5/sama5d2-xult/include/board.h index 58304fa7c3..b08ec12cb6 100644 --- a/boards/arm/sama5/sama5d2-xult/include/board.h +++ b/boards/arm/sama5/sama5d2-xult/include/board.h @@ -38,6 +38,7 @@ #define BOARD_MAINOSC_FREQUENCY (12000000) /* MAINOSC: 12MHz crystal on-board */ #define BOARD_SLOWCLK_FREQUENCY (32768) /* Slow Clock: 32.768KHz */ +#define BOARD_UPLL_FREQUENCY (480000000) /* USB PLL: 480MHz */ /* After power-on reset, the SAMA5 device is running on a 12MHz internal RC. * These definitions will configure operational clocking. @@ -106,6 +107,177 @@ * Pre-processor Definitions ****************************************************************************/ +/* LCD Interface, Geometry and Timing ***************************************/ + +/* This configuration applies only to the TM7000 LCD/Touchscreen module. + * Other LCDs will require changes. + * + * NOTE: + * The TM7000 user manual claims that the hardware interface is + * 18-bit RGB666. + * If you select that, you will get a very pink display (because the + * upper, "red" bits floating high). + * By trial and error, the 24-bit select was found to produce the correct + * color output. + * + * NOTE: + * Timings come from the smaller SAMA5D3x-EK LCD and have not been + * optimized for this display. + */ + +#define BOARD_LCDC_OUTPUT_BPP 24 /* Output format is 24 bpp RGB888 */ +#define BOARD_LCDC_WIDTH 800 /* Display width (pixels) */ +#define BOARD_LCDC_HEIGHT 480 /* Display height (rows) */ +#define BOARD_LCDC_MCK_MUL2 1 /* Source clock is 2*Mck (vs Mck) */ +#define BOARD_LCDC_PIXCLK_INV 1 /* Invert pixel clock (falling edge) */ +#define BOARD_LCDC_GUARDTIME 9 /* Guard time (frames) */ +#define BOARD_LCDC_VSPW 2 /* Vertical pulse width (lines) */ +#define BOARD_LCDC_HSPW 128 /* Horizontal pulse width (DOTCLK) */ +#define BOARD_LCDC_VFPW 37 /* Vertical front porch (lines) */ +#define BOARD_LCDC_VBPW 8 /* Vertical back porch (lines) */ +#define BOARD_LCDC_HFPW 168 /* Horizontal front porch (DOTCLK) */ +#define BOARD_LCDC_HBPW 88 /* Horizontal back porch (DOTCLK) */ + +/* Pixel clock rate in Hz (HS period * VS period * BOARD_LCDC_FRAMERATE). */ + +#define BOARD_LCDC_FRAMERATE 50 /* Frame rate in Hz */ +#define BOARD_LCDC_HSPERIOD \ + (BOARD_LCDC_HSPW + BOARD_LCDC_HBPW + BOARD_LCDC_WIDTH + BOARD_LCDC_HFPW) +#define BOARD_LCDC_VSPERIOD \ + (BOARD_LCDC_VSPW + BOARD_LCDC_VBPW + BOARD_LCDC_HEIGHT + BOARD_LCDC_VFPW) +#define BOARD_LCDC_PIXELCLOCK \ + (BOARD_LCDC_HSPERIOD * BOARD_LCDC_VSPERIOD * BOARD_LCDC_FRAMERATE) + +/* Backlight prescaler value and PWM output polarity */ + +#define BOARD_LCDC_PWMPS LCDC_LCDCFG6_PWMPS_DIV1 +#define BOARD_LCDC_PWMPOL LCDC_LCDCFG6_PWMPOL + +/* LCDC PIO configuration ***************************************************/ + +#define PIO_LCD_DAT2 PIO_LCD_DAT2_2 +#define PIO_LCD_DAT3 PIO_LCD_DAT3_2 +#define PIO_LCD_DAT4 PIO_LCD_DAT4_2 +#define PIO_LCD_DAT5 PIO_LCD_DAT5_2 +#define PIO_LCD_DAT6 PIO_LCD_DAT6_2 +#define PIO_LCD_DAT7 PIO_LCD_DAT7_2 +#define PIO_LCD_DAT10 PIO_LCD_DAT10_2 +#define PIO_LCD_DAT11 PIO_LCD_DAT11_2 +#define PIO_LCD_DAT12 PIO_LCD_DAT12_2 +#define PIO_LCD_DAT13 PIO_LCD_DAT13_2 +#define PIO_LCD_DAT14 PIO_LCD_DAT14_2 +#define PIO_LCD_DAT15 PIO_LCD_DAT15_2 +#define PIO_LCD_DAT18 PIO_LCD_DAT18_2 +#define PIO_LCD_DAT19 PIO_LCD_DAT19_2 +#define PIO_LCD_DAT20 PIO_LCD_DAT20_2 +#define PIO_LCD_DAT21 PIO_LCD_DAT21_2 +#define PIO_LCD_DAT22 PIO_LCD_DAT22_2 +#define PIO_LCD_DAT23 PIO_LCD_DAT23_2 +#define PIO_LCD_DEN PIO_LCD_DEN_2 +#define PIO_LCD_DISP PIO_LCD_DISP_1 +#define PIO_LCD_HSYNC PIO_LCD_HSYNC_1 +#define PIO_LCD_PCK PIO_LCD_PCK_2 +#define PIO_LCD_PWM PIO_LCD_PWM_1 +#define PIO_LCD_VSYNC PIO_LCD_VSYNC_1 + +/* Touch screen TWI */ + +#define PIO_TWI1_CK (PIO_TWI1_CK_1 | PIO_CFG_PULLUP | \ + PIO_CFG_DEGLITCH | PIO_DRIVE_HIGH) +#define PIO_TWI1_D (PIO_TWI1_D_1 | PIO_CFG_PULLUP | \ + PIO_CFG_DEGLITCH | PIO_DRIVE_HIGH) + +/* EMAC MII/RMII connection to KSZ8081 Ethernet PHY *************************/ + +/* SAMA5D27 Interface KSZ8081 Interface + * ---- ------------ ------- ---------------------------------- + * PIO Usage Pin Function + * ---- ------------ ------- ---------------------------------- + * PB9 COL COL Collision Detect Output + * PB8 CRS CRS Carrier Sense Output + * PB22 MDC MDC Management Interface Clock Input + * PB23 MDIO MDIO Management Interface Data I/O + * PB18 RX0 RX0 Receive Data Output 0 + * PB19 RX1 RX1 Receive Data Output 1 + * PB10 RX2 RX2 Receive Data Output 2 + * PB11 RX3 RX3 Receive Data Output 3 + * PB7 RXCK RXCK Receive Clock Output + * PB16 RXDV RXDV Receive Data Valid Output + * PB17 RXER RXER Receive Error Output + * PB20 TX0 TX0 Transmit Data Input 0 + * PB21 TX1 TX1 Transmit Data Input 1 + * PB12 TX2 TX2 Transmit Data Input 2 + * PB13 TX3 TX3 Transmit Data Input 3 + * PB14 TXCK TXCK Transmit Clock Input + * PB15 TXEN TXEN Transmit Enable Input + * PB6 TXER TXER Transmit Error Input + * ---- ------------ ------- ---------------------------------- + */ + +#define PIO_EMAC0_COL PIO_EMAC0_COL_3 +#define PIO_EMAC0_CRS PIO_EMAC0_CRS_3 +#define PIO_EMAC0_MDC PIO_EMAC0_MDC_3 +#define PIO_EMAC0_MDIO PIO_EMAC0_MDIO_3 +#define PIO_EMAC0_RX0 PIO_EMAC0_RX0_3 +#define PIO_EMAC0_RX1 PIO_EMAC0_RX1_3 +#define PIO_EMAC0_RX2 PIO_EMAC0_RX2_3 +#define PIO_EMAC0_RX3 PIO_EMAC0_RX3_3 +#define PIO_EMAC0_RXCK PIO_EMAC0_RXCK_3 +#define PIO_EMAC0_RXDV PIO_EMAC0_RXDV_3 +#define PIO_EMAC0_RXER PIO_EMAC0_RXER_3 +#define PIO_EMAC0_TX0 PIO_EMAC0_TX0_3 +#define PIO_EMAC0_TX1 PIO_EMAC0_TX1_3 +#define PIO_EMAC0_TX2 PIO_EMAC0_TX2_3 +#define PIO_EMAC0_TX3 PIO_EMAC0_TX3_3 +#define PIO_EMAC0_TXCK PIO_EMAC0_TXCK_3 +#define PIO_EMAC0_TXEN PIO_EMAC0_TXEN_3 +#define PIO_EMAC0_TXER PIO_EMAC0_TXER_3 + +/* Image Sensor Controller - ISC Pin Definitions ****************************/ + +#define PIO_ISC_D0 PIO_ISC_D0_3 +#define PIO_ISC_D1 PIO_ISC_D1_3 +#define PIO_ISC_D2 PIO_ISC_D2_3 +#define PIO_ISC_D3 PIO_ISC_D3_3 +#define PIO_ISC_D4 PIO_ISC_D4_3 +#define PIO_ISC_D5 PIO_ISC_D5_3 +#define PIO_ISC_D6 PIO_ISC_D6_3 +#define PIO_ISC_D7 PIO_ISC_D7_3 +#define PIO_ISC_D8 PIO_ISC_D8_3 +#define PIO_ISC_D9 PIO_ISC_D9_3 +#define PIO_ISC_D10 PIO_ISC_D10_3 +#define PIO_ISC_D11 PIO_ISC_D11_3 +#define PIO_ISC_FIELD PIO_ISC_FIELD_3 +#define PIO_ISC_HSYNC PIO_ISC_HSYNC_3 +#define PIO_ISC_MCK PIO_ISC_MCK_3 +#define PIO_ISC_PCK PIO_ISC_PCK_3 +#define PIO_ISC_VSYNC PIO_ISC_VSYNC_3 + +/* QSPI0 definitions ********************************************************/ + +/* There is a QSPI Flash on board the SAMA5D2-XULT. + * The QSPI Flash is connected to QSPI0 IOSET3 and can be used for + * boot flash. + * + * ------------------------------ ------------------- --------------------- + * SAMA5D2 PIO SIGNAL USAGE + * ------------------------------ ------------------- --------------------- + * PA23 QSPI0_CS QSPI Chip Selection + * PA24 QSPI0_IO0 QSPI Data0 + * PA25 QSPI0_IO1 QSPI Data1 + * PA26 QSPI0_IO2 QSPI Data2 + * PA27 QSPI0_IO3 QSPI Data3 + * PA22 QSPI0_SCK QSPI Clock + * ------------------------------ ------------------- --------------------- + */ + +#define PIO_QSPI0_CS PIO_QSPI0_CS_3 +#define PIO_QSPI0_IO0 PIO_QSPI0_IO0_3 +#define PIO_QSPI0_IO1 PIO_QSPI0_IO1_3 +#define PIO_QSPI0_IO2 PIO_QSPI0_IO2_3 +#define PIO_QSPI0_IO3 PIO_QSPI0_IO3_3 +#define PIO_QSPI0_SCK PIO_QSPI0_SCK_3 + /* LED definitions **********************************************************/ /* There is an RGB LED on board the SAMA5D2-XULT. @@ -263,6 +435,13 @@ #define PIO_FLEXCOM4_IO0 PIO_FLEXCOM4_IO0_2 #define PIO_FLEXCOM4_IO1 PIO_FLEXCOM4_IO1_2 +#define PIO_FLEXCOM4_IO2 PIO_FLEXCOM4_IO1_2 +#define PIO_FLEXCOM4_IO3 PIO_FLEXCOM4_IO3_2 +#define PIO_FLEXCOM4_IO4 PIO_FLEXCOM4_IO4_2 + +/* PWM channel 0 */ + +#define PIO_PWM0_H PIO_PWM0_H0 /* Other USARTs are available on J22: * @@ -279,6 +458,14 @@ #define PIO_FLEXCOM3_IO0 PIO_FLEXCOM3_IO0_2 #define PIO_FLEXCOM3_IO1 PIO_FLEXCOM3_IO1_2 +#define PIO_FLEXCOM3_IO2 PIO_FLEXCOM3_IO1_2 +#define PIO_FLEXCOM3_IO3 PIO_FLEXCOM3_IO3_2 +#define PIO_FLEXCOM3_IO4 PIO_FLEXCOM3_IO4_2 + +#define PIO_FLEXCOM2_IO0 PIO_FLEXCOM2_IO0_2 +#define PIO_FLEXCOM2_IO1 PIO_FLEXCOM2_IO1_2 +#define PIO_FLEXCOM2_IO3 PIO_FLEXCOM2_IO3_2 +#define PIO_FLEXCOM2_IO4 PIO_FLEXCOM2_IO4_2 /* UARTs available on EXT1 * @@ -302,6 +489,47 @@ * ---- ------- ---- -------- */ +/* SPIs available on EXT1 + * + * ---- ------- ------------- + * EXT1 BOARD SAMA5D2 + * PIN NAME PIO FUNCTION + * ---- ------- ------------- + * 15 SPI_SS PD29 SPI1 + * 16 SPI_MOSI PD26 SPI1 + * 17 SPI_MISO PD27 SPI1 + * 18 SPI_SCK PD25 SPI1 + * ---- ------- ---- -------- + */ + +#define PIO_SPI1_MISO PIO_SPI1_MISO_1 +#define PIO_SPI1_MOSI PIO_SPI1_MOSI_1 +#define PIO_SPI1_NPCS1 PIO_SPI1_NPCS1_1 +#define PIO_SPI1_SPCK PIO_SPI1_SPCK_1 + +/* SPI0 Definition on EXP */ + +#define PIO_SPI0_MISO PIO_SPI0_MISO_1 +#define PIO_SPI0_MOSI PIO_SPI0_MOSI_1 +#define PIO_SPI0_NPCS0 PIO_SPI0_NPCS0_1 +#define PIO_SPI0_SPCK PIO_SPI0_SPCK_1 + +/* CANs are available on J9: + * + * ---- ------- ------------- + * J9 BOARD SAMA5D2 + * PIN NAME PIO FUNCTION + * ---- ------- ------------- + * 5 CANRX1 PC27 MCAN1-RX + * 6 CANTX1 PC26 MCAN1-TX + * 7 CANRX0 PC11 MCAN0-RX + * 8 CANTX0 PC10 MCAN0-TX + * ---- ------- ------------- + */ + +#define PIO_MCAN0_RX PIO_MCAN0_RX_2 +#define PIO_MCAN0_TX PIO_MCAN0_TX_2 + /* SDIO - Used for both Port 0 & 1 ******************************************/ /* 386 KHz for initial inquiry stuff */