STM32: Add MCO configuration for the STM32L1xx. From Jussi Kivilinna
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@ -153,6 +153,42 @@ static inline void stm32_mcoconfig(uint32_t source)
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}
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#endif
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/************************************************************************************
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* Name: stm32_mcodivconfig
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*
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* Description:
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* Selects the clock source to output and clock divider on MC pin (PA4) for
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* stm32l1xxx. PA4 should be configured in alternate function mode.
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*
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* Input Parameters:
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* source - One of the definitions for the RCC_CFGR_MCOSEL definitions from
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* chip/stm32l15xxx_rcc.h {RCC_CFGR_MCOSEL_DISABLED, RCC_CFGR_MCOSEL_SYSCLK,
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* RCC_CFGR_MCOSEL_HSICLK, RCC_CFGR_MCOSEL_MSICLK, RCC_CFGR_MCOSEL_HSECLK,
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* RCC_CFGR_MCOSEL_PLLCLK, RCC_CFGR_MCOSEL_LSICLK, RCC_CFGR_MCOSEL_LSECLK}
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* divider - One of the definitions for the RCC_CFGR_MCOPRE definitions from
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* chip/stm32l15xxx_rcc.h {RCC_CFGR_MCOPRE_DIV1, RCC_CFGR_MCOPRE_DIV2,
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* RCC_CFGR_MCOPRE_DIV4, RCC_CFGR_MCOPRE_DIV8, RCC_CFGR_MCOPRE_DIV16}
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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#if defined(CONFIG_STM32_STM32L15XX)
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static inline void stm32_mcodivconfig(uint32_t source, uint32_t divider)
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{
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uint32_t regval;
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/* Set MCO source */
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regval = getreg32(STM32_RCC_CFGR);
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regval &= ~(RCC_CFGR_MCOSEL_MASK);
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regval |= (source & RCC_CFGR_MCOSEL_MASK);
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regval &= ~(RCC_CFGR_MCOPRE_MASK);
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regval |= (divider & RCC_CFGR_MCOPRE_MASK);
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putreg32(regval, STM32_RCC_CFGR);
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}
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#endif
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/************************************************************************************
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* Name: stm32_mco2config
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