KL25Z GPIO register dump function now compiles
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@ -46,6 +46,8 @@
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* Pre-processorDefinitions
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************************************************************************************/
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#define KL_GPIO_NPORTS 5
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/* Register Offsets *****************************************************************/
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#define KL_GPIO_PDOR_OFFSET 0x0000 /* Port Data Output Register */
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@ -114,9 +114,9 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg)
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* address.
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*/
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port = (pinset & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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DEBUGASSERT((unsigned)port <= KL_GPIO_PORTE);
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base = KL_GPIO_CTRL_BASE(port);
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port = (pinset & _PIN_PORT_MASK) >> _PIN_PORT_SHIFT;
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DEBUGASSERT((unsigned)port < KL_GPIO_NPORTS);
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base = KL_GPIO_BASE(port);
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/* The following requires exclusive access to the GPIO registers */
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@ -124,18 +124,10 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg)
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lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
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g_portchar[port], pinset, base, msg);
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lldbg(" PMD: %08x OFFD: %08x DOUT: %08x DMASK: %08x\n",
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getreg32(base + KL_GPIO_PMD_OFFSET),
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getreg32(base + KL_GPIO_OFFD_OFFSET),
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getreg32(base + KL_GPIO_DOUT_OFFSET),
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getreg32(base + KL_GPIO_DMASK_OFFSET));
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lldbg(" PIN: %08x DBEN: %08x IMD: %08x IEN: %08x\n",
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getreg32(base + KL_GPIO_PIN_OFFSET),
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getreg32(base + KL_GPIO_DBEN_OFFSET),
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getreg32(base + KL_GPIO_IMD_OFFSET),
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getreg32(base + KL_GPIO_IEN_OFFSET));
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lldbg(" ISRC: %08x\n",
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getreg32(base + KL_GPIO_ISRC_OFFSET));
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lldbg(" PDOR: %08x PDIR: %08x PDDR: %08x\n",
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getreg32(base + KL_GPIO_PDOR_OFFSET),
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getreg32(base + KL_GPIO_PDIR_OFFSET),
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getreg32(base + KL_GPIO_PDDR_OFFSET));
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irqrestore(flags);
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}
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