SAMA5: Fix logic for running with data in SDRAM
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@ -653,18 +653,15 @@ __start:
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arm_data_initialize:
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/* zero BSS and set up the stack pointer */
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/* Zero BSS */
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adr r0, .Linitparms
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ldmia r0, {r0, r1}
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/* Clear the frame pointer and .bss */
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mov fp, #0
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mov r2, #0
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1:
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cmp r0, r1 /* Clear up to _bss_end_ */
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strcc fp, [r0],#4
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strcc r2, [r0], #4
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bcc 1b
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#ifdef CONFIG_BOOT_RUNFROMFLASH
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@ -681,8 +678,8 @@ arm_data_initialize:
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ldmia r3, {r0, r1, r2}
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2:
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ldmia r0!, {r3 - r10}
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stmia r1!, {r3 - r10}
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ldr r3, [r0], #4
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str r3, [r1], #4
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cmp r1, r2
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blt 2b
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#endif
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@ -705,18 +705,15 @@ __start:
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arm_data_initialize:
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/* zero BSS and set up the stack pointer */
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/* Zero BSS */
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adr r0, .Linitparms
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ldmia r0, {r0, r1}
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/* Clear the frame pointer and .bss */
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mov fp, #0
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mov r2, #0
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1:
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cmp r0, r1 /* Clear up to _bss_end_ */
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strcc fp, [r0],#4
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strcc r2, [r0],#4
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bcc 1b
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#ifdef CONFIG_BOOT_RUNFROMFLASH
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@ -733,8 +730,8 @@ arm_data_initialize:
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ldmia r3, {r0, r1, r2}
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2:
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ldmia r0!, {r3 - r10}
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stmia r1!, {r3 - r10}
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ldr r3, [r0], #4
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str r3, [r1], #4
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cmp r1, r2
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blt 2b
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#endif
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