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arm64: remove the operation of clearing interrupts during GIC initialization

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To align with the implementation of ARMv7-A, remove the operation of clearing
interrupts during GIC initialization to avoid losing interrupts during asynchronous startup.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
This commit is contained in:
hujun5 2024-08-13 16:19:55 +08:00 committed by Xiang Xiao
parent 956d77ba23
commit 6e7d90e195
1 changed files with 0 additions and 4 deletions
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4
arch/arm64/src/common/arm64_gicv3.c
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@ -481,10 +481,6 @@ static void gicv3_cpuif_init(void)
gic_wait_rwp(0);
/* Clear pending */
putreg32(BIT64_MASK(GIC_NUM_INTR_PER_REG), ICPENDR(base, 0));
/* Configure all SGIs/PPIs as G1S or G1NS depending on Zephyr
* is run in EL1S or EL1NS respectively.
* All interrupts will be delivered as irq