arch/riscv/esp32c3: ESP32C3 TWAI (CAN) controller included into Kconfig.
Signed-off-by: Jan Charvat <jancharvat.charvat@gmail.com>
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@ -197,6 +197,11 @@ config ESP32C3_I2C
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bool
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default n
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config ESP32C3_TWAI
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bool
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default n
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select CAN
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config ESP32C3_TIMER
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bool
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default n
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@ -252,6 +257,11 @@ config ESP32C3_I2C0
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default n
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select ESP32C3_I2C
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config ESP32C3_TWAI0
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bool "TWAI (CAN) 0"
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default n
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select ESP32C3_TWAI
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config ESP32C3_RNG
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bool "Random Number Generator (RNG)"
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default n
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@ -408,6 +418,58 @@ config ESP32C3_I2CTIMEOMS
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endmenu # I2C configuration
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menu "TWAI driver options"
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depends on ESP32C3_TWAI
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if ESP32C3_TWAI0
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config ESP32C3_TWAI0_TXPIN
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int "TWAI0 TX Pin"
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default 2
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config ESP32C3_TWAI0_RXPIN
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int "TWAI0 RX Pin"
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default 3
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config ESP32C3_TWAI0_BITRATE
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int "TWAI0 bitrate"
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default 1000000
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---help---
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TWAI0 bit rate. Required if ESP32C3_TWAI0 is defined.
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config ESP32C3_TWAI0_SAMPLEP
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int "TWAI0 sample point"
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default 80
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---help---
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TWAI0 sample point location as a percent value. Required
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if ESP32C3_TWAI0 is defined.
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config ESP32C3_TWAI0_SJW
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int "TWAI0 synchronization jump width"
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default 3
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---help---
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SJW limits the number of Time Quanta corrections during bit
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Resynchronization. Default: 3
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config ESP32C3_TWAI0_SAM
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bool "TWAI0 sampling"
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default n
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---help---
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The bus is sampled 3 times (recommended for low to medium speed buses
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to spikes on the bus-line).
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endif # ESP32C3_TWAI0
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config ESP32C3_TWAI_REGDEBUG
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bool "TWAI register level debug"
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depends on DEBUG_CAN_INFO
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default n
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---help---
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Output detailed register-level TWAI debug information. Requires also
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CONFIG_DEBUG_CAN_INFO.
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endmenu #ESP32C3_TWAI
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menu "SPI configuration"
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depends on ESP32C3_SPI
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@ -81,6 +81,10 @@ ifeq ($(CONFIG_ESP32C3_I2C),y)
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CHIP_CSRCS += esp32c3_i2c.c
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endif
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ifeq ($(CONFIG_ESP32C3_TWAI),y)
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CHIP_CSRCS += esp32c3_twai.c
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endif
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ifeq ($(CONFIG_ESP32C3_SPI),y)
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CHIP_CSRCS += esp32c3_spi.c
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ifeq ($(CONFIG_SPI_SLAVE),y)
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