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arch/riscv/esp32c3: ESP32C3 TWAI (CAN) controller included into Kconfig.

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Signed-off-by: Jan Charvat <jancharvat.charvat@gmail.com>
This commit is contained in:
Jan Charvat 2022-04-06 12:15:04 +02:00 committed by Xiang Xiao
parent e28584131d
commit 6ec86361a8
2 changed files with 66 additions and 0 deletions
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62
arch/risc-v/src/esp32c3/Kconfig
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@ -197,6 +197,11 @@ config ESP32C3_I2C
bool bool
default n default n
config ESP32C3_TWAI
bool
default n
select CAN
config ESP32C3_TIMER config ESP32C3_TIMER
bool bool
default n default n
@ -252,6 +257,11 @@ config ESP32C3_I2C0
default n default n
select ESP32C3_I2C select ESP32C3_I2C
config ESP32C3_TWAI0
bool "TWAI (CAN) 0"
default n
select ESP32C3_TWAI
config ESP32C3_RNG config ESP32C3_RNG
bool "Random Number Generator (RNG)" bool "Random Number Generator (RNG)"
default n default n
@ -408,6 +418,58 @@ config ESP32C3_I2CTIMEOMS
endmenu # I2C configuration endmenu # I2C configuration
menu "TWAI driver options"
depends on ESP32C3_TWAI
if ESP32C3_TWAI0
config ESP32C3_TWAI0_TXPIN
int "TWAI0 TX Pin"
default 2
config ESP32C3_TWAI0_RXPIN
int "TWAI0 RX Pin"
default 3
config ESP32C3_TWAI0_BITRATE
int "TWAI0 bitrate"
default 1000000
---help---
TWAI0 bit rate. Required if ESP32C3_TWAI0 is defined.
config ESP32C3_TWAI0_SAMPLEP
int "TWAI0 sample point"
default 80
---help---
TWAI0 sample point location as a percent value. Required
if ESP32C3_TWAI0 is defined.
config ESP32C3_TWAI0_SJW
int "TWAI0 synchronization jump width"
default 3
---help---
SJW limits the number of Time Quanta corrections during bit
Resynchronization. Default: 3
config ESP32C3_TWAI0_SAM
bool "TWAI0 sampling"
default n
---help---
The bus is sampled 3 times (recommended for low to medium speed buses
to spikes on the bus-line).
endif # ESP32C3_TWAI0
config ESP32C3_TWAI_REGDEBUG
bool "TWAI register level debug"
depends on DEBUG_CAN_INFO
default n
---help---
Output detailed register-level TWAI debug information. Requires also
CONFIG_DEBUG_CAN_INFO.
endmenu #ESP32C3_TWAI
menu "SPI configuration" menu "SPI configuration"
depends on ESP32C3_SPI depends on ESP32C3_SPI

4
arch/risc-v/src/esp32c3/Make.defs
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@ -81,6 +81,10 @@ ifeq ($(CONFIG_ESP32C3_I2C),y)
CHIP_CSRCS += esp32c3_i2c.c CHIP_CSRCS += esp32c3_i2c.c
endif endif
ifeq ($(CONFIG_ESP32C3_TWAI),y)
CHIP_CSRCS += esp32c3_twai.c
endif
ifeq ($(CONFIG_ESP32C3_SPI),y) ifeq ($(CONFIG_ESP32C3_SPI),y)
CHIP_CSRCS += esp32c3_spi.c CHIP_CSRCS += esp32c3_spi.c
ifeq ($(CONFIG_SPI_SLAVE),y) ifeq ($(CONFIG_SPI_SLAVE),y)