ESP32: Fix some compilation errors
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58
arch/xtensa/include/serial.h
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58
arch/xtensa/include/serial.h
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@ -0,0 +1,58 @@
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/****************************************************************************
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* arch/xtensa/include/serial.h
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_INCLUDE_SERIAL_H
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#define __ARCH_XTENSA_INCLUDE_SERIAL_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <sys/types.h>
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#include <nuttx/fs/ioctl.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#endif /* __ARCH_XTENSA_INCLUDE_SERIAL_H */
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@ -237,8 +237,8 @@ config ESP32_UART0_TXPIN
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default 0
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range 0 39
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config ESP32_UART0_TXPIN
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int "UART0 Tx Pin"
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config ESP32_UART0_RXPIN
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int "UART0 Rx Pin"
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default 0
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range 0 39
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@ -263,8 +263,8 @@ config ESP32_UART1_TXPIN
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default 0
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range 0 39
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config ESP32_UART1_TXPIN
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int "UART1 Tx Pin"
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config ESP32_UART1_RXPIN
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int "UART1 Rx Pin"
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default 0
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range 0 39
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@ -289,8 +289,8 @@ config ESP32_UART2_TXPIN
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default 0
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range 0 39
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config ESP32_UART2_TXPIN
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int "UART2 Tx Pin"
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config ESP32_UART2_RXPIN
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int "UART2 Rx Pin"
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default 0
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range 0 39
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@ -53,14 +53,14 @@
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/* UARTs ********************************************************************/
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/* Don't enable UARTs not supported by the chip. */
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#if ESP32_NUART < 1
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#if ESP32_NUARTS < 1
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# undef CONFIG_ESP32_UART0
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# undef CONFIG_ESP32_UART1
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# undef CONFIG_ESP32_UART2
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#elif ESP32_NUART < 2
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#elif ESP32_NUARTS < 2
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# undef CONFIG_ESP32_UART1
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# undef CONFIG_ESP32_UART2
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#elif ESP32_NUART < 3
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#elif ESP32_NUARTS < 3
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# undef CONFIG_ESP32_UART2
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#endif
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@ -127,20 +127,4 @@
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# undef CONFIG_ESP32_SPI3
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#endif
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/****************************************************************************
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* Public Types
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Inline Functions
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****************************************************************************/
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#endif /* __ARCH_XTENSA_SRC_ESP32_ESP32_CONFIG_H */
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@ -214,7 +214,7 @@ int esp32_configgpio(int pin, gpio_pinattr_t attr)
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func |= FUN_IE;
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pinmode = (attr & PINMODE_MASK);
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if (pinmode == INPUT | pinmode == OUTPUT)
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if (pinmode == INPUT || pinmode == OUTPUT)
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{
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func |= (uint32_t)(2 << MCU_SEL_S);
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}
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@ -52,7 +52,7 @@
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# include <termios.h>
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#endif
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#include <nuttx/cpuint.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <nuttx/serial/serial.h>
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@ -64,7 +64,9 @@
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#include "chip/esp32_iomux.h"
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#include "chip/esp32_gpio_sigmap.h"
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#include "chip/esp32_uart.h"
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#include "rom/esp32_gpio.h"
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#include "esp32_config.h"
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#include "esp32_gpio.h"
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#include "esp32_cpuint.h"
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/****************************************************************************
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@ -100,6 +102,7 @@
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# elif defined(CONFIG_ESP32_UART2)
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# define TTYS0_DEV g_uart2port /* UART2 is ttyS0 */
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# define UART2_ASSIGNED 1
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# endif
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#endif
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/* Pick ttys1. This could be any of UART0-2 excluding the console
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@ -163,9 +166,9 @@ struct esp32_config_s
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struct esp32_dev_s
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{
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const struct esp32_config_s *config /* Constant configuration */
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const struct esp32_config_s *config; /* Constant configuration */
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uint32_t baud; /* Configured baud */
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uint32_t sr; /* Saved status bits */
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uint32_t status; /* Saved status bits */
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uint8_t cpuint; /* CPU interrupt assigned to this UART */
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uint8_t parity; /* 0=none, 1=odd, 2=even */
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uint8_t bits; /* Number of bits (5-9) */
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@ -194,7 +197,7 @@ static int esp32_uart1_interrupt(int cpuint, void *context);
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static int esp32_uart2_interrupt(int cpuint, void *context);
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#endif
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static int esp32_ioctl(struct file *filep, int cmd, unsigned long arg);
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static int esp32_receive(struct uart_dev_s *dev, uint32_t *status);
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static int esp32_receive(struct uart_dev_s *dev, unsigned int *status);
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static void esp32_rxint(struct uart_dev_s *dev, bool enable);
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static bool esp32_rxavailable(struct uart_dev_s *dev);
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static void esp32_send(struct uart_dev_s *dev, int ch);
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@ -243,7 +246,7 @@ static char g_uart2txbuffer[CONFIG_UART2_TXBUFSIZE];
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/* This describes the state of the UART0 port. */
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#ifdef CONFIG_ESP32_UART0
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static struct const esp32_config_s g_uart0config =
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static const struct esp32_config_s g_uart0config =
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{
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.uartbase = DR_REG_UART_BASE,
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.handler = esp32_uart0_interrupt,
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@ -263,7 +266,7 @@ static struct const esp32_config_s g_uart0config =
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static struct esp32_dev_s g_uart0priv =
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{
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.config = &g_uart0config;
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.config = &g_uart0config,
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.baud = CONFIG_UART0_BAUD,
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.parity = CONFIG_UART0_PARITY,
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.bits = CONFIG_UART0_BITS,
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@ -290,7 +293,7 @@ static uart_dev_t g_uart0port =
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/* This describes the state of the UART1 port. */
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#ifdef CONFIG_ESP32_UART1
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static struct const esp32_config_s g_uart1config =
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static const struct esp32_config_s g_uart1config =
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{
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.uartbase = DR_REG_UART1_BASE,
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.handler = esp32_uart1_interrupt,
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@ -310,7 +313,7 @@ static struct const esp32_config_s g_uart1config =
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static struct esp32_dev_s g_uart1priv =
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{
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.config = &g_uart1config;
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.config = &g_uart1config,
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.baud = CONFIG_UART1_BAUD,
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.parity = CONFIG_UART1_PARITY,
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.bits = CONFIG_UART1_BITS,
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@ -337,7 +340,7 @@ static uart_dev_t g_uart1port =
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/* This describes the state of the UART2 port. */
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#ifdef CONFIG_ESP32_UART2
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static struct const esp32_config_s g_uart2config =
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static const struct esp32_config_s g_uart2config =
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{
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.uartbase = DR_REG_UART2_BASE,
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.handler = esp32_uart2_interrupt,
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@ -357,7 +360,7 @@ static struct const esp32_config_s g_uart2config =
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static struct esp32_dev_s g_uart2priv =
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{
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.config = &g_uart2config;
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.config = &g_uart2config,
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.baud = CONFIG_UART2_BAUD,
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.parity = CONFIG_UART2_PARITY,
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.bits = CONFIG_UART2_BITS,
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@ -591,17 +594,17 @@ static void esp32_shutdown(struct uart_dev_s *dev)
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/* Revert pins to inputs and detach UART signals */
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esp32_configgpio(priv->config->txpin, INPUT);
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gpio_matrix_out(MATRIX_DETACH_OUT_SIG, priv->txsig, true, false);
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gpio_matrix_out(MATRIX_DETACH_OUT_SIG, priv->config->txsig, true, false);
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esp32_configgpio(priv->config->rxpin, INPUT);
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gpio_matrix_in(MATRIX_DETACH_IN_LOW_PIN, priv->rxsig, false);
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gpio_matrix_in(MATRIX_DETACH_IN_LOW_PIN, priv->config->rxsig, false);
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#if defined(CONFIG_SERIAL_IFLOWCONTROL) || defined(CONFIG_SERIAL_OFLOWCONTROL)
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esp32_configgpio(priv->config->rtspin, INPUT);
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gpio_matrix_out(MATRIX_DETACH_OUT_SIG, priv->rtssig, true, false);
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gpio_matrix_out(MATRIX_DETACH_OUT_SIG, priv->config->rtssig, true, false);
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esp32_configgpio(priv->config->ctspin, INPUT);
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gpio_matrix_in(MATRIX_DETACH_IN_LOW_PIN, priv->ctssig, false);
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gpio_matrix_in(MATRIX_DETACH_IN_LOW_PIN, priv->config->ctssig, false);
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#endif
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/* Unconfigure and disable the UART */
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@ -652,7 +655,7 @@ static int esp32_attach(struct uart_dev_s *dev)
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/* Attach the GPIO peripheral to the allocated CPU interrupt */
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up_disable_irq(g_gpio_cpuint);
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up_disable_irq(priv->cpuint);
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esp32_attach_peripheral(cpu, priv->config->periph, priv->cpuint);
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/* Attach and enable the IRQ */
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@ -683,6 +686,7 @@ static int esp32_attach(struct uart_dev_s *dev)
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static void esp32_detach(struct uart_dev_s *dev)
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{
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struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
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int cpu;
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/* Disable and detach the CPU interrupt */
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@ -691,6 +695,12 @@ static void esp32_detach(struct uart_dev_s *dev)
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/* Disassociate the peripheral interrupt from the CPU interrupt */
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#ifdef CONFIG_SMP
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cpu = up_cpu_index();
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#else
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cpu = 0;
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#endif
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esp32_detach_peripheral(cpu, priv->config->periph);
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/* And release the CPU interrupt */
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@ -714,6 +724,7 @@ static int esp32_interrupt(struct uart_dev_s *dev)
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{
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struct esp32_dev_s *priv;
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uint32_t regval;
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uint32_t status;
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int passes;
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bool handled;
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@ -727,7 +738,9 @@ static int esp32_interrupt(struct uart_dev_s *dev)
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handled = true;
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for (passes = 0; passes < 256 && handled; passes++)
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{
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handled = false;
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handled = false;
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priv->status = esp32_serialin(priv, UART_INT_RAW_OFFSET);
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status = esp32_serialin(priv, UART_STATUS_OFFSET);
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/* Clear pending interrupts */
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@ -736,7 +749,7 @@ static int esp32_interrupt(struct uart_dev_s *dev)
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UART_TXFIFO_EMPTY_INT_CLR_S);
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esp32_serialout(priv, UART_INT_CLR_OFFSET, regval);
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if ((esp32_serialin(priv, UART_STATUS_OFFSET) & UART_RXFIFO_CNT_M) > 0)
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if ((status & UART_RXFIFO_CNT_M) > 0)
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{
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/* Received data in the RXFIFO ... process incoming bytes */
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@ -744,7 +757,7 @@ static int esp32_interrupt(struct uart_dev_s *dev)
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handled = true;
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}
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if ((esp32_serialin(priv, UART_STATUS_OFFSET) & UART_TXFIFO_CNT_M) < 0x7f)
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if ((status & UART_TXFIFO_CNT_M) < 0x7f)
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{
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/* The TXFIFO is not full ... process outgoing bytes */
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@ -994,18 +1007,18 @@ static int esp32_ioctl(struct file *filep, int cmd, unsigned long arg)
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*
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****************************************************************************/
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static int esp32_receive(struct uart_dev_s *dev, uint32_t *status)
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static int esp32_receive(struct uart_dev_s *dev, unsigned int *status)
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{
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struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
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/* Return the error information in the saved status */
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*status = priv->sr;
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priv->sr = 0;
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*status = (unsigned int)priv->status;
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priv->status = 0;
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/* Then return the actual received byte */
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return (int)(esp32_serialin(priv, ESP32_UART_RHR_OFFSET) & 0xff);
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return (int)(esp32_serialin(priv, UART_FIFO_OFFSET) & UART_RXFIFO_RD_BYTE_M);
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}
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/****************************************************************************
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@ -1019,6 +1032,7 @@ static int esp32_receive(struct uart_dev_s *dev, uint32_t *status)
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static void esp32_rxint(struct uart_dev_s *dev, bool enable)
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{
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struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
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int regval;
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if (enable)
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{
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@ -1027,12 +1041,19 @@ static void esp32_rxint(struct uart_dev_s *dev, bool enable)
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*/
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#ifndef CONFIG_SUPPRESS_SERIAL_INTS
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esp32_serialout(priv, ESP32_UART_IER_OFFSET, UART_INT_RXRDY);
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regval = esp32_serialin(priv, UART_INT_ENA_OFFSET);
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regval |= (UART_RXFIFO_FULL_INT_CLR_S | UART_FRM_ERR_INT_CLR_S |
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UART_RXFIFO_TOUT_INT_CLR_S);
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esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
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#endif
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}
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else
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{
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esp32_serialout(priv, ESP32_UART_IDR_OFFSET, UART_INT_RXRDY);
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/* Disable the RX interrupts */
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esp32_serialout(priv, UART_INT_CLR_OFFSET,
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(UART_RXFIFO_FULL_INT_CLR_S | UART_FRM_ERR_INT_CLR_S |
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UART_RXFIFO_TOUT_INT_CLR_S));
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}
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}
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@ -1091,7 +1112,7 @@ static void esp32_txint(struct uart_dev_s *dev, bool enable)
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#ifndef CONFIG_SUPPRESS_SERIAL_INTS
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regval = esp32_serialin(priv, UART_INT_ENA_OFFSET);
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regval |= (UART_TX_DONE_INT_S | UART_TXFIFO_EMPTY_INT_RAW);
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regval |= (UART_TX_DONE_INT_ENA_S | UART_TXFIFO_EMPTY_INT_ENA_S);
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esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
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/* Fake a TX interrupt here by just calling uart_xmitchars() with
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@ -1191,7 +1212,7 @@ void up_earlyserialinit(void)
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*
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****************************************************************************/
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void up_serialinit(void)
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void xtensa_serial_initialize(void)
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{
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/* Register the console */
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@ -36,7 +36,7 @@
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#include <stdint.h>
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#include <stdbool.h>
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#include "chip/gpio_reg.h"
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#include "chip/esp32_gpio.h"
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/****************************************************************************
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* Pre-processor Definitions
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@ -89,6 +89,7 @@ CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0
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CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
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# CONFIG_ESP32_GPIO_IRQ is not set
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CONFIG_ESP32_UART0_TXPIN=0
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CONFIG_ESP32_UART0_RXPIN=0
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#
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# ESP32 Peripheral Selection
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@ -594,10 +595,10 @@ CONFIG_BUILTIN_PROXY_STACKSIZE=1024
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CONFIG_EXAMPLES_NSH=y
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CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
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# CONFIG_EXAMPLES_NULL is not set
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# CONFIG_EXAMPLES_NX is not set
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# CONFIG_EXAMPLES_NXFFS is not set
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# CONFIG_EXAMPLES_NXHELLO is not set
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# CONFIG_EXAMPLES_NXIMAGE is not set
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# CONFIG_EXAMPLES_NX is not set
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# CONFIG_EXAMPLES_NXLINES is not set
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# CONFIG_EXAMPLES_NXTERM is not set
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# CONFIG_EXAMPLES_NXTEXT is not set
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