spi update
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1739 42af7a65-404d-4744-a932-0658087f49c3
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@ -110,8 +110,8 @@
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/* PDCR -- Controls peripheral clocks */
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#define IMX_PCLKDIV1 5
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#define IMX_PCLKDIV2 5
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#define IMX_PCLKDIV1 0
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#define IMX_PCLKDIV2 0
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#define IMX_PCLKDIV3 0
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#define IMX_PCDR_VALUE \
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@ -119,19 +119,21 @@
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(IMX_PCLKDIV2 << PLL_PCDR_PCLKDIV2_SHIFT) |\
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(IMX_PCLKDIV3 << PLL_PCDR_PCLKDIV3_SHIFT))
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/* IMX_PERCLK1_FREQ = IMX_SYSPLL_CLK_FREQ / IMX_PCLKDIV1 + 1 */
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/* PERCLK1: UART, Timers, PWM */
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#define IMX_PERCLK1_FREQ 16002651
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#define IMX_PERCLK1_FREQ (IMX_SYSPLL_CLK_FREQ/(IMX_PCLKDIV1+1))
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/* IMX_PERCLK2_FREQ = IMX_SYSPLL_CLK_FREQ / IMX_PCLKDIV2 + 1 */
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/* PERCLK2: CSPI, LCD, SD */
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#define IMX_PERCLK2_FREQ 16002651
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#define IMX_PERCLK2_FREQ (IMX_SYSPLL_CLK_FREQ/(IMX_PCLKDIV2+1))
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/* IMX_PERCLK2_FREQ = IMX_SYSPLL_CLK_FREQ / IMX_PCLKDIV4 + 1 */
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/* PERCLK3: SSI */
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#define IMX_PERCLK2_FREQ 96015910
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#define IMX_PERCLK3_FREQ (IMX_SYSPLL_CLK_FREQ/(IMX_PCLKDIV3+1))
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/* CSCR settings -- Controls HCLK and BCLK and USB clock */
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/* CSCR settings -- Controls HCLK and BCLK and USB clock.
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* HCLK: SDRAM, CSI, Memory Stick, I2C, DMA
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*/
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#define IMX_CSCR_BCLKDIV 1
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#define IMX_CSCR_USBDIV 6
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