SAMD20: Add port configuration logic
This commit is contained in:
parent
f1b69a0460
commit
6efc562419
@ -68,7 +68,7 @@ CMN_CSRCS += up_dumpnvic.c
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endif
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CHIP_ASRCS =
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CHIP_CSRCS = sam_idle.c sam_irq.c sam_start.c sam_timerisr.c
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CHIP_CSRCS = sam_idle.c sam_irq.c sam_port.c sam_start.c sam_timerisr.c
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ifeq ($(CONFIG_NUTTX_KERNEL),y)
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CHIP_CSRCS += sam_userspace.c
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@ -49,6 +49,10 @@
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********************************************************************************************/
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/* PORT register offsets ********************************************************************/
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#define SAM_PORTA (0)
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#define SAM_PORTB (1)
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#define SAM_PORTN_OFFSET(n) (0x0000 + ((n) << 7))
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#define SAM_PORTA_OFFSET 0x0000 /* Port A register offset */
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#define SAM_PORTB_OFFSET 0x0080 /* Port B register offset */
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@ -118,6 +122,7 @@
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/* PORT register addresses ******************************************************************/
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#define SAM_PORTN_BASE(n) (SAM_PORT_BASE+SAM_PORTN_OFFSET(n))
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#define SAM_PORTA_BASE (SAM_PORT_BASE+SAM_PORTA_OFFSET)
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#define SAM_PORTB_BASE (SAM_PORT_BASE+SAM_PORTB_OFFSET)
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549
arch/arm/src/samd/sam_port.c
Normal file
549
arch/arm/src/samd/sam_port.c
Normal file
@ -0,0 +1,549 @@
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/****************************************************************************
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* arch/arm/src/samd/sam_port.c
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*
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* Copyright (C) 2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <time.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <arch/board/board.h>
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#include "up_internal.h"
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#include "up_arch.h"
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#include "chip.h"
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#include "sam_port.h"
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#include "chip/sam_port.h"
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifdef CONFIG_DEBUG_PORT
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static const char g_portchar[2] = { 'A', 'B' };
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#endif
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: sam_portbase
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*
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* Description:
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* Return the base address of the PORT register set
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*
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****************************************************************************/
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static inline uintptr_t sam_portbase(port_pinset_t pinset)
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{
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int port = (pinset & PORT_MASK) >> PORT_SHIFT;
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return SAM_PORTN_BASE(port);
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}
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/****************************************************************************
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* Name: sam_portpin
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*
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* Description:
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* Returun the base address of the PORT register set
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*
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****************************************************************************/
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static inline int sam_portpin(port_pinset_t pinset)
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{
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return 1 << ((pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT);
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}
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/****************************************************************************
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* Name: sam_configinput
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*
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* Description:
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* Configure a PORT input pin based on bit-encoded description of the pin.
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* This function serves the dual role of putting all pins into a known,
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* initial state. Hence, it is overkill for what really needs to be done.
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*
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* Assumption:
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* sam_configreset has been called to put the pin into the default reset
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* state.
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*
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****************************************************************************/
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static inline void sam_configinput(uintptr_t base, port_pinset_t pinset)
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{
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uint32_t regval;
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uint32_t bit;
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int pin;
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/* Decode pin information */
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pin = (pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT;
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bit = (1 << pin);
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/* Direction bit is already zero (input) */
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/* Enable the I/O synchronizer? */
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if ((pinset & PORT_SYNCHRONIZER_MASK) == PORT_SYNCHRONIZER_ON)
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{
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regval = getreg32(base + SAM_PORT_CTRL_OFFSET);
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regval |= bit;
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putreg32(regval, base + SAM_PORT_CTRL_OFFSET);
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}
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/* Set the pin configuration */
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regval = (PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_INEN);
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if (pin > 16)
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{
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/* Select the upper half word and adjust the bit setting */
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regval = PORT_WRCONFIG_HWSEL;
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pin -= 16;
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}
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regval |= PORT_WRCONFIG_PINMASK(pin);
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/* Check for pull-up/down selection */
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switch (pinset & PORT_PULL_MASK)
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{
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case PORT_PULL_UP:
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{
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/* Select pull-up by setting the corresponding bit in OUT
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* register.
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*/
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putreg32(bit, base + SAM_PORT_OUTSET_OFFSET);
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}
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/* Fall through */
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case PORT_PULL_DOWN:
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{
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regval |= PORT_WRCONFIG_PULLEN;
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}
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break;
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default:
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case PORT_PULL_NONE:
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break;
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}
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/* Configure the pin as an input */
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putreg32(regval, base + SAM_PORT_WRCONFIG_OFFSET);
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}
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/****************************************************************************
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* Name: sam_configinterrupt
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*
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* Description:
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* Configure a PORT interrupt pin based on bit-encoded description of the
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* pin.
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*
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* Assumption:
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* sam_configreset has been called to put the pin into the default reset
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* state:
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*
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****************************************************************************/
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static inline void sam_configinterrupt(uintptr_t base, port_pinset_t pinset)
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{
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#warning Missing logic
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}
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/****************************************************************************
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* Name: sam_configoutput
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*
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* Description:
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* Configure a PORT output pin based on bit-encoded description of the pin.
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*
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* Assumption:
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* sam_configreset has been called to put the pin into the default reset
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* state.
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*
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****************************************************************************/
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static inline void sam_configoutput(uintptr_t base, port_pinset_t pinset)
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{
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uint32_t regval;
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uint32_t bit;
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int pin;
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/* Decode pin information */
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pin = (pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT;
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bit = (1 << pin);
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/* Set the direction bit to configure the pin as an input */
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putreg32(bit, base + SAM_PORT_DIRSET_OFFSET);
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/* Set the initial output value to high? */
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if ((pinset & PORT_OUTVALUE_MASK) == PORT_OUTPUT_SET)
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{
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putreg32(bit, base + SAM_PORT_OUTSET_OFFSET);
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}
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/* Set the pin configuration. This will be an output with the input
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* buffer enabled.
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*/
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regval = (PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_INEN);
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if (pin > 16)
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{
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/* Select the upper half word and adjust the bit setting */
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regval = PORT_WRCONFIG_HWSEL;
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pin -= 16;
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}
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regval |= PORT_WRCONFIG_PINMASK(pin);
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/* Check for pull-up/down selection */
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switch (pinset & PORT_PULL_MASK)
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{
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case PORT_PULL_UP:
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{
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/* Select pull-up by setting the corresponding bit in OUT
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* register.
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*/
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putreg32(bit, base + SAM_PORT_OUTSET_OFFSET);
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}
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/* Fall through */
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case PORT_PULL_DOWN:
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{
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regval |= PORT_WRCONFIG_PULLEN;
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}
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break;
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default:
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case PORT_PULL_NONE:
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break;
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}
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/* Select higher strength drive? */
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if ((pinset & PORT_DRIVE_MASK) == PORT_DRIVE_HIGH)
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{
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regval |= PORT_WRCONFIG_DRVSTR;
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}
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/* Configure the pin as an output */
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putreg32(regval, base + SAM_PORT_WRCONFIG_OFFSET);
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}
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/****************************************************************************
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* Name: sam_configperiph
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*
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* Description:
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* Configure a PORT pin driven by a peripheral based on bit-encoded
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* description of the pin.
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*
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* Assumption:
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* sam_configreset has been called to put the pin into the default reset
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* state.
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*
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****************************************************************************/
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static inline void sam_configperiph(uintptr_t base, port_pinset_t pinset)
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{
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uint32_t regval;
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uint32_t bit;
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uint32_t func;
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int pin;
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/* Decode pin information */
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pin = (pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT;
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bit = (1 << pin);
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/* Set the pin configuration. This will be an peripheral with the
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* selected function.
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*/
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regval = (PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_WRPMUX | PORT_WRCONFIG_PMUXEN);
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if (pin > 16)
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{
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/* Select the upper half word and adjust the bit setting */
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regval = PORT_WRCONFIG_HWSEL;
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pin -= 16;
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}
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regval |= PORT_WRCONFIG_PINMASK(pin);
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/* Set the pin function */
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func = (pinset & PORT_FUNC_MASK) >> PORT_FUNC_SHIFT;
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regval = (func << PORT_WRCONFIG_PMUX_SHIFT);
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/* Check for pull-up/down selection */
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switch (pinset & PORT_PULL_MASK)
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{
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case PORT_PULL_UP:
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{
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/* Select pull-up by setting the corresponding bit in OUT
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* register.
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*/
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putreg32(bit, base + SAM_PORT_OUTSET_OFFSET);
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}
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/* Fall through */
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case PORT_PULL_DOWN:
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{
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regval |= PORT_WRCONFIG_PULLEN;
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}
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break;
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default:
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case PORT_PULL_NONE:
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break;
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}
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/* Configure the pin for the peripheral function */
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putreg32(regval, base + SAM_PORT_WRCONFIG_OFFSET);
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}
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/****************************************************************************
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* Name: sam_configreset
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*
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* Description:
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* Configure a PORT pin in the default, reset state.
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*
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****************************************************************************/
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static inline void sam_configreset(uintptr_t base, port_pinset_t pinset)
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{
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uint32_t regval;
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uint32_t bit;
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int pin;
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/* Decode pin information */
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pin = (pinset & PORT_PIN_MASK) >> PORT_PIN_SHIFT;
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bit = (1 << pin);
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/* Set the direction bit to zero (input) */
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putreg32(bit, base + SAM_PORT_DIRCLR_OFFSET);
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/* Disable the I/O synchronizer */
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regval = getreg32(base + SAM_PORT_CTRL_OFFSET);
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regval &= ~bit;
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putreg32(regval, base + SAM_PORT_CTRL_OFFSET);
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/* Assume input pull-down or output value low */
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putreg32(bit, base + SAM_PORT_OUTCLR_OFFSET);
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/* Set the pin configuration */
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regval = (PORT_WRCONFIG_WRPINCFG | PORT_WRCONFIG_WRPMUX);
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if (pin > 16)
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{
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/* Select the upper half word and adjust the bit setting */
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regval = PORT_WRCONFIG_HWSEL;
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pin -= 16;
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}
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regval |= PORT_WRCONFIG_PINMASK(pin);
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/* Disable the peripheral multiplexor, disable the input, disable
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* pull-up/down, reset driver strength, etc.
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*/
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putreg32(regval, base + SAM_PORT_WRCONFIG_OFFSET);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: sam_configport
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*
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* Description:
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* Configure a PORT pin based on bit-encoded description of the pin.
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*
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****************************************************************************/
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int sam_configport(port_pinset_t pinset)
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{
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uintptr_t base = sam_portbase(pinset);
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irqstate_t flags;
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/* Make sure that all operations on the port are atomic */
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flags = irqsave();
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/* Put the PORT in the known, reset state. */
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sam_configreset(base, pinset);
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/* Then put the PORT into the requested state */
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switch (pinset & PORT_MODE_MASK)
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{
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case PORT_INPUT:
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sam_configinput(base, pinset);
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break;
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case PORT_OUTPUT:
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sam_configoutput(base, pinset);
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break;
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case PORT_PERIPHERAL:
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sam_configperiph(base, pinset);
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break;
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case PORT_INTERRUPT:
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sam_configinterrupt(base, pinset);
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break;
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default:
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break;
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}
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irqrestore(flags);
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return OK;
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}
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/****************************************************************************
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* Name: sam_portwrite
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*
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* Description:
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* Write one or zero to the selected PORT pin
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*
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****************************************************************************/
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void sam_portwrite(port_pinset_t pinset, bool value)
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{
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uintptr_t base = sam_portbase(pinset);
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uint32_t pin = sam_portpin(pinset);
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if (value)
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{
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putreg32(pin, base + SAM_PORT_OUTSET_OFFSET);
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}
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else
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{
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putreg32(pin, base + SAM_PORT_OUTCLR_OFFSET);
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}
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}
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/****************************************************************************
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* Name: sam_portread
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*
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* Description:
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* Read one or zero from the selected PORT pin
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*
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****************************************************************************/
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bool sam_portread(port_pinset_t pinset)
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{
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uintptr_t base = sam_portbase(pinset);
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uint32_t pin = sam_portpin(pinset);
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return (getreg32(base + SAM_PORT_IN_OFFSET) & pin) != 0;
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}
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/************************************************************************************
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* Function: sam_dumpport
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*
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* Description:
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* Dump all PORT registers associated with the base address of the provided pinset.
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG_PORT
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int sam_dumpport(uint32_t pinset, const char *msg)
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{
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irqstate_t flags;
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uintptr_t base;
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unsigned int pin;
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unsigned int port;
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/* Get the base address associated with the PIO port */
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pin = sam_portpin(pinset);
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port = (pinset & PORT_MASK) >> PORT_SHIFT;
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base = SAM_PORTN_BASE(port);
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/* The following requires exclusive access to the PORT registers */
|
||||
|
||||
flags = irqsave();
|
||||
lldbg("PORT%c pinset: %08x base: %08x -- %s\n",
|
||||
g_portchar[port], pinset, base, msg);
|
||||
lldbg(" DIR: %08x OUT: %08x IN: %08x\n",
|
||||
getreg32(base + SAM_PORT_DIR_OFFSET),
|
||||
getreg32(base + SAM_PORT_OUT_OFFSET),
|
||||
getreg32(base + SAM_PORT_IN_OFFSET));
|
||||
lldbg(" CTRL: %08x WRCONFIG: %08x\n",
|
||||
getreg32(base + SAM_PORT_CTRL_OFFSET),
|
||||
getreg32(base + SAM_PORT_WRCONFIG_OFFSET));
|
||||
lldbg(" PMUX[%08x]: %02x PINCFG[%08x]: %02x\n",
|
||||
base + SAM_PORT_PMUX_OFFSET(pin),
|
||||
getreg8(base + SAM_PORT_PMUX_OFFSET(pin)),
|
||||
base + SAM_PORT_PINCFG_OFFSET(pin),
|
||||
getreg8(base + SAM_PORT_PINCFG_OFFSET(pin)));
|
||||
|
||||
irqrestore(flags);
|
||||
return OK;
|
||||
}
|
||||
#endif
|
||||
|
@ -67,11 +67,11 @@
|
||||
* 2222 1111 1111 1100 0000 0000
|
||||
* 3210 9876 5432 1098 7654 3210
|
||||
* ------------ -----------------------------
|
||||
* PORT Input: MMRR .... .SB. II.. ..PB BBBB
|
||||
* PORT Input: MMRR .... .S.. .... ..PB BBBB
|
||||
* PORT Output: MM.. .... D..V .... ..PB BBBB
|
||||
* Peripheral: MM.. FFF. .... II.. ..PB BBBB
|
||||
* ------------ -----------------------------
|
||||
* MMRR FFF. DSBV II.. ..PB BBBB
|
||||
* MMRR FFF. DS.V II.. ..PB BBBB
|
||||
*/
|
||||
|
||||
/* Input/output/peripheral mode:
|
||||
@ -101,7 +101,7 @@
|
||||
* 3210 9876 5432 1098 7654 3210
|
||||
* ------------ -----------------------------
|
||||
* PORT Input: ..RR .... .... .... .... ....
|
||||
* PORT Output: .... .... .... .... .... ....
|
||||
* PORT Output: ..RR .... .... .... .... ....
|
||||
* Peripheral: .... .... .... .... .... ....
|
||||
*/
|
||||
|
||||
@ -189,23 +189,6 @@
|
||||
# define PORT_SYNCHRONIZER_OFF (0 << PORT_SYNCHRONIZER_SHIFT)
|
||||
# define PORT_SYNCHRONIZER_ON (1 << PORT_SYNCHRONIZER_SHIFT)
|
||||
|
||||
/* Input buffering
|
||||
*
|
||||
* MODE BITFIELDS
|
||||
* ------------ -----------------------------
|
||||
* 2222 1111 1111 1100 0000 0000
|
||||
* 3210 9876 5432 1098 7654 3210
|
||||
* ------------ -----------------------------
|
||||
* PORT Input: .... .... ..B. .... .... ....
|
||||
* PORT Output: .... .... .... .... .... ....
|
||||
* Peripheral: .... .... .... .... .... ....
|
||||
*/
|
||||
|
||||
#define PORT_INBUFFER_SHIFT (13) /* Bit 13: Input buffer enable */
|
||||
#define PORT_INBUFFER_MASK (1 << PORT_SYNCHRONIZER_SHIFT)
|
||||
# define PORT_INBUFFER_OFF (0 << PORT_SYNCHRONIZER_SHIFT)
|
||||
# define PORT_INBUFFER_ON (1 << PORT_SYNCHRONIZER_SHIFT)
|
||||
|
||||
/* If the pin is an PORT output, then this identifies the initial output value:
|
||||
*
|
||||
* MODE BITFIELDS
|
||||
@ -223,14 +206,14 @@
|
||||
# define PORT_OUTPUT_CLEAR (0 << PORT_SYNCHRONIZER_SHIFT)
|
||||
# define PORT_OUTPUT_SET (1 << PORT_SYNCHRONIZER_SHIFT)
|
||||
|
||||
/* Selections for an interrupting input and peripheral events:
|
||||
/* Selections for external interrupts:
|
||||
*
|
||||
* MODE BITFIELDS
|
||||
* ------------ -----------------------------
|
||||
* 2222 1111 1111 1100 0000 0000
|
||||
* 3210 9876 5432 1098 7654 3210
|
||||
* ------------ -----------------------------
|
||||
* PORT Input: .... .... .... II.. .... ....
|
||||
* PORT Input: .... .... .... .... .... ....
|
||||
* PORT Output: .... .... .... .... .... ....
|
||||
* Peripheral: .... .... .... II.. .... ....
|
||||
*/
|
||||
@ -255,8 +238,8 @@
|
||||
|
||||
#define PORT_SHIFT (5) /* Bit 5: Port number */
|
||||
#define PORT_MASK (1 << PORT_SHIFT)
|
||||
# define PORTA (0 << PORT_SHIFT)
|
||||
# define PORTB (1 << PORT_SHIFT)
|
||||
# define PORTA (SAM_PORTA << PORT_SHIFT)
|
||||
# define PORTB (SAM_PORTB << PORT_SHIFT)
|
||||
|
||||
/* This identifies the bit in the port:
|
||||
*
|
||||
@ -309,7 +292,7 @@
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
typedef uint32_t port_cfgset_t;
|
||||
typedef uint32_t port_pinset_t;
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
@ -335,17 +318,13 @@ extern "C"
|
||||
*
|
||||
* Description:
|
||||
* Configure a PORT pin based on bit-encoded description of the pin.
|
||||
* Once it is configured as Alternative (PORT_ALT|PORT_CNF_AFPP|...)
|
||||
* function, it must be unconfigured with sam_unconfigport() with
|
||||
* the same cfgset first before it can be set to non-alternative function.
|
||||
*
|
||||
* Returns:
|
||||
* OK on success
|
||||
* ERROR on invalid port, or when pin is locked as ALT function.
|
||||
* OK (always)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int sam_configport(port_cfgset_t cfgset);
|
||||
int sam_configport(port_pinset_t pinset);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_portwrite
|
||||
@ -355,7 +334,7 @@ int sam_configport(port_cfgset_t cfgset);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void sam_portwrite(port_cfgset_t pinset, bool value);
|
||||
void sam_portwrite(port_pinset_t pinset, bool value);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_portread
|
||||
@ -365,7 +344,7 @@ void sam_portwrite(port_cfgset_t pinset, bool value);
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
bool sam_portread(port_cfgset_t pinset);
|
||||
bool sam_portread(port_pinset_t pinset);
|
||||
|
||||
/****************************************************************************
|
||||
* Function: sam_dumpport
|
||||
@ -377,7 +356,7 @@ bool sam_portread(port_cfgset_t pinset);
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
void sam_dumpport(port_cfgset_t pinset, const char *msg);
|
||||
void sam_dumpport(port_pinset_t pinset, const char *msg);
|
||||
#else
|
||||
# define sam_dumpport(p,m)
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user