From 6f8125bf61e61ebeebbfdb94460df91f7668b0ba Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Tue, 6 Jan 2015 10:48:08 -0600
Subject: [PATCH] Tiva I2C: For TM4C, high speed mode is now configurable (but
 disabled as EXPERIMENTAL)

---
 arch/arm/src/tiva/Kconfig         |  8 ++++++++
 arch/arm/src/tiva/chip/tiva_i2c.h |  2 +-
 arch/arm/src/tiva/tiva_i2c.c      | 18 +++++++++++++++---
 3 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/arch/arm/src/tiva/Kconfig b/arch/arm/src/tiva/Kconfig
index 194fb7211e..f85548b778 100644
--- a/arch/arm/src/tiva/Kconfig
+++ b/arch/arm/src/tiva/Kconfig
@@ -634,6 +634,14 @@ config TIVA_I2C_TIMEOTICKS
 
 endif # !TIVA_I2C_DYNTIMEO
 
+config TIVA_I2C_HIGHSPEED
+	bool "High speed support"
+	default n
+	depends on ARCH_CHIP_TM4C && EXPERIMENTAL
+	---help---
+		Enable support for high speed I2C transfers.
+		Only partially implemented and completely untested.
+
 config TIVA_I2C_REGDEBUG
 	bool "Register level debug"
 	default n
diff --git a/arch/arm/src/tiva/chip/tiva_i2c.h b/arch/arm/src/tiva/chip/tiva_i2c.h
index d60a6c4007..61c0fec5be 100644
--- a/arch/arm/src/tiva/chip/tiva_i2c.h
+++ b/arch/arm/src/tiva/chip/tiva_i2c.h
@@ -62,7 +62,7 @@
 
 #if defined(CONFIG_ARCH_CHIP_TM4C)
 #  define TIVA_I2CM_CLKOCNT_OFFSET     0x0024 /* I2C Master Clock Low Timeout Count */
-#  define TIVA_I2CM_BMON_OFFSET        0x002c /* I2C Master Configuration */
+#  define TIVA_I2CM_BMON_OFFSET        0x002c /* I2C Master Bus Monitor */
 #endif
 
 #if defined(CONFIG_ARCH_CHIP_TM4C129)
diff --git a/arch/arm/src/tiva/tiva_i2c.c b/arch/arm/src/tiva/tiva_i2c.c
index 69e44feb61..f6a3136b71 100644
--- a/arch/arm/src/tiva/tiva_i2c.c
+++ b/arch/arm/src/tiva/tiva_i2c.c
@@ -1783,6 +1783,18 @@ static int tiva_i2c_initialize(struct tiva_i2c_priv_s *priv, uint32_t frequency)
   regval |= I2CM_CR_MFE;
   tiva_i2c_putreg(priv, TIVA_I2CM_CR_OFFSET, regval);
 
+#ifdef TIVA_I2CSC_PC_OFFSET
+#ifdef CONFIG_TIVA_I2C_HIGHSPEED
+  /* Enable high-speed mode */
+
+  tiva_i2c_putreg(priv, TIVA_I2CSC_PC_OFFSET, I2CSC_PC_HS);
+#else
+  /* Disable high-speed mode */
+
+  tiva_i2c_putreg(priv, TIVA_I2CSC_PC_OFFSET, 0);
+#endif
+#endif
+
   /* Configure the the initial I2C clock frequency. */
 
   (void)tiva_i2c_setclock(priv, frequency);
@@ -1867,13 +1879,13 @@ static uint32_t tiva_i2c_setclock(struct tiva_i2c_priv_s *priv, uint32_t frequen
   DEBUGASSERT((regval & I2CM_TPR_MASK) == regval);
   tiva_i2c_putreg(priv, TIVA_I2CM_TPR_OFFSET, regval);
 
-#ifdef TIVA_I2CSC_PP_OFFSET
+#if defined(CONFIG_TIVA_I2C_HIGHSPEED) && defined(TIVA_I2CSC_PC_OFFSET)
   /* If the I2C peripheral is High-Speed enabled then choose the highest
    * speed that is less than or equal to 3.4 Mbps.
    */
 
-  regval = tiva_i2c_getreg(priv, TIVA_I2CSC_PP_OFFSET);
-  if ((regval & I2CSC_PP_HS) != 0)
+  regval = tiva_i2c_getreg(priv, TIVA_I2CSC_PC_OFFSET);
+  if ((regval & I2CSC_PC_HS) != 0)
     {
       tmp    = (2 * 3 * 3400000);
       regval = (((SYSCLK_FREQUENCY + tmp - 1) / tmp) - 1) << I2CM_TPR_SHIFT;