From 6f99994722edc8dcb70cb09e0668bf9bef7adbba Mon Sep 17 00:00:00 2001
From: Gregory Nutt <gnutt@nuttx.org>
Date: Tue, 30 Jul 2013 11:41:53 -0600
Subject: [PATCH] More DAC changes from John Wharington

---
 arch/arm/src/stm32/stm32_dac.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm/src/stm32/stm32_dac.c b/arch/arm/src/stm32/stm32_dac.c
index d3cef440c2..c416ed9cf4 100644
--- a/arch/arm/src/stm32/stm32_dac.c
+++ b/arch/arm/src/stm32/stm32_dac.c
@@ -333,10 +333,10 @@ struct stm32_chan_s
 #endif
   uint8_t    intf;       /* DAC zero-based interface number (0 or 1) */
   uint32_t   dro;        /* Data output register */
+  uint32_t   tsel;       /* CR trigger select value */
 #ifdef HAVE_DMA
   uint16_t   dmachan;    /* DMA channel needed by this DAC */
   DMA_HANDLE dma;        /* Allocated DMA channel */
-  uint32_t   tsel;       /* CR trigger select value */
   uint32_t   tbase;      /* Timer base address */
   uint32_t   tfrequency; /* Timer frequency */
   uint16_t   dmabuffer[CONFIG_STM32_DAC_DMA_BUFFER_SIZE]; /* DMA transfer buffer */
@@ -741,7 +741,9 @@ static int dac_send(FAR struct dac_dev_s *dev, FAR struct dac_msg_s *msg)
 
   /* Reset counters (generate an update) */
 
+#ifdef HAVE_DMA
   tim_modifyreg(chan, STM32_BTIM_EGR_OFFSET, 0, ATIM_EGR_UG);
+#endif
   return OK;
 }