lpc43/lpc54 SDMDC: Don't enable internal DMA in the control register if not doing internal DMA. Clear pending DMA-related interrupts before enabling them.
This commit is contained in:
Gregory Nutt
parent
1117a6e8ce
commit
6fa734457d
@ -196,6 +196,7 @@
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/* Card type register CTYPE */
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#define SDMMC_CTYPE_WIDTH1 (0) /* 1-bit mode */
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#define SDMMC_CTYPE_WIDTH4 (1 << 0) /* Bit 0: 4-bit mode */
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/* Bits 1-15: Reserved */
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#define SDMMC_CTYPE_WIDTH8 (1 << 16) /* Bit 16: 8-bit mode */
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@ -391,6 +392,7 @@
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#define SDMMC_IDINTEN_NIS (1 << 8) /* Bit 8: Normal Interrupt Summary */
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#define SDMMC_IDINTEN_AIS (1 << 9) /* Bit 9: Abnormal Interrupt Summary */
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/* Bits 10-31: Reserved */
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#define SDMMC_IDINTEN_ALL 0x00000333
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/************************************************************************************************
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* Public Types
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@ -268,7 +268,6 @@ static void lpc43_checksetup(void);
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static void lpc43_takesem(struct lpc43_dev_s *priv);
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#define lpc43_givesem(priv) (sem_post(&priv->waitsem))
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static inline void lpc43_setclock(uint32_t clkdiv);
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static inline void lpc43_settype(uint32_t ctype);
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static inline void lpc43_sdcard_clock(bool enable);
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static int lpc43_ciu_sendcmd(uint32_t cmd, uint32_t arg);
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static void lpc43_configwaitints(struct lpc43_dev_s *priv, uint32_t waitmask,
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@ -572,25 +571,6 @@ static inline void lpc43_setclock(uint32_t clkdiv)
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lpc43_ciu_sendcmd(SDMMC_CMD_UPDCLOCK | SDMMC_CMD_WAITPREV, 0);
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}
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/****************************************************************************
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* Name: lpc43_settype
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*
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* Description: Define the Bus Size of SDCard (1, 4 or 8-bit)
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*
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* Input Parameters:
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* ctype - A new CTYPE (Card Type Register) value
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline void lpc43_settype(uint32_t ctype)
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{
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mcinfo("cteype=%08lx\n", (unsigned long)ctype);
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lpc43_putreg(ctype, LPC43_SDMMC_CTYPE);
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}
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/****************************************************************************
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* Name: lpc43_sdcard_clock
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*
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@ -1252,8 +1232,10 @@ static void lpc43_reset(FAR struct sdio_dev_s *dev)
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lpc43_putreg(SDMMC_CTRL_CNTLRRESET | SDMMC_CTRL_FIFORESET |
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SDMMC_CTRL_DMARESET, LPC43_SDMMC_CTRL);
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while ((regval = lpc43_getreg(LPC43_SDMMC_CTRL)) &
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(SDMMC_CTRL_CNTLRRESET | SDMMC_CTRL_FIFORESET | SDMMC_CTRL_DMARESET));
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while ((lpc43_getreg(LPC43_SDMMC_CTRL) &
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(SDMMC_CTRL_CNTLRRESET | SDMMC_CTRL_FIFORESET | SDMMC_CTRL_DMARESET)) != 0)
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{
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}
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/* Reset data */
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@ -1277,18 +1259,17 @@ static void lpc43_reset(FAR struct sdio_dev_s *dev)
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priv->widebus = true; /* Required for DMA support */
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priv->cdstatus = 0; /* Card status is unknown */
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regval = 0;
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#ifdef CONFIG_LPC43_SDMMC_DMA
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priv->dmamode = false; /* true: DMA mode transfer */
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/* Use the Internal DMA */
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regval = SDMMC_CTRL_INTDMA;
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#endif
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/* Select 1-bit wide bus */
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lpc43_putreg(SDMMC_CTYPE_WIDTH1, LPC43_SDMMC_CTYPE);
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/* Enable interrupts */
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regval = lpc43_getreg(LPC43_SDMMC_CTRL);
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regval |= SDMMC_CTRL_INTENABLE;
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lpc43_putreg(regval, LPC43_SDMMC_CTRL);
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@ -1400,8 +1381,6 @@ static void lpc43_widebus(FAR struct sdio_dev_s *dev, bool wide)
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struct lpc43_dev_s *priv = (struct lpc43_dev_s *)dev;
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mcinfo("wide=%d\n", wide);
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priv->widebus = wide;
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}
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/****************************************************************************
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@ -1421,9 +1400,11 @@ static void lpc43_widebus(FAR struct sdio_dev_s *dev, bool wide)
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static void lpc43_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
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{
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struct lpc43_dev_s *priv = (struct lpc43_dev_s *)dev;
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uint8_t clkdiv;
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uint8_t ctype;
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bool enabled = false;
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bool widebus = false;
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switch (rate)
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{
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@ -1434,6 +1415,7 @@ static void lpc43_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
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clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_INIT);
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ctype = SDCARD_BUS_D1;
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enabled = false;
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widebus = false;
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return;
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break;
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@ -1443,6 +1425,7 @@ static void lpc43_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
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clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_INIT);
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ctype = SDCARD_BUS_D1;
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enabled = true;
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widebus = false;
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break;
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/* Enable in MMC normal operation clocking */
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@ -1451,6 +1434,7 @@ static void lpc43_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
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clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_MMCXFR);
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ctype = SDCARD_BUS_D1;
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enabled = true;
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widebus = false;
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break;
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/* SD normal operation clocking (wide 4-bit mode) */
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@ -1460,6 +1444,7 @@ static void lpc43_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
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clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_SDWIDEXFR);
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ctype = SDCARD_BUS_D4;
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enabled = true;
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widebus = true;
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break;
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#endif
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@ -1469,12 +1454,16 @@ static void lpc43_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
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clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_SDXFR);
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ctype = SDCARD_BUS_D1;
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enabled = true;
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widebus = false;
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break;
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}
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/* Setup the type of card bus wide */
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/* Setup the card bus width */
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lpc43_settype(ctype);
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mcinfo("widebus=%d\n", widebus);
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priv->widebus = widebus;
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lpc43_putreg(ctype, LPC43_SDMMC_CTYPE);
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/* Set the new clock frequency division */
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@ -1516,7 +1505,7 @@ static int lpc43_attach(FAR struct sdio_dev_s *dev)
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*/
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lpc43_putreg(0, LPC43_SDMMC_INTMASK);
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lpc43_putreg(SDMMC_INT_ALL , LPC43_SDMMC_RINTSTS);
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lpc43_putreg(SDMMC_INT_ALL, LPC43_SDMMC_RINTSTS);
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/* Enable Interrupts to happen when the INTMASK is activated */
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@ -1647,6 +1636,9 @@ static int lpc43_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
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struct lpc43_dev_s *priv = (struct lpc43_dev_s *)dev;
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uint32_t blocksize;
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uint32_t bytecnt;
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#ifdef CONFIG_LPC43_SDMMC_DMA
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uint32_t regval;
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#endif
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mcinfo("nbytes=%ld\n", (long) nbytes);
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@ -1685,10 +1677,16 @@ static int lpc43_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
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lpc43_putreg(SDMMC_FIFOTH_RXWMARK(1), LPC43_SDMMC_FIFOTH);
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#ifdef CONFIG_LPC43_SDMMC_DMA
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/* Make sure that internal DMA is disabled */
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lpc43_putreg(0, LPC43_SDMMC_BMOD);
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regval = lpc43_getreg(LPC43_SDMMC_CTRL);
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regval &= ~SDMMC_CTRL_INTDMA;
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lpc43_putreg(regval, LPC43_SDMMC_CTRL);
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#endif
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/* Configure the transfer interrupts */
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lpc43_configxfrints(priv, SDCARD_RECV_MASK);
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@ -1718,6 +1716,9 @@ static int lpc43_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer
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size_t nbytes)
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{
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struct lpc43_dev_s *priv = (struct lpc43_dev_s *)dev;
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#ifdef CONFIG_LPC43_SDMMC_DMA
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uint32_t regval;
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#endif
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mcinfo("nbytes=%ld\n", (long)nbytes);
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@ -1740,10 +1741,16 @@ static int lpc43_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer
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lpc43_putreg(SDMMC_FIFOTH_TXWMARK(LPC43_TXFIFO_DEPTH / 2),
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LPC43_SDMMC_FIFOTH);
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#ifdef CONFIG_LPC43_SDMMC_DMA
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/* Make sure that internal DMA is disabled */
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lpc43_putreg(0, LPC43_SDMMC_BMOD);
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regval = lpc43_getreg(LPC43_SDMMC_CTRL);
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regval &= ~SDMMC_CTRL_INTDMA;
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lpc43_putreg(regval, LPC43_SDMMC_CTRL);
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#endif
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/* Configure the transfer interrupts */
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lpc43_configxfrints(priv, SDCARD_SEND_MASK);
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@ -2388,13 +2395,13 @@ static int lpc43_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
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priv->wrdir = false;
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priv->dmamode = true;
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/* Reset DMA */
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/* Reset the FIFO and DMA */
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regval = lpc43_getreg(LPC43_SDMMC_CTRL);
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regval |= SDMMC_CTRL_FIFORESET | SDMMC_CTRL_DMARESET;
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lpc43_putreg(regval, LPC43_SDMMC_CTRL);
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while (lpc43_getreg(LPC43_SDMMC_CTRL) & SDMMC_CTRL_DMARESET)
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while ((lpc43_getreg(LPC43_SDMMC_CTRL) & SDMMC_CTRL_DMARESET) != 0)
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{
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}
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@ -2461,11 +2468,18 @@ static int lpc43_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
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/* Enable internal DMA, burst size of 4, fixed burst */
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regval = lpc43_getreg(LPC43_SDMMC_CTRL);
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regval |= SDMMC_CTRL_INTDMA;
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lpc43_putreg(regval, LPC43_SDMMC_CTRL);
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regval = SDMMC_BMOD_DE | SDMMC_BMOD_PBL_4XFRS | SDMMC_BMOD_DSL(4);
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lpc43_putreg(regval, LPC43_SDMMC_BMOD);
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/* Setup DMA error interrupts */
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lpc43_putreg(SDMMC_INT_ALL, LPC43_SDMMC_RINTSTS);
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lpc43_putreg(SDMMC_IDINTEN_ALL, LPC43_SDMMC_IDSTS);
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lpc43_configxfrints(priv, SDCARD_DMARECV_MASK);
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lpc43_configdmaints(priv, SDCARD_DMAERROR_MASK);
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return OK;
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@ -2527,12 +2541,13 @@ static int lpc43_dmasendsetup(FAR struct sdio_dev_s *dev,
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priv->wrdir = true;
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priv->dmamode = true;
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/* Reset DMA */
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/* Reset the FIFO and DMA */
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regval = lpc43_getreg(LPC43_SDMMC_CTRL);
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regval |= SDMMC_CTRL_FIFORESET | SDMMC_CTRL_DMARESET;
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lpc43_putreg(regval, LPC43_SDMMC_CTRL);
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while (lpc43_getreg(LPC43_SDMMC_CTRL) & SDMMC_CTRL_DMARESET)
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while ((lpc43_getreg(LPC43_SDMMC_CTRL) & SDMMC_CTRL_DMARESET) != 0)
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{
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}
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@ -2555,11 +2570,18 @@ static int lpc43_dmasendsetup(FAR struct sdio_dev_s *dev,
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/* Enable internal DMA, burst size of 4, fixed burst */
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regval = lpc43_getreg(LPC43_SDMMC_CTRL);
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regval |= SDMMC_CTRL_INTDMA;
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lpc43_putreg(regval, LPC43_SDMMC_CTRL);
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regval = SDMMC_BMOD_DE | SDMMC_BMOD_PBL_4XFRS | SDMMC_BMOD_DSL(4);
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lpc43_putreg(regval, LPC43_SDMMC_BMOD);
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/* Setup DMA error interrupts */
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lpc43_putreg(SDMMC_INT_ALL, LPC43_SDMMC_RINTSTS);
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lpc43_putreg(SDMMC_IDINTEN_ALL, LPC43_SDMMC_IDSTS);
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lpc43_configxfrints(priv, SDCARD_DMASEND_MASK);
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lpc43_configdmaints(priv, SDCARD_DMAERROR_MASK);
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return OK;
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@ -186,6 +186,7 @@
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/* Card type register CTYPE */
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#define SDMMC_CTYPE_WIDTH1 (0) /* 1-bit mode */
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#define SDMMC_CTYPE_WIDTH4 (1 << 0) /* Bit 0: 4-bit mode */
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/* Bits 1-15: Reserved */
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#define SDMMC_CTYPE_WIDTH8 (1 << 16) /* Bit 16: 8-bit mode */
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@ -383,6 +384,7 @@
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#define SDMMC_IDINTEN_NIS (1 << 8) /* Bit 8: Normal Interrupt Summary */
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#define SDMMC_IDINTEN_AIS (1 << 9) /* Bit 9: Abnormal Interrupt Summary */
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/* Bits 10-31: Reserved */
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#define SDMMC_IDINTEN_ALL 0x00000333
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/* Card threshold control */
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@ -272,7 +272,6 @@ static void lpc54_checksetup(void);
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static void lpc54_takesem(struct lpc54_dev_s *priv);
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#define lpc54_givesem(priv) (sem_post(&priv->waitsem))
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static inline void lpc54_setclock(uint32_t clkdiv);
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static inline void lpc54_settype(uint32_t ctype);
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static inline void lpc54_sdcard_clock(bool enable);
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static int lpc54_ciu_sendcmd(uint32_t cmd, uint32_t arg);
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static void lpc54_configwaitints(struct lpc54_dev_s *priv, uint32_t waitmask,
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@ -572,25 +571,6 @@ static inline void lpc54_setclock(uint32_t clkdiv)
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lpc54_ciu_sendcmd(SDMMC_CMD_UPDCLOCK | SDMMC_CMD_WAITPREV, 0);
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}
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/****************************************************************************
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* Name: lpc54_settype
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*
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* Description: Define the Bus Size of SDCard (1, 4 or 8-bit)
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*
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* Input Parameters:
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* ctype - A new CTYPE (Card Type Register) value
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static inline void lpc54_settype(uint32_t ctype)
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{
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mcinfo("cteype=%08lx\n", (unsigned long)ctype);
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lpc54_putreg(ctype, LPC54_SDMMC_CTYPE);
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}
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/****************************************************************************
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* Name: lpc54_sdcard_clock
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*
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@ -1252,8 +1232,10 @@ static void lpc54_reset(FAR struct sdio_dev_s *dev)
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lpc54_putreg(SDMMC_CTRL_CNTLRRESET | SDMMC_CTRL_FIFORESET |
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SDMMC_CTRL_DMARESET, LPC54_SDMMC_CTRL);
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while ((regval = lpc54_getreg(LPC54_SDMMC_CTRL)) &
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(SDMMC_CTRL_CNTLRRESET | SDMMC_CTRL_FIFORESET | SDMMC_CTRL_DMARESET));
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while ((lpc54_getreg(LPC54_SDMMC_CTRL) &
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(SDMMC_CTRL_CNTLRRESET | SDMMC_CTRL_FIFORESET | SDMMC_CTRL_DMARESET)) != 0)
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{
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}
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/* Reset data */
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@ -1277,18 +1259,17 @@ static void lpc54_reset(FAR struct sdio_dev_s *dev)
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priv->widebus = true; /* Required for DMA support */
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priv->cdstatus = 0; /* Card status is unknown */
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regval = 0;
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#ifdef CONFIG_LPC54_SDMMC_DMA
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priv->dmamode = false; /* true: DMA mode transfer */
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/* Use the Internal DMA */
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regval = SDMMC_CTRL_INTDMA;
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#endif
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/* Select 1-bit wide bus */
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lpc54_putreg(SDMMC_CTYPE_WIDTH1, LPC54_SDMMC_CTYPE);
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/* Enable interrupts */
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regval = lpc54_getreg(LPC54_SDMMC_CTRL);
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regval |= SDMMC_CTRL_INTENABLE;
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lpc54_putreg(regval, LPC54_SDMMC_CTRL);
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@ -1400,8 +1381,6 @@ static void lpc54_widebus(FAR struct sdio_dev_s *dev, bool wide)
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struct lpc54_dev_s *priv = (struct lpc54_dev_s *)dev;
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mcinfo("wide=%d\n", wide);
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priv->widebus = wide;
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}
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/****************************************************************************
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@ -1421,9 +1400,11 @@ static void lpc54_widebus(FAR struct sdio_dev_s *dev, bool wide)
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static void lpc54_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
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{
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struct lpc54_dev_s *priv = (struct lpc54_dev_s *)dev;
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uint8_t clkdiv;
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uint8_t ctype;
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bool enabled = false;
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bool widebus = false;
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switch (rate)
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{
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@ -1434,6 +1415,7 @@ static void lpc54_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
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clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_INIT);
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ctype = SDCARD_BUS_D1;
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enabled = false;
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widebus = false;
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return;
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break;
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@ -1443,6 +1425,7 @@ static void lpc54_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
|
||||
clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_INIT);
|
||||
ctype = SDCARD_BUS_D1;
|
||||
enabled = true;
|
||||
widebus = false;
|
||||
break;
|
||||
|
||||
/* Enable in MMC normal operation clocking */
|
||||
@ -1451,6 +1434,7 @@ static void lpc54_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
|
||||
clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_MMCXFR);
|
||||
ctype = SDCARD_BUS_D1;
|
||||
enabled = true;
|
||||
widebus = false;
|
||||
break;
|
||||
|
||||
/* SD normal operation clocking (wide 4-bit mode) */
|
||||
@ -1460,6 +1444,7 @@ static void lpc54_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
|
||||
clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_SDWIDEXFR);
|
||||
ctype = SDCARD_BUS_D4;
|
||||
enabled = true;
|
||||
widebus = true;
|
||||
break;
|
||||
#endif
|
||||
|
||||
@ -1469,12 +1454,16 @@ static void lpc54_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
|
||||
clkdiv = SDMMC_CLKDIV0(BOARD_CLKDIV_SDXFR);
|
||||
ctype = SDCARD_BUS_D1;
|
||||
enabled = true;
|
||||
widebus = false;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Setup the type of card bus wide */
|
||||
/* Setup the card bus width */
|
||||
|
||||
lpc54_settype(ctype);
|
||||
mcinfo("widebus=%d\n", widebus);
|
||||
|
||||
priv->widebus = widebus;
|
||||
lpc54_putreg(ctype, LPC54_SDMMC_CTYPE);
|
||||
|
||||
/* Set the new clock frequency division */
|
||||
|
||||
@ -1516,7 +1505,7 @@ static int lpc54_attach(FAR struct sdio_dev_s *dev)
|
||||
*/
|
||||
|
||||
lpc54_putreg(0, LPC54_SDMMC_INTMASK);
|
||||
lpc54_putreg(SDMMC_INT_ALL , LPC54_SDMMC_RINTSTS);
|
||||
lpc54_putreg(SDMMC_INT_ALL, LPC54_SDMMC_RINTSTS);
|
||||
|
||||
/* Enable Interrupts to happen when the INTMASK is activated */
|
||||
|
||||
@ -1647,6 +1636,9 @@ static int lpc54_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
|
||||
struct lpc54_dev_s *priv = (struct lpc54_dev_s *)dev;
|
||||
uint32_t blocksize;
|
||||
uint32_t bytecnt;
|
||||
#ifdef CONFIG_LPC54_SDMMC_DMA
|
||||
uint32_t regval;
|
||||
#endif
|
||||
|
||||
mcinfo("nbytes=%ld\n", (long) nbytes);
|
||||
|
||||
@ -1685,10 +1677,16 @@ static int lpc54_recvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
|
||||
|
||||
lpc54_putreg(SDMMC_FIFOTH_RXWMARK(1), LPC54_SDMMC_FIFOTH);
|
||||
|
||||
#ifdef CONFIG_LPC54_SDMMC_DMA
|
||||
/* Make sure that internal DMA is disabled */
|
||||
|
||||
lpc54_putreg(0, LPC54_SDMMC_BMOD);
|
||||
|
||||
regval = lpc54_getreg(LPC54_SDMMC_CTRL);
|
||||
regval &= ~SDMMC_CTRL_INTDMA;
|
||||
lpc54_putreg(regval, LPC54_SDMMC_CTRL);
|
||||
#endif
|
||||
|
||||
/* Configure the transfer interrupts */
|
||||
|
||||
lpc54_configxfrints(priv, SDCARD_RECV_MASK);
|
||||
@ -1718,6 +1716,9 @@ static int lpc54_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer
|
||||
size_t nbytes)
|
||||
{
|
||||
struct lpc54_dev_s *priv = (struct lpc54_dev_s *)dev;
|
||||
#ifdef CONFIG_LPC54_SDMMC_DMA
|
||||
uint32_t regval;
|
||||
#endif
|
||||
|
||||
mcinfo("nbytes=%ld\n", (long)nbytes);
|
||||
|
||||
@ -1740,10 +1741,16 @@ static int lpc54_sendsetup(FAR struct sdio_dev_s *dev, FAR const uint8_t *buffer
|
||||
lpc54_putreg(SDMMC_FIFOTH_TXWMARK(LPC54_TXFIFO_DEPTH / 2),
|
||||
LPC54_SDMMC_FIFOTH);
|
||||
|
||||
#ifdef CONFIG_LPC54_SDMMC_DMA
|
||||
/* Make sure that internal DMA is disabled */
|
||||
|
||||
lpc54_putreg(0, LPC54_SDMMC_BMOD);
|
||||
|
||||
regval = lpc54_getreg(LPC54_SDMMC_CTRL);
|
||||
regval &= ~SDMMC_CTRL_INTDMA;
|
||||
lpc54_putreg(regval, LPC54_SDMMC_CTRL);
|
||||
#endif
|
||||
|
||||
/* Configure the transfer interrupts */
|
||||
|
||||
lpc54_configxfrints(priv, SDCARD_SEND_MASK);
|
||||
@ -2388,13 +2395,13 @@ static int lpc54_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
|
||||
priv->wrdir = false;
|
||||
priv->dmamode = true;
|
||||
|
||||
/* Reset DMA */
|
||||
/* Reset the FIFO and DMA */
|
||||
|
||||
regval = lpc54_getreg(LPC54_SDMMC_CTRL);
|
||||
regval |= SDMMC_CTRL_FIFORESET | SDMMC_CTRL_DMARESET;
|
||||
lpc54_putreg(regval, LPC54_SDMMC_CTRL);
|
||||
|
||||
while (lpc54_getreg(LPC54_SDMMC_CTRL) & SDMMC_CTRL_DMARESET)
|
||||
while ((lpc54_getreg(LPC54_SDMMC_CTRL) & SDMMC_CTRL_DMARESET) != 0)
|
||||
{
|
||||
}
|
||||
|
||||
@ -2461,11 +2468,18 @@ static int lpc54_dmarecvsetup(FAR struct sdio_dev_s *dev, FAR uint8_t *buffer,
|
||||
|
||||
/* Enable internal DMA, burst size of 4, fixed burst */
|
||||
|
||||
regval = lpc54_getreg(LPC54_SDMMC_CTRL);
|
||||
regval |= SDMMC_CTRL_INTDMA;
|
||||
lpc54_putreg(regval, LPC54_SDMMC_CTRL);
|
||||
|
||||
regval = SDMMC_BMOD_DE | SDMMC_BMOD_PBL_4XFRS | SDMMC_BMOD_DSL(4);
|
||||
lpc54_putreg(regval, LPC54_SDMMC_BMOD);
|
||||
|
||||
/* Setup DMA error interrupts */
|
||||
|
||||
lpc54_putreg(SDMMC_INT_ALL, LPC54_SDMMC_RINTSTS);
|
||||
lpc54_putreg(SDMMC_IDINTEN_ALL, LPC54_SDMMC_IDSTS);
|
||||
|
||||
lpc54_configxfrints(priv, SDCARD_DMARECV_MASK);
|
||||
lpc54_configdmaints(priv, SDCARD_DMAERROR_MASK);
|
||||
return OK;
|
||||
@ -2527,12 +2541,13 @@ static int lpc54_dmasendsetup(FAR struct sdio_dev_s *dev,
|
||||
priv->wrdir = true;
|
||||
priv->dmamode = true;
|
||||
|
||||
/* Reset DMA */
|
||||
/* Reset the FIFO and DMA */
|
||||
|
||||
regval = lpc54_getreg(LPC54_SDMMC_CTRL);
|
||||
regval |= SDMMC_CTRL_FIFORESET | SDMMC_CTRL_DMARESET;
|
||||
lpc54_putreg(regval, LPC54_SDMMC_CTRL);
|
||||
while (lpc54_getreg(LPC54_SDMMC_CTRL) & SDMMC_CTRL_DMARESET)
|
||||
|
||||
while ((lpc54_getreg(LPC54_SDMMC_CTRL) & SDMMC_CTRL_DMARESET) != 0)
|
||||
{
|
||||
}
|
||||
|
||||
@ -2555,11 +2570,18 @@ static int lpc54_dmasendsetup(FAR struct sdio_dev_s *dev,
|
||||
|
||||
/* Enable internal DMA, burst size of 4, fixed burst */
|
||||
|
||||
regval = lpc54_getreg(LPC54_SDMMC_CTRL);
|
||||
regval |= SDMMC_CTRL_INTDMA;
|
||||
lpc54_putreg(regval, LPC54_SDMMC_CTRL);
|
||||
|
||||
regval = SDMMC_BMOD_DE | SDMMC_BMOD_PBL_4XFRS | SDMMC_BMOD_DSL(4);
|
||||
lpc54_putreg(regval, LPC54_SDMMC_BMOD);
|
||||
|
||||
/* Setup DMA error interrupts */
|
||||
|
||||
lpc54_putreg(SDMMC_INT_ALL, LPC54_SDMMC_RINTSTS);
|
||||
lpc54_putreg(SDMMC_IDINTEN_ALL, LPC54_SDMMC_IDSTS);
|
||||
|
||||
lpc54_configxfrints(priv, SDCARD_DMASEND_MASK);
|
||||
lpc54_configdmaints(priv, SDCARD_DMAERROR_MASK);
|
||||
return OK;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user