diff --git a/arch/arm/src/arm/up_head.S b/arch/arm/src/arm/up_head.S index cbfc645007..d9f8166b28 100644 --- a/arch/arm/src/arm/up_head.S +++ b/arch/arm/src/arm/up_head.S @@ -503,7 +503,7 @@ __start: /* Remove the temporary mapping (if one was made). The following assumes * that the total RAM size is > 1Mb and extends that initial mapping to - * cover additinal RAM sections. + * cover additional RAM sections. */ #ifndef CONFIG_ARCH_ROMPGTABLE @@ -531,18 +531,26 @@ __start: #elif defined(CONFIG_BOOT_RUNFROMFLASH) # error "Logic not implemented" #else - /* Now setup the pagetables for our normal SDRAM mappings mapped region. + /* Get the following value (if we did not already do so above): + * + * R4 = Virtual address of the page table + * R3 = Physical address of the NuttX execution space (aligned to a + * one megabyte addres boundary + */ + +#ifdef CONFIG_IDENTITY_TEXTMAP + ldr r4, .LCvpgtable /* r4=virtual page table */ +#endif + ldr r3, .LCnuttxpaddr /* r3=Aligned Nuttx start address (physical) */ + + /* Now setup the page tables for our normal mapped execution region. * We round NUTTX_START_VADDR down to the nearest megabyte boundary. */ ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */ add r3, r3, r1 /* r3=flags + base */ - add r0, r4, #(NUTTX_START_VADDR & 0xff000000) >> 18 - bic r2, r3, #0x00f00000 - str r2, [r0] - - add r0, r0, #(NUTTX_START_VADDR & 0x00f00000) >> 18 + add r0, r4, #(NUTTX_START_VADDR & 0xfff00000) >> 18 str r3, [r0], #4 /* Now map the remaining RX_NSECTIONS-1 sections of the executable @@ -623,6 +631,13 @@ __start: .long _ebss .long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4 +#if !defined(CONFIG_PAGING) && !defined(CONFIG_BOOT_RUNFROMFLASH) + +.LCnuttxpaddr: + .long NUTTX_START_PADDR & 0xfff00000 + +#endif + #ifdef CONFIG_PAGING .Ldataspan: diff --git a/arch/arm/src/armv7-a/arm_head.S b/arch/arm/src/armv7-a/arm_head.S index c9228e57c0..b8bfad7568 100644 --- a/arch/arm/src/armv7-a/arm_head.S +++ b/arch/arm/src/armv7-a/arm_head.S @@ -195,7 +195,7 @@ */ #ifdef CONFIG_ARCH_LOWVECTORS -# warning "REVISIT" +# warning REVISIT #endif //#ifndef CONFIG_ARCH_LOWVECTORS @@ -594,7 +594,7 @@ __start: /* Remove the temporary mapping (if one was made). The following assumes * that the total RAM size is > 1Mb and extends that initial mapping to - * cover additinal RAM sections. + * cover additional RAM sections. */ #ifndef CONFIG_ARCH_ROMPGTABLE @@ -622,18 +622,26 @@ __start: #elif defined(CONFIG_BOOT_RUNFROMFLASH) # error "Logic not implemented" #else - /* Now setup the pagetables for our normal SDRAM mappings mapped region. + /* Get the following value (if we did not already do so above): + * + * R4 = Virtual address of the page table + * R3 = Physical address of the NuttX execution space (aligned to a + * one megabyte addres boundary + */ + +#ifdef CONFIG_IDENTITY_TEXTMAP + ldr r4, .LCvpgtable /* r4=virtual page table */ +#endif + ldr r3, .LCnuttxpaddr /* r3=Aligned Nuttx start address (physical) */ + + /* Now setup the page tables for our normal mapped execution region. * We round NUTTX_START_VADDR down to the nearest megabyte boundary. */ ldr r1, .LCmmuflags /* FLGS=MMU_MEMFLAGS */ add r3, r3, r1 /* r3=flags + base */ - add r0, r4, #(NUTTX_START_VADDR & 0xff000000) >> 18 - bic r2, r3, #0x00f00000 - str r2, [r0] - - add r0, r0, #(NUTTX_START_VADDR & 0x00f00000) >> 18 + add r0, r4, #(NUTTX_START_VADDR & 0xfff00000) >> 18 str r3, [r0], #4 /* Now map the remaining RX_NSECTIONS-1 sections of the executable @@ -714,6 +722,13 @@ __start: .long _ebss .long _ebss+CONFIG_IDLETHREAD_STACKSIZE-4 +#if !defined(CONFIG_PAGING) && !defined(CONFIG_BOOT_RUNFROMFLASH) + +.LCnuttxpaddr: + .long NUTTX_START_PADDR & 0xfff00000 + +#endif + #ifdef CONFIG_PAGING .Ldataspan: diff --git a/arch/arm/src/dm320/dm320_memorymap.h b/arch/arm/src/dm320/dm320_memorymap.h index b800bf1def..edcf4312c8 100644 --- a/arch/arm/src/dm320/dm320_memorymap.h +++ b/arch/arm/src/dm320/dm320_memorymap.h @@ -176,6 +176,7 @@ */ #define NUTTX_START_VADDR (DM320_SDRAM_VADDR+PGTABLE_SIZE) +#define NUTTX_START_PADDR (DM320_SDRAM_PADDR+PGTABLE_SIZE) /* Section MMU Flags Flags CW */ #define DM320_FLASH_MMUFLAGS MMU_IOFLAGS /* -- */ diff --git a/arch/arm/src/imx/imx_memorymap.h b/arch/arm/src/imx/imx_memorymap.h index 55493a3908..f528ff8730 100644 --- a/arch/arm/src/imx/imx_memorymap.h +++ b/arch/arm/src/imx/imx_memorymap.h @@ -217,6 +217,7 @@ */ #define NUTTX_START_VADDR ((CONFIG_DRAM_NUTTXENTRY & 0xfff00000) | PGTABLE_SIZE) +#define NUTTX_START_PADDR (IMX_SDRAM0_PSECTION | PGTABLE_SIZE) #if NUTTX_START_VADDR != CONFIG_DRAM_NUTTXENTRY # error "CONFIG_DRAM_NUTTXENTRY does not have correct offset for page table" diff --git a/arch/arm/src/lpc31xx/lpc31_memorymap.h b/arch/arm/src/lpc31xx/lpc31_memorymap.h index dfe2bc16d1..ba77c7eea2 100644 --- a/arch/arm/src/lpc31xx/lpc31_memorymap.h +++ b/arch/arm/src/lpc31xx/lpc31_memorymap.h @@ -247,12 +247,16 @@ #if defined(CONFIG_BOOT_RUNFROMFLASH) # define NUTTX_START_VADDR LPC31_MPMC_VADDR +# define NUTTX_START_PADDR LPC31_MPMC_PADDR #elif defined(CONFIG_BOOT_RUNFROMSDRAM) # define NUTTX_START_VADDR LPC31_EXTSDRAM0_VSECTION +# define NUTTX_START_PADDR LPC31_EXTSDRAM0_PSECTION #elif defined(CONFIG_BOOT_RUNFROMEXTSRAM) # define NUTTX_START_VADDR LPC31_EXTSRAM0_VADDR +# define NUTTX_START_PADDR LPC31_EXTSRAM0_PADDR #else /* CONFIG_BOOT_RUNFROMISRAM, CONFIG_PAGING */ # define NUTTX_START_VADDR LPC31_INTSRAM0_VADDR +# define NUTTX_START_PADDR LPC31_INTSRAM0_PADDR #endif /* Determine the address of the MMU page table. We will try to place that page diff --git a/arch/arm/src/sama5/chip/sama5d3x_memorymap.h b/arch/arm/src/sama5/chip/sama5d3x_memorymap.h index 2396c806aa..b07f9043c8 100644 --- a/arch/arm/src/sama5/chip/sama5d3x_memorymap.h +++ b/arch/arm/src/sama5/chip/sama5d3x_memorymap.h @@ -379,12 +379,16 @@ #if defined(CONFIG_BOOT_RUNFROMFLASH) # define NUTTX_START_VADDR CONFIG_SAMA5_NORFLASH_VBASE +# define NUTTX_START_PADDR CONFIG_SAMA5_NORFLASH_PBASE #elif defined(CONFIG_BOOT_RUNFROMSDRAM) # define NUTTX_START_VADDR SAM_DDRCS_VSECTION +# define NUTTX_START_PADDR SAM_DDRCS_PSECTION #elif defined(CONFIG_BOOT_RUNFROMEXTSRAM) # define NUTTX_START_VADDR CONFIG_SAMA5_SRAM_VBASE +# define NUTTX_START_PADDR CONFIG_SAMA5_SRAM_PBASE #else /* CONFIG_BOOT_RUNFROMISRAM, CONFIG_PAGING */ # define NUTTX_START_VADDR SAM_ISRAM_VSECTION +# define NUTTX_START_PADDR SAM_ISRAM_PSECTION #endif /* MMU Page Table Location diff --git a/arch/arm/src/sama5/sam_boot.c b/arch/arm/src/sama5/sam_boot.c index af8c466794..6f73246710 100644 --- a/arch/arm/src/sama5/sam_boot.c +++ b/arch/arm/src/sama5/sam_boot.c @@ -311,7 +311,7 @@ static void sam_vectormapping(void) uint32_t vector_size = (uint32_t)&_vector_end - (uint32_t)&_vector_start; uint32_t end_paddr = SAM_VECTOR_PADDR + vector_size; - /* REVISIT: Cannot really assert in this context */ + /* REVISIT: Can really assert in this context */ DEBUGASSERT (vector_size <= VECTOR_TABLE_SIZE);