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Fix a few compile related issues from the last commit

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This commit is contained in:
Gregory Nutt 2016-11-26 12:23:09 -06:00
parent aae306e942
commit 6ff6da083f
3 changed files with 20 additions and 18 deletions
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18
arch/arm/include/arm/spinlock.h
View File

@ -36,22 +36,4 @@
#ifndef __ARCH_ARM_INCLUDE_ARM_SPINLOCK_H
#define __ARCH_ARM_INCLUDE_ARM_SPINLOCK_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_SMP
/* In SMP configurations, save spinlocks and other inter-CPU communications
* data in a non-cached memory region.
*/
# define SP_SECTION __attribute__((section(.nocache)))
#endif
#endif /* __ARCH_ARM_INCLUDE_ARM_SPINLOCK_H */

18
arch/arm/include/armv7-a/spinlock.h
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@ -36,4 +36,22 @@
#ifndef __ARCH_ARM_INCLUDE_ARMV7_A_SPINLOCK_H
#define __ARCH_ARM_INCLUDE_ARMV7_A_SPINLOCK_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_SMP
/* In SMP configurations, save spinlocks and other inter-CPU communications
* data in a non-cached memory region.
*/
# define SP_SECTION __attribute__((section(".nocache")))
#endif
#endif /* __ARCH_ARM_INCLUDE_ARMV7_A_SPINLOCK_H */

2
arch/arm/src/imx6/imx_boot.c
View File

@ -240,6 +240,8 @@ static void imx_intercpu_mapping(void)
uint32_t intercpu_vaddr = INTERCPU_VADDR & PTE_SMALL_PADDR_MASK;
uint32_t end_paddr = INTERCPU_PADDR + INTERCPU_SIZE;
DEBUGASSERT(intercpu_vaddr == (uint32_t)&_snocache);
/* We want to keep the inter-cpu region in on-chip RAM (OCRAM). The
* i.MX6 has 256Kb of OCRAM positioned at physical address 0x0090:0000.
*/