The LPC54608 can only run at a maximum frequency of 180Mhz. This configuration requires uses the clk_in, external crystal clock, to drive the PLL. When that input was selected, the board bootup failed waiting for the PLL to lock. After referring the driver from NXP, we should turn on power sources for the ext clock if system pll input select clk_in. NOTE that the LPC54628 did not require this step... perhaps because the system oscillator power was already enabled.
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@ -1,7 +1,7 @@
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/****************************************************************************
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* arch/arm/src/lpc54628/lpc54_clockconfig.c
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Copyright (C) 2017-2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Parts of this file were adapted from sample code provided for the LPC54xx
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@ -284,10 +284,34 @@ void lpc54_clockconfig(FAR const struct pll_setup_s *pllsetup)
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lpc54_set_flash_waitstates(pllsetup->pllfout);
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/* Set up the PLL clock source to FRO 12MHz */
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/* Set up the PLL clock source as specified by PLL configuration. */
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putreg32(pllsetup->pllclksel, LPC54_SYSCON_SYSPLLCLKSEL);
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/* Check if the selected PLL clock source is clk_in, the external clock
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* that comes from a crystal oscillator.
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*/
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if (pllsetup->pllclksel == SYSCON_SYSPLLCLKSEL_CLKIN)
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{
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/* If so, provide power for the external clock.
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*
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* VD2ANA - Analog supply for System Oscillator
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* SYSOSC - System oscillator power.
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*
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* REVISIT: This was not necessary for the LPC54628 but kxjiang
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* <kxjiangs@gmail.com> reports this to be necessary for the
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* LPC54608 when the CLKIN source is selected. This has not been
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* re-verified on the LPC54628.
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*
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* REVISIT: Note that these power supplies are not disabled if a
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* different clock source is selected. Should they be?
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*/
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putreg32(SYSCON_PDRUNCFG0_VD2ANA, LPC54_SYSCON_PDRUNCFGCLR0);
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putreg32(SYSCON_PDRUNCFG1_SYSOSC, LPC54_SYSCON_PDRUNCFGCLR1);
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}
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/* Configure the PLL */
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lpc54_configure_pll(pllsetup);
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