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Replace irqsave() with enter_critical_section(); replace irqrestore() with leave_critical_section()

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This commit is contained in:
Gregory Nutt 2016-02-13 19:11:09 -06:00
parent 3caffdd82e
commit 70e502adb0
312 changed files with 2038 additions and 2232 deletions
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31
arch/arm/src/a1x/a1x_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/a1x/a1x_irq.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -45,7 +45,6 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "up_arch.h"
#include "up_internal.h"
@ -54,24 +53,12 @@
#include "a1x_pio.h"
#include "a1x_irq.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@ -91,7 +78,7 @@ static void a1x_dumpintc(const char *msg, int irq)
/* Dump some relevant ARMv7 register contents */
flags = irqsave();
flags = enter_critical_section();
lldbg("ARMv7 (%s, irq=%d):\n", msg, irq);
lldbg(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
@ -126,7 +113,7 @@ static void a1x_dumpintc(const char *msg, int irq)
getreg32(A1X_INTC_PRIO0), getreg32(A1X_INTC_PRIO1),
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
getreg32(A1X_INTC_PRIO4));
irqrestore(flags);
leave_critical_section(flags);
}
#else
# define a1x_dumpintc(msg, irq)
@ -339,7 +326,7 @@ void up_disable_irq(int irq)
{
/* These operations must be atomic */
flags = irqsave();
flags = enter_critical_section();
/* Make sure that the interrupt is disabled. */
@ -356,7 +343,7 @@ void up_disable_irq(int irq)
putreg32(regval, regaddr);
a1x_dumpintc("disable", irq);
irqrestore(flags);
leave_critical_section(flags);
}
#ifdef CONFIG_A1X_PIO_IRQ
@ -387,7 +374,7 @@ void up_enable_irq(int irq)
{
/* These operations must be atomic */
flags = irqsave();
flags = enter_critical_section();
/* Make sure that the interrupt is enabled. */
@ -404,7 +391,7 @@ void up_enable_irq(int irq)
putreg32(regval, regaddr);
a1x_dumpintc("enable", irq);
irqrestore(flags);
leave_critical_section(flags);
}
#ifdef CONFIG_A1X_PIO_IRQ
@ -440,7 +427,7 @@ int up_prioritize_irq(int irq, int priority)
{
/* These operations must be atomic */
flags = irqsave();
flags = enter_critical_section();
/* Set the new priority */
@ -451,7 +438,7 @@ int up_prioritize_irq(int irq, int priority)
putreg32(regval, regaddr);
a1x_dumpintc("prioritize", irq);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}

17
arch/arm/src/a1x/a1x_pio.c
View File

@ -44,6 +44,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
@ -232,7 +233,7 @@ int a1x_pio_config(pio_pinset_t cfgset)
/* Disable interrupts to prohibit re-entrance. */
flags = irqsave();
flags = enter_critical_section();
/* Set the peripheral ID (0=input, 1=output) and interrupt mode */
@ -333,7 +334,7 @@ int a1x_pio_config(pio_pinset_t cfgset)
putreg32(regval, dataddr);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -355,7 +356,7 @@ void a1x_pio_write(pio_pinset_t pinset, bool value)
/* Disable interrupts to prohibit re-entrance. */
flags = irqsave();
flags = enter_critical_section();
/* Set the output value (will have no effect on inputs */
@ -372,7 +373,7 @@ void a1x_pio_write(pio_pinset_t pinset, bool value)
}
putreg32(regval, regaddr);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -422,10 +423,10 @@ void a1x_pio_irqenable(int irq)
* register.
*/
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(A1X_PIO_INT_CTL);
regval |= PIO_INT_CTL(irq);
irqrestore(flags);
leave_critical_section(flags);
}
}
#endif
@ -455,10 +456,10 @@ void a1x_pio_irqdisable(int irq)
* register.
*/
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(A1X_PIO_INT_CTL);
regval &= ~PIO_INT_CTL(irq);
irqrestore(flags);
leave_critical_section(flags);
}
}
#endif

44
arch/arm/src/a1x/a1x_serial.c
View File

@ -755,7 +755,7 @@ static inline void a1x_uart0config(void)
/* Step 1: Enable power to UART0 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART0 */
@ -765,7 +765,7 @@ static inline void a1x_uart0config(void)
a1x_pio_config(PIO_UART0_TX);
a1x_pio_config(PIO_UART0_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -776,7 +776,7 @@ static inline void a1x_uart1config(void)
/* Step 1: Enable power to UART1 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART1 */
@ -786,7 +786,7 @@ static inline void a1x_uart1config(void)
a1x_pio_config(PIO_UART1_TX);
a1x_pio_config(PIO_UART1_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -797,7 +797,7 @@ static inline void a1x_uart2config(void)
/* Step 1: Enable power to UART2 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking on UART2 */
@ -807,7 +807,7 @@ static inline void a1x_uart2config(void)
a1x_pio_config(PIO_UART2_TX);
a1x_pio_config(PIO_UART2_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -818,7 +818,7 @@ static inline void a1x_uart3config(void)
/* Step 1: Enable power to UART3 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART3 */
@ -828,7 +828,7 @@ static inline void a1x_uart3config(void)
a1x_pio_config(PIO_UART3_TX);
a1x_pio_config(PIO_UART3_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -839,7 +839,7 @@ static inline void a1x_uart4config(void)
/* Step 1: Enable power to UART4 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART4 */
@ -849,7 +849,7 @@ static inline void a1x_uart4config(void)
a1x_pio_config(PIO_UART4_TX);
a1x_pio_config(PIO_UART4_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -860,7 +860,7 @@ static inline void a1x_uart5config(void)
/* Step 1: Enable power to UART5 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART5 */
@ -870,7 +870,7 @@ static inline void a1x_uart5config(void)
a1x_pio_config(PIO_UART5_TX);
a1x_pio_config(PIO_UART5_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -881,7 +881,7 @@ static inline void a1x_uart6config(void)
/* Step 1: Enable power to UART6 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART6 */
@ -891,7 +891,7 @@ static inline void a1x_uart6config(void)
a1x_pio_config(PIO_UART6_TX);
a1x_pio_config(PIO_UART6_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -902,7 +902,7 @@ static inline void a1x_uart7config(void)
/* Step 1: Enable power to UART7 */
flags = irqsave();
flags = enter_critical_section();
#warning Missing logic
/* Step 2: Enable clocking to UART7 */
@ -912,7 +912,7 @@ static inline void a1x_uart7config(void)
a1x_pio_config(PIO_UART7_TX);
a1x_pio_config(PIO_UART7_RX);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -1292,18 +1292,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv, true);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_enablebreaks(priv, false);
irqrestore(flags);
leave_critical_section(flags);
}
break;
@ -1466,7 +1466,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@ -1486,7 +1486,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
up_serialout(priv, A1X_UART_IER_OFFSET, priv->ier);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

19
arch/arm/src/arm/up_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/arm/up_schedulesigaction.c
*
* Copyright (C) 2007-2010, 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2010, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "arm.h"
@ -52,18 +53,6 @@
#ifndef CONFIG_DISABLE_SIGNALS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@ -109,7 +98,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@ -198,7 +187,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */

6
arch/arm/src/armv6-m/up_dumpnvic.c
View File

@ -42,7 +42,7 @@
#include <sys/types.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
@ -81,7 +81,7 @@ void up_dumpnvic(FAR const char *msg)
/* The following requires exclusive access to the NVIC/SYSCON registers */
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC: %s\n", msg);
lldbg(" ISER: %08x ICER: %08x ISPR: %08x ICPR: %08x\n",
@ -105,7 +105,7 @@ void up_dumpnvic(FAR const char *msg)
getreg32(ARMV6M_SYSCON_CCR), getreg32(ARMV6M_SYSCON_SHPR2),
getreg32(ARMV6M_SYSCON_SHPR3));
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_DEBUG */

7
arch/arm/src/armv6-m/up_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv6-m/up_schedulesigaction.c
*
* Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "psr.h"
@ -110,7 +111,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@ -208,7 +209,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */

6
arch/arm/src/armv7-a/arm_addrenv.c
View File

@ -115,7 +115,7 @@
#include <nuttx/arch.h>
#include <nuttx/pgalloc.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "pgalloc.h"
#include "cache.h"
@ -169,7 +169,7 @@ static int up_addrenv_initdata(uintptr_t l2table)
#endif
DEBUGASSERT(l2table);
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page table address */
@ -220,7 +220,7 @@ static int up_addrenv_initdata(uintptr_t l2table)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif /* CONFIG_BUILD_KERNEL */

13
arch/arm/src/armv7-a/arm_addrenv_shm.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7/arm_addrenv_shm.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@
#include <string.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include <nuttx/addrenv.h>
@ -141,7 +142,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
* global resources.
*/
flags = irqsave();
flags = enter_critical_section();
group->tg_addrenv.shm[shmndx] = (FAR uintptr_t *)paddr;
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
@ -171,7 +172,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
*/
paddr = (uintptr_t)l1entry & ~SECTION_MASK;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page\
@ -215,7 +216,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return OK;
@ -282,7 +283,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages)
*/
paddr = (uintptr_t)l1entry & ~SECTION_MASK;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page
@ -333,7 +334,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return OK;

12
arch/arm/src/armv7-a/arm_addrenv_utils.c
View File

@ -44,7 +44,7 @@
#include <nuttx/pgalloc.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "cache.h"
#include "mmu.h"
@ -133,7 +133,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
DEBUGASSERT(MM_ISALIGNED(paddr));
list[i] = (FAR uintptr_t *)paddr;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page address */
@ -163,7 +163,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
#ifndef CONFIG_ARCH_PGPOOL_MAPPING
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
return -ENOMEM;
}
@ -187,7 +187,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return npages;
@ -226,7 +226,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
paddr = (uintptr_t)list[i];
if (paddr != 0)
{
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page address */
@ -265,7 +265,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
/* And free the L2 page table itself */

56
arch/arm/src/armv7-a/arm_l2cc_pl310.c
View File

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/armv7-a/chip/arm-l2cc_pl310.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Reference: "CoreLink™ Level 2 Cache Controller L2C-310", Revision r3p2,
@ -48,7 +48,7 @@
#include <assert.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "l2cc.h"
@ -436,10 +436,10 @@ void l2cc_enable(void)
/* Invalidate and enable the cache (must be disabled to do this!) */
flags = irqsave();
flags = enter_critical_section();
l2cc_invalidate_all();
putreg32(L2CC_CR_L2CEN, L2CC_CR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -462,14 +462,14 @@ void l2cc_disable(void)
/* Flush all ways using the Clean Invalidate Way Register (CIWR). */
flags = irqsave();
flags = enter_critical_section();
pl310_flush_all();
/* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
putreg32(0, L2CC_CR);
dsb();
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -495,9 +495,9 @@ void l2cc_sync(void)
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -521,7 +521,7 @@ void l2cc_invalidate_all(void)
/* Invalidate all ways */
flags = irqsave();
flags = enter_critical_section();
/* Disable the L2 cache while we invalidate it */
@ -547,7 +547,7 @@ void l2cc_invalidate_all(void)
/* Then re-enable the L2 cache if it was enabled before */
putreg32(regval, L2CC_CR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -574,7 +574,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Check if the start address is aligned with a cacheline */
flags = irqsave();
flags = enter_critical_section();
if ((startaddr & PL310_CACHE_LINE_MASK) != 0)
{
/* No.. align down and flush the cache line by writing the address to
@ -601,7 +601,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
putreg32(endaddr, L2CC_CIPALR);
}
irqrestore(flags);
leave_critical_section(flags);
/* Loop, invalidated the address range by cache line. Interrupts are re-
* enabled momentarily every PL310_GULP_SIZE bytes.
@ -619,7 +619,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Disable interrupts and invalidate the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Invalidate the cache line by writing the address to the
@ -635,16 +635,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -669,7 +669,7 @@ void l2cc_clean_all(void)
* Ways Register (CWR).
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(PL310_WAY_MASK, L2CC_CWR);
/* Wait for cache operation by way to complete */
@ -681,7 +681,7 @@ void l2cc_clean_all(void)
*/
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -737,7 +737,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
/* Disable interrupts and clean the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Clean the cache line by writing the address to the Clean
@ -753,16 +753,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -785,9 +785,9 @@ void l2cc_flush_all(void)
/* Flush all ways using the Clean Invalidate Way Register (CIWR). */
flags = irqsave();
flags = enter_critical_section();
pl310_flush_all();
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -843,7 +843,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
/* Disable interrupts and flush the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Flush the cache line by writing the address to the Clean
@ -859,16 +859,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_ARMV7A_L2CC_PL310 */

13
arch/arm/src/armv7-a/arm_pgalloc.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7/arm_pgalloc.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/sched.h>
#include <nuttx/arch.h>
#include <nuttx/addrenv.h>
@ -89,7 +90,7 @@ static uintptr_t alloc_pgtable(void)
{
DEBUGASSERT(MM_ISALIGNED(paddr));
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page address */
@ -119,7 +120,7 @@ static uintptr_t alloc_pgtable(void)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return paddr;
@ -258,7 +259,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
return 0;
}
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_ARCH_PGPOOL_MAPPING
/* Get the virtual address corresponding to the physical page address */
@ -282,7 +283,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
#ifndef CONFIG_ARCH_PGPOOL_MAPPING
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
return 0;
}
@ -311,7 +312,7 @@ uintptr_t pgalloc(uintptr_t brkaddr, unsigned int npages)
mmu_l1_restore(ARCH_SCRATCH_VBASE, l1save);
#endif
irqrestore(flags);
leave_critical_section(flags);
}
return brkaddr;

7
arch/arm/src/armv7-a/arm_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_schedulesigaction.c
*
* Copyright (C) 2013, 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "arm.h"
@ -109,7 +110,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@ -197,7 +198,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */

5
arch/arm/src/armv7-a/cache.h
View File

@ -41,6 +41,7 @@
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include "cp15_cacheops.h"
#include "l2cc.h"
@ -103,10 +104,10 @@ static inline void arch_invalidate_dcache(uintptr_t start, uintptr_t end)
static inline void arch_invalidate_dcache_all(void)
{
#ifdef CONFIG_ARCH_L2CACHE
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
cp15_invalidate_dcache_all();
l2cc_invalidate_all();
irqrestore(flags);
leave_critical_section(flags);
#else
cp15_invalidate_dcache_all();
#endif

4
arch/arm/src/armv7-m/up_ramvec_attach.c
View File

@ -114,7 +114,7 @@ int up_ramvec_attach(int irq, up_vector_t vector)
* common exception handler.
*/
flags = irqsave();
flags = enter_critical_section();
if (vector == NULL)
{
/* Disable the interrupt if we can before detaching it. We might
@ -133,7 +133,7 @@ int up_ramvec_attach(int irq, up_vector_t vector)
/* Save the new vector in the vector table */
g_ram_vectors[irq] = vector;
irqrestore(flags);
leave_critical_section(flags);
ret = OK;
}

7
arch/arm/src/armv7-m/up_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-m/up_schedulesigaction.c
*
* Copyright (C) 2009-2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "psr.h"
@ -99,7 +100,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@ -213,7 +214,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */

56
arch/arm/src/armv7-r/arm_l2cc_pl310.c
View File

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/armv7-r/chip/arm-l2cc_pl310.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Reference: "CoreLink™ Level 2 Cache Controller L2C-310", Revision r3p2,
@ -48,7 +48,7 @@
#include <assert.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "l2cc.h"
@ -436,10 +436,10 @@ void l2cc_enable(void)
/* Invalidate and enable the cache (must be disabled to do this!) */
flags = irqsave();
flags = enter_critical_section();
l2cc_invalidate_all();
putreg32(L2CC_CR_L2CEN, L2CC_CR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -462,14 +462,14 @@ void l2cc_disable(void)
/* Flush all ways using the Clean Invalidate Way Register (CIWR). */
flags = irqsave();
flags = enter_critical_section();
pl310_flush_all();
/* Disable the L2CC-P310 L2 cache by clearing the Control Register (CR) */
putreg32(0, L2CC_CR);
dsb();
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -495,9 +495,9 @@ void l2cc_sync(void)
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -521,7 +521,7 @@ void l2cc_invalidate_all(void)
/* Invalidate all ways */
flags = irqsave();
flags = enter_critical_section();
/* Disable the L2 cache while we invalidate it */
@ -547,7 +547,7 @@ void l2cc_invalidate_all(void)
/* Then re-enable the L2 cache if it was enabled before */
putreg32(regval, L2CC_CR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -574,7 +574,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Check if the start address is aligned with a cacheline */
flags = irqsave();
flags = enter_critical_section();
if ((startaddr & PL310_CACHE_LINE_MASK) != 0)
{
/* No.. align down and flush the cache line by writing the address to
@ -601,7 +601,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
putreg32(endaddr, L2CC_CIPALR);
}
irqrestore(flags);
leave_critical_section(flags);
/* Loop, invalidated the address range by cache line. Interrupts are re-
* enabled momentarily every PL310_GULP_SIZE bytes.
@ -619,7 +619,7 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Disable interrupts and invalidate the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Invalidate the cache line by writing the address to the
@ -635,16 +635,16 @@ void l2cc_invalidate(uintptr_t startaddr, uintptr_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -669,7 +669,7 @@ void l2cc_clean_all(void)
* Ways Register (CWR).
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(PL310_WAY_MASK, L2CC_CWR);
/* Wait for cache operation by way to complete */
@ -681,7 +681,7 @@ void l2cc_clean_all(void)
*/
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -737,7 +737,7 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
/* Disable interrupts and clean the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Clean the cache line by writing the address to the Clean
@ -753,16 +753,16 @@ void l2cc_clean(uintptr_t startaddr, uintptr_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -785,9 +785,9 @@ void l2cc_flush_all(void)
/* Flush all ways using the Clean Invalidate Way Register (CIWR). */
flags = irqsave();
flags = enter_critical_section();
pl310_flush_all();
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -843,7 +843,7 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
/* Disable interrupts and flush the gulp */
flags = irqsave();
flags = enter_critical_section();
while (startaddr < gulpend)
{
/* Flush the cache line by writing the address to the Clean
@ -859,16 +859,16 @@ void l2cc_flush(uint32_t startaddr, uint32_t endaddr)
/* Enable interrupts momentarily */
irqrestore(flags);
leave_critical_section(flags);
}
/* Drain the STB. Operation complete when all buffers, LRB, LFB, STB, and
* EB, are empty.
*/
flags = irqsave();
flags = enter_critical_section();
putreg32(0, L2CC_CSR);
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_ARMV7R_L2CC_PL310 */

7
arch/arm/src/armv7-r/arm_schedulesigaction.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_schedulesigaction.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "arm.h"
@ -97,7 +98,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
/* Make sure that interrupts are disabled */
flags = irqsave();
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
@ -185,7 +186,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
}
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* !CONFIG_DISABLE_SIGNALS */

5
arch/arm/src/armv7-r/cache.h
View File

@ -41,6 +41,7 @@
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include "cp15_cacheops.h"
#include "l2cc.h"
@ -103,10 +104,10 @@ static inline void arch_invalidate_dcache(uintptr_t start, uintptr_t end)
static inline void arch_invalidate_dcache_all(void)
{
#ifdef CONFIG_ARCH_L2CACHE
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
cp15_invalidate_dcache_all();
l2cc_invalidate_all();
irqrestore(flags);
leave_critical_section(flags);
#else
cp15_invalidate_dcache_all();
#endif

8
arch/arm/src/c5471/c5471_ethernet.c
View File

@ -1746,7 +1746,7 @@ static int c5471_ifdown(struct net_driver_s *dev)
/* Disable the Ethernet interrupt */
flags = irqsave();
flags = enter_critical_section();
up_disable_irq(C5471_IRQ_ETHER);
/* Disable interrupts going from EIM Module to Interrupt Module. */
@ -1770,7 +1770,7 @@ static int c5471_ifdown(struct net_driver_s *dev)
/* Reset the device */
c5471->c_bifup = false;
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -1799,7 +1799,7 @@ static int c5471_txavail(struct net_driver_s *dev)
irqstate_t flags;
ndbg("Polling\n");
flags = irqsave();
flags = enter_critical_section();
/* Ignore the notification if the interface is not yet up */
@ -1817,7 +1817,7 @@ static int c5471_txavail(struct net_driver_s *dev)
}
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}

8
arch/arm/src/c5471/c5471_serial.c
View File

@ -641,18 +641,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_disablebreaks(priv);
irqrestore(flags);
leave_critical_section(flags);
}
break;

1
arch/arm/src/calypso/calypso_irq.c
View File

@ -45,6 +45,7 @@
#include <stdio.h>
#include <stdint.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>

8
arch/arm/src/calypso/calypso_serial.c
View File

@ -729,18 +729,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_disablebreaks(priv);
irqrestore(flags);
leave_critical_section(flags);
}
break;

6
arch/arm/src/common/up_modifyreg16.c
View File

@ -42,7 +42,7 @@
#include <stdint.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@ -76,10 +76,10 @@ void modifyreg16(unsigned int addr, uint16_t clearbits, uint16_t setbits)
irqstate_t flags;
uint16_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg16(addr);
regval &= ~clearbits;
regval |= setbits;
putreg16(regval, addr);
irqrestore(flags);
leave_critical_section(flags);
}

6
arch/arm/src/common/up_modifyreg32.c
View File

@ -42,7 +42,7 @@
#include <stdint.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@ -76,10 +76,10 @@ void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(addr);
regval &= ~clearbits;
regval |= setbits;
putreg32(regval, addr);
irqrestore(flags);
leave_critical_section(flags);
}

6
arch/arm/src/common/up_modifyreg8.c
View File

@ -42,7 +42,7 @@
#include <stdint.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@ -76,10 +76,10 @@ void modifyreg8(unsigned int addr, uint8_t clearbits, uint8_t setbits)
irqstate_t flags;
uint8_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg8(addr);
regval &= ~clearbits;
regval |= setbits;
putreg8(regval, addr);
irqrestore(flags);
leave_critical_section(flags);
}

15
arch/arm/src/dm320/dm320_framebuffer.c
View File

@ -45,8 +45,9 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/video/fb.h>
#include <nuttx/irq.h>
#include <nuttx/kmalloc.h>
#include <nuttx/video/fb.h>
#include <nuttx/nx/nxglib.h>
#include "up_arch.h"
@ -1198,7 +1199,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
}
#endif
flags = irqsave();
flags = enter_critical_section();
for (i = cmap.first, len = 0; i < 256 && len < cmap.len, i++, len++)
{
/* Convert the RGB to YUV */
@ -1226,6 +1227,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
putreg16(regval, DM320_OSD_OSDWIN1MD);
#endif
leave_critical_section(flags);
return 0;
}
#endif
@ -1246,7 +1248,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
}
#endif
flags = irqsave();
flags = enter_critical_section();
attrib->pos.x = getreg16(DM320_OSD_CURXP);
attrib->pos.y = getreg16(DM320_OSD_CURYP);
@ -1254,7 +1256,7 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
attrib->size.w = getreg16(DM320_OSD_CURXL);
attrib->size.h = getreg16(DM320_OSD_CURYL);
#endif
irqrestore(flags);
leave_critical_section(flags);
attrib->mxsize.w = MAX_XRES;
attrib->mxsize.h = MAX_YRES;
@ -1291,7 +1293,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
/* Set cursor position */
flags = irqsave();
flags = enter_critical_section();
if ((settings->flags & FB_CUR_SETPOSITION) != 0)
{
gvdbg("x=%d y=%d\n", settings->pos.x, settings->pos.y);
@ -1339,8 +1341,9 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
{
regval &= ~1;
}
putreg16(regval, DM320_OSD_RECTCUR);
irqrestore(flags);
leave_critical_section(flags);
gvdbg("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
gvdbg("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));

8
arch/arm/src/dm320/dm320_serial.c
View File

@ -566,18 +566,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv, true);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_enablebreaks(priv, false);
irqrestore(flags);
leave_critical_section(flags);
}
break;

30
arch/arm/src/dm320/dm320_usbdev.c
View File

@ -53,7 +53,7 @@
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbdev_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -895,9 +895,9 @@ static void dm320_reqcomplete(struct dm320_ep_s *privep, int16_t result)
/* Remove the completed request at the head of the endpoint request list */
flags = irqsave();
flags = enter_critical_section();
privreq = dm320_rqdequeue(privep);
irqrestore(flags);
leave_critical_section(flags);
if (privreq)
{
@ -1954,11 +1954,11 @@ static int dm320_epdisable(FAR struct usbdev_ep_s *ep)
/* Cancel any ongoing activity and reset the endpoint */
flags = irqsave();
flags = enter_critical_section();
dm320_cancelrequests(privep);
dm320_epreset(privep->epphy);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2093,7 +2093,7 @@ static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
req->result = -EINPROGRESS;
req->xfrd = 0;
flags = irqsave();
flags = enter_critical_section();
/* Check for NULL packet */
@ -2152,7 +2152,7 @@ static int dm320_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
}
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -2181,9 +2181,9 @@ static int dm320_epcancel(struct usbdev_ep_s *ep, FAR struct usbdev_req_s *req)
usbtrace(TRACE_EPCANCEL, privep->epphy);
priv = privep->dev;
flags = irqsave();
flags = enter_critical_section();
dm320_cancelrequests(privep);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2305,10 +2305,10 @@ static int dm320_getframe(struct usbdev_s *dev)
* because the operation is not atomic.
*/
flags = irqsave();
flags = enter_critical_section();
ret = dm320_getreg8(DM320_USB_FRAME2) << 8;
ret |= dm320_getreg8(DM320_USB_FRAME1);
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -2325,9 +2325,9 @@ static int dm320_wakeup(struct usbdev_s *dev)
irqstate_t flags;
usbtrace(TRACE_DEVWAKEUP, 0);
flags = irqsave();
flags = enter_critical_section();
dm320_putreg8(USB_POWER_RESUME, DM320_USB_POWER);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2372,7 +2372,7 @@ static int dm320_pullup(struct usbdev_s *dev, bool enable)
usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
GIO_SET_OUTPUT(CONFIG_DM320_GIO_USBDPPULLUP); /* Set D+ pullup */
@ -2382,7 +2382,7 @@ static int dm320_pullup(struct usbdev_s *dev, bool enable)
GIO_CLEAR_OUTPUT(CONFIG_DM320_GIO_USBDPPULLUP); /* Clear D+ pullup */
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif

9
arch/arm/src/efm32/efm32_adc.c
View File

@ -52,6 +52,7 @@
#include <unistd.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/analog/adc.h>
@ -815,7 +816,7 @@ static void adc_hw_reset(struct efm32_dev_s *priv, bool reset)
* is used by several different drivers.
*/
flags = irqsave();
flags = enter_critical_section();
/* Set or clear the selected bit in the APB2 reset register */
@ -834,7 +835,7 @@ static void adc_hw_reset(struct efm32_dev_s *priv, bool reset)
}
putreg32(regval, EFM32_RCC_APB2RSTR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -897,7 +898,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
#endif
avdbg("intf: ADC%d\n", priv->intf);
flags = irqsave();
flags = enter_critical_section();
/* Enable ADC reset state */
@ -1012,7 +1013,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
adc_startconv(priv, true);
irqrestore(flags);
leave_critical_section(flags);
avdbg("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n",
adc_getreg(priv, EFM32_ADC_SR_OFFSET),

13
arch/arm/src/efm32/efm32_dma.c
View File

@ -46,6 +46,7 @@
#include <assert.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@ -686,7 +687,7 @@ void efm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
/* Enable DMA completion interrupts */
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_DMA_IEN);
regval |= bit;
putreg32(regval, EFM32_DMA_IEN);
@ -694,7 +695,7 @@ void efm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg)
/* Enable the channel */
putreg32(bit, EFM32_DMA_CHENS);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -722,7 +723,7 @@ void efm32_dmastop(DMA_HANDLE handle)
/* Disable the channel */
flags = irqsave();
flags = enter_critical_section();
putreg32(bit, EFM32_DMA_CHENC);
/* Disable Channel interrupts */
@ -730,7 +731,7 @@ void efm32_dmastop(DMA_HANDLE handle)
regval = getreg32(EFM32_DMA_IEN);
regval |= bit;
putreg32(regval, EFM32_DMA_IEN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -753,7 +754,7 @@ void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs)
/* Sample DMA registers. */
flags = irqsave();
flags = enter_critical_section();
regs->status = getreg32(EFM32_DMA_STATUS);
regs->ctrlbase = getreg32(EFM32_DMA_CTRLBASE);
@ -782,7 +783,7 @@ void efm32_dmasample(DMA_HANDLE handle, struct efm32_dmaregs_s *regs)
regaddr = EFM32_DMA_CHn_CTRL(dmach->chan)
regs->chnctrl = getreg32(regaddr);
irqrestore(flags);
leave_critical_section(flags);
}
#endif

12
arch/arm/src/efm32/efm32_flash.c
View File

@ -69,9 +69,11 @@
************************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
@ -645,7 +647,7 @@ ssize_t __ramfunc__ up_progmem_erasepage(size_t page)
efm32_flash_unlock();
flags = irqsave();
flags = enter_critical_section();
/* enable writing to the flash */
@ -706,7 +708,7 @@ ssize_t __ramfunc__ up_progmem_erasepage(size_t page)
}
}
irqrestore(flags);
leave_critical_section(flags);
if (ret != 0)
{
@ -813,7 +815,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size)
page_words = num_words - word_count;
}
flags = irqsave();
flags = enter_critical_section();
/* First we load address. The address is auto-incremented within a page.
* Therefore the address phase is only needed once for each page.
@ -828,7 +830,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size)
ret = msc_load_write_data(p_data, page_words, true);
}
irqrestore(flags);
leave_critical_section(flags);
if (ret != 0)
{

18
arch/arm/src/efm32/efm32_gpioirq.c
View File

@ -44,7 +44,7 @@
#include <assert.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "chip/efm32_gpio.h"
@ -208,7 +208,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
/* Make sure that the pin interrupt is disabled */
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_GPIO_IEN);
regval &= ~bit;
putreg32(regval, EFM32_GPIO_IEN);
@ -258,7 +258,7 @@ void efm32_gpioirq(gpio_pinset_t pinset)
}
putreg32(regval, EFM32_GPIO_EXTIFALL);
irqrestore(flags);
leave_critical_section(flags);
}
/************************************************************************************
@ -281,11 +281,11 @@ void efm32_gpioirqenable(int irq)
uint32_t regval;
uint32_t bit;
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_GPIO_IEN);
regval |= bit;
putreg32(regval, EFM32_GPIO_IEN);
irqrestore(flags);
leave_critical_section(flags);
#else
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 1);
#endif
@ -312,11 +312,11 @@ void efm32_gpioirqdisable(int irq)
uint32_t bit;
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_GPIO_IEN);
regval &= ~bit;
putreg32(regval, EFM32_GPIO_IEN);
irqrestore(flags);
leave_critical_section(flags);
#else
bitband_set_peripheral(EFM32_GPIO_IEN, (irq - EFM32_IRQ_EXTI0), 0);
#endif
@ -343,11 +343,11 @@ void efm32_gpioirqclear(int irq)
uint32_t bit;
bit = ((uint32_t)1 << (irq - EFM32_IRQ_EXTI0));
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(EFM32_GPIO_IFC);
regval |= bit;
putreg32(regval, EFM32_GPIO_IFC);
irqrestore(flags);
leave_critical_section(flags);
#else
bitband_set_peripheral(EFM32_GPIO_IFC, (irq - EFM32_IRQ_EXTI0), 1);
#endif

10
arch/arm/src/efm32/efm32_i2c.c
View File

@ -1760,7 +1760,7 @@ FAR struct i2c_master_s *efm32_i2cbus_initialize(int port)
* power-up hardware and configure GPIOs.
*/
flags = irqsave();
flags = enter_critical_section();
if ((volatile int)priv->refs++ == 0)
{
@ -1768,7 +1768,7 @@ FAR struct i2c_master_s *efm32_i2cbus_initialize(int port)
efm32_i2c_init(priv);
}
irqrestore(flags);
leave_critical_section(flags);
return (struct i2c_master_s *)priv;
}
@ -1794,15 +1794,15 @@ int efm32_i2cbus_uninitialize(FAR struct i2c_master_s *dev)
return ERROR;
}
flags = irqsave();
flags = enter_critical_section();
if (--priv->refs)
{
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
irqrestore(flags);
leave_critical_section(flags);
/* Disable power and other HW resource (GPIO's) */

6
arch/arm/src/efm32/efm32_idle.c
View File

@ -46,7 +46,7 @@
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "chip.h"
#include "up_internal.h"
@ -104,7 +104,7 @@ static void up_idlepm(void)
if (newstate != oldstate)
{
flags = irqsave();
flags = enter_critical_section();
/* Perform board-specific, state-dependent logic here */
@ -148,7 +148,7 @@ static void up_idlepm(void)
break;
}
irqrestore(flags);
leave_critical_section(flags);
}
}
#else

6
arch/arm/src/efm32/efm32_irq.c
View File

@ -45,7 +45,7 @@
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
@ -112,7 +112,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
@ -145,7 +145,7 @@ static void efm32_dumpnvic(const char *msg, int irq)
#endif
#endif
#endif
irqrestore(flags);
leave_critical_section(flags);
}
#else
# define efm32_dumpnvic(msg, irq)

16
arch/arm/src/efm32/efm32_leserial.c
View File

@ -327,10 +327,10 @@ static void efm32_restoreuartint(struct efm32_leuart_s *priv, uint32_t ien)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ien */
flags = irqsave();
flags = enter_critical_section();
priv->ien = ien;
efm32_setuartint(priv);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -341,14 +341,14 @@ static void efm32_disableuartint(struct efm32_leuart_s *priv, uint32_t *ien)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (ien)
{
*ien = priv->ien;
}
efm32_restoreuartint(priv, 0);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -635,7 +635,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
@ -653,7 +653,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
efm32_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -700,7 +700,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Enable the TX interrupt */
@ -724,7 +724,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
efm32_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

5
arch/arm/src/efm32/efm32_pwm.c
View File

@ -45,6 +45,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <arch/board/board.h>
@ -810,7 +811,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
* to prevent any concurrent access to the reset register.
*/
flags = irqsave();
flags = enter_critical_section();
/* Reset the timer - stopping the output and putting the timer back
* into a state where pwm_start() can be called.
@ -818,7 +819,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
pwm_putreg(priv, EFM32_TIMER_CMD_OFFSET, TIMER_CMD_STOP);
irqrestore(flags);
leave_critical_section(flags);
pwm_dumpregs(priv, "After stop");
return OK;

17
arch/arm/src/efm32/efm32_rtc_burtc.c
View File

@ -45,6 +45,7 @@
#include <stdio.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
@ -333,7 +334,7 @@ static uint64_t efm32_get_burtc_tick(void)
uint64_t val;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
do
{
@ -353,7 +354,7 @@ static uint64_t efm32_get_burtc_tick(void)
while (getreg32(EFM32_BURTC_IF) & BURTC_IF_COMP0);
irqrestore(flags);
leave_critical_section(flags);
val = (uint64_t)cnt_carry*__CNT_TOP + cnt + cnt_zero;
@ -477,7 +478,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
uint64_t val;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
cnt_reg = getreg32(EFM32_BURTC_CNT);
@ -504,7 +505,7 @@ int up_rtc_settime(FAR const struct timespec *tp)
putreg32(cnt_carry, __CNT_CARRY_REG);
putreg32(cnt , __CNT_ZERO_REG);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -552,12 +553,12 @@ int efm32_rtc_setalarm(FAR const struct timespec *tp, alarmcb_t callback)
/* The set the alarm */
flags = irqsave();
flags = enter_critical_section();
stm32_rtc_beginwr();
putreg16(regvals.cnth, STM32_RTC_ALRH);
putreg16(regvals.cntl, STM32_RTC_ALRL);
stm32_rtc_endwr();
irqrestore(flags);
leave_critical_section(flags);
ret = OK;
}
@ -595,12 +596,12 @@ int efm32_rtc_cancelalarm(void)
/* Unset the alarm */
flags = irqsave();
flags = enter_critical_section();
stm32_rtc_beginwr();
putreg16(0xffff, STM32_RTC_ALRH);
putreg16(0xffff, STM32_RTC_ALRL);
stm32_rtc_endwr();
irqrestore(flags);
leave_critical_section(flags);
ret = OK;
}

16
arch/arm/src/efm32/efm32_serial.c
View File

@ -576,10 +576,10 @@ static void efm32_restoreuartint(struct efm32_usart_s *priv, uint32_t ien)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ien */
flags = irqsave();
flags = enter_critical_section();
priv->ien = ien;
efm32_setuartint(priv);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -591,14 +591,14 @@ static void efm32_disableuartint(struct efm32_usart_s *priv, uint32_t *ien)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (ien)
{
*ien = priv->ien;
}
efm32_restoreuartint(priv, 0);
irqrestore(flags);
leave_critical_section(flags);
}
#endif
@ -1086,7 +1086,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
@ -1104,7 +1104,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
efm32_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -1151,7 +1151,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Enable the TX interrupt */
@ -1175,7 +1175,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
efm32_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

21
arch/arm/src/efm32/efm32_spi.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arm/arm/src/efm32/efm32_spi.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Copyright (C) 2014 Bouteville Pierre-Noel. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
* Bouteville Pierre-Noel <pnb990@gmail.com>
@ -49,6 +49,7 @@
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/wdog.h>
#include <nuttx/clock.h>
@ -454,7 +455,7 @@ static void spi_dmarxwait(struct efm32_spidev_s *priv)
/* Take the semaphore (perhaps waiting). */
flags = irqsave();
flags = enter_critical_section();
while (sem_wait(&priv->rxdmasem) != 0)
{
/* The only case that an error should occur here is if the wait was
@ -472,7 +473,7 @@ static void spi_dmarxwait(struct efm32_spidev_s *priv)
wd_cancel(priv->wdog);
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif
@ -491,7 +492,7 @@ static void spi_dmatxwait(struct efm32_spidev_s *priv)
/* Take the semaphore (perhaps waiting). */
flags = irqsave();
flags = enter_critical_section();
while (sem_wait(&priv->txdmasem) != 0)
{
/* The only case that an error should occur here is if the wait was
@ -509,7 +510,7 @@ static void spi_dmatxwait(struct efm32_spidev_s *priv)
wd_cancel(priv->wdog);
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif
@ -1444,7 +1445,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
/* Start the DMAs */
flags = irqsave();
flags = enter_critical_section();
spi_dmarxstart(priv);
spi_dmatxstart(priv);
@ -1462,7 +1463,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
spi_dmatxwait(priv);
spi_dmarxwait(priv);
irqrestore(flags);
leave_critical_section(flags);
}
}
#endif /* CONFIG_EFM32_SPI_DMA */
@ -1718,7 +1719,7 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
{
/* No, then initialize it now */
flags = irqsave();
flags = enter_critical_section();
/* Initialize the state structure */
@ -1731,14 +1732,14 @@ struct spi_dev_s *efm32_spibus_initialize(int port)
if (ret < 0)
{
spidbg("ERROR: Failed to initialize SPI port %d\n", port);
irqrestore(flags);
leave_critical_section(flags);
return NULL;
}
/* Now we are initialized */
priv->initialized = true;
irqrestore(flags);
leave_critical_section(flags);
}
return (struct spi_dev_s *)priv;

52
arch/arm/src/efm32/efm32_usbdev.c
View File

@ -53,7 +53,7 @@
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbdev_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -4030,7 +4030,7 @@ static void efm32_epout_disable(FAR struct efm32_ep_s *privep)
* Global OUT NAK mode in the core.
*/
flags = irqsave();
flags = enter_critical_section();
efm32_enablegonak(privep);
/* Disable the required OUT endpoint by setting the EPDIS and SNAK bits
@ -4075,7 +4075,7 @@ static void efm32_epout_disable(FAR struct efm32_ep_s *privep)
efm32_req_cancel(privep, -ESHUTDOWN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -4138,7 +4138,7 @@ static void efm32_epin_disable(FAR struct efm32_ep_s *privep)
* the DIEPCTLx register.
*/
flags = irqsave();
flags = enter_critical_section();
regaddr = EFM32_USB_DIEPCTL(privep->epphy);
regval = efm32_getreg(regaddr);
regval &= ~USB_DIEPCTL_USBACTEP;
@ -4169,7 +4169,7 @@ static void efm32_epin_disable(FAR struct efm32_ep_s *privep)
/* Cancel any queued write requests */
efm32_req_cancel(privep, -ESHUTDOWN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -4356,7 +4356,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
/* Disable Interrupts */
flags = irqsave();
flags = enter_critical_section();
/* If we are stalled, then drop all requests on the floor */
@ -4401,7 +4401,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
}
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -4428,7 +4428,7 @@ static int efm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
usbtrace(TRACE_EPCANCEL, privep->epphy);
flags = irqsave();
flags = enter_critical_section();
/* FIXME: if the request is the first, then we need to flush the EP
* otherwise just remove it from the list
@ -4437,7 +4437,7 @@ static int efm32_ep_cancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
*/
efm32_req_cancel(privep, -ESHUTDOWN);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -4641,7 +4641,7 @@ static int efm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume)
/* Set or clear the stall condition as requested */
flags = irqsave();
flags = enter_critical_section();
if (resume)
{
ret = efm32_ep_clrstall(privep);
@ -4650,7 +4650,7 @@ static int efm32_ep_stall(FAR struct usbdev_ep_s *ep, bool resume)
{
ret = efm32_ep_setstall(privep);
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -4709,7 +4709,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev,
/* Get the set of available endpoints depending on the direction */
flags = irqsave();
flags = enter_critical_section();
epavail = priv->epavail[in];
/* A physical address of 0 means that any endpoint will do */
@ -4755,7 +4755,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev,
/* And return the pointer to the standard endpoint structure */
irqrestore(flags);
leave_critical_section(flags);
return in ? &priv->epin[epno].ep : &priv->epout[epno].ep;
}
}
@ -4764,7 +4764,7 @@ static FAR struct usbdev_ep_s *efm32_ep_alloc(FAR struct usbdev_s *dev,
}
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_NOEP), (uint16_t)eplog);
irqrestore(flags);
leave_critical_section(flags);
return NULL;
}
@ -4788,9 +4788,9 @@ static void efm32_ep_free(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep)
{
/* Mark the endpoint as available */
flags = irqsave();
flags = enter_critical_section();
priv->epavail[privep->isin] |= (1 << privep->epphy);
irqrestore(flags);
leave_critical_section(flags);
}
}
@ -4832,7 +4832,7 @@ static int efm32_wakeup(struct usbdev_s *dev)
/* Is wakeup enabled? */
flags = irqsave();
flags = enter_critical_section();
if (priv->wakeup)
{
/* Yes... is the core suspended? */
@ -4858,7 +4858,7 @@ static int efm32_wakeup(struct usbdev_s *dev)
}
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -4902,7 +4902,7 @@ static int efm32_pullup(struct usbdev_s *dev, bool enable)
usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
regval = efm32_getreg(EFM32_USB_DCTL);
if (enable)
{
@ -4922,7 +4922,7 @@ static int efm32_pullup(struct usbdev_s *dev, bool enable)
}
efm32_putreg(regval, EFM32_USB_DCTL);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -5544,7 +5544,7 @@ void up_usbuninitialize(void)
/* Disconnect device */
flags = irqsave();
flags = enter_critical_section();
efm32_pullup(&priv->usbdev, false);
priv->usbdev.speed = USB_SPEED_UNKNOWN;
@ -5580,7 +5580,7 @@ void up_usbuninitialize(void)
/* TODO: Turn off USB power and clocking */
priv->devstate = DEVSTATE_DEFAULT;
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -5688,9 +5688,9 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
* canceled while the class driver is still bound.
*/
flags = irqsave();
flags = enter_critical_section();
efm32_usbreset(priv);
irqrestore(flags);
leave_critical_section(flags);
/* Unbind the class driver */
@ -5698,7 +5698,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
/* Disable USB controller interrupts */
flags = irqsave();
flags = enter_critical_section();
up_disable_irq(EFM32_IRQ_USB);
/* Disconnect device */
@ -5708,7 +5708,7 @@ int usbdev_unregister(struct usbdevclass_driver_s *driver)
/* Unhook the driver */
priv->driver = NULL;
irqrestore(flags);
leave_critical_section(flags);
return OK;
}

32
arch/arm/src/efm32/efm32_usbhost.c
View File

@ -57,7 +57,7 @@
#include <nuttx/usb/usbhost_devaddr.h>
#include <nuttx/usb/usbhost_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "chip.h" /* Includes default GPIO settings */
#include <arch/board/board.h> /* May redefine GPIO settings */
@ -1078,7 +1078,7 @@ static void efm32_chan_halt(FAR struct efm32_usbhost_s *priv, int chidx,
static int efm32_chan_waitsetup(FAR struct efm32_usbhost_s *priv,
FAR struct efm32_chan_s *chan)
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
int ret = -ENODEV;
/* Is the device still connected? */
@ -1097,7 +1097,7 @@ static int efm32_chan_waitsetup(FAR struct efm32_usbhost_s *priv,
ret = OK;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -1120,7 +1120,7 @@ static int efm32_chan_asynchsetup(FAR struct efm32_usbhost_s *priv,
FAR struct efm32_chan_s *chan,
usbhost_asynch_t callback, FAR void *arg)
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
int ret = -ENODEV;
/* Is the device still connected? */
@ -1137,7 +1137,7 @@ static int efm32_chan_asynchsetup(FAR struct efm32_usbhost_s *priv,
ret = OK;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
#endif
@ -1165,7 +1165,7 @@ static int efm32_chan_wait(FAR struct efm32_usbhost_s *priv,
* while we wait.
*/
flags = irqsave();
flags = enter_critical_section();
/* Loop, testing for an end of transfer condition. The channel 'result'
* was set to EBUSY and 'waiter' was set to true before the transfer; 'waiter'
@ -1193,7 +1193,7 @@ static int efm32_chan_wait(FAR struct efm32_usbhost_s *priv,
/* The transfer is complete re-enable interrupts and return the result */
ret = -(int)chan->result;
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -3743,7 +3743,7 @@ static void efm32_txfe_enable(FAR struct efm32_usbhost_s *priv, int chidx)
* (it would be sufficent just to disable the GINT interrupt).
*/
flags = irqsave();
flags = enter_critical_section();
/* Should we enable the periodic or non-peridic Tx FIFO empty interrupts */
@ -3765,7 +3765,7 @@ static void efm32_txfe_enable(FAR struct efm32_usbhost_s *priv, int chidx)
/* Enable interrupts */
efm32_putreg(EFM32_USB_GINTMSK, regval);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -3806,7 +3806,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
/* Loop until a change in connection state is detected */
flags = irqsave();
flags = enter_critical_section();
for (; ; )
{
/* Is there a change in the connection state of the single root hub
@ -3825,7 +3825,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
/* And return the root hub port */
*hport = connport;
irqrestore(flags);
leave_critical_section(flags);
uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
@ -3842,7 +3842,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
priv->hport = NULL;
*hport = connport;
irqrestore(flags);
leave_critical_section(flags);
uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
@ -4709,7 +4709,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* completion of the transfer being cancelled.
*/
flags = irqsave();
flags = enter_critical_section();
/* Halt the channel */
@ -4757,7 +4757,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
}
#endif
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -4799,7 +4799,7 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr,
/* Report the connection event */
flags = irqsave();
flags = enter_critical_section();
priv->hport = hport;
if (priv->pscwait)
{
@ -4807,7 +4807,7 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr,
efm32_givesem(&priv->pscsem);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif

4
arch/arm/src/imx/imx_irq.c
View File

@ -2,7 +2,7 @@
* arch/arm/src/imc/imx_irq.c
* arch/arm/src/chip/imx_irq.c
*
* Copyright (C) 2009, 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2009, 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -41,7 +41,7 @@
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/irq.h>
#include <arch/irq.h>
#include "chip.h"
#include "up_arch.h"

6
arch/arm/src/imx/imx_spi.c
View File

@ -49,7 +49,7 @@
#include <nuttx/arch.h>
#include <nuttx/spi/spi.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "up_internal.h"
@ -541,7 +541,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
/* Prime the Tx FIFO to start the sequence (saves one interrupt) */
#ifndef CONFIG_SPI_POLLWAIT
flags = irqsave();
flags = enter_critical_section();
ntxd = spi_performtx(priv);
spi_startxfr(priv, ntxd);
@ -550,7 +550,7 @@ static int spi_transfer(struct imx_spidev_s *priv, const void *txbuffer,
regval = spi_getreg(priv, CSPI_INTCS_OFFSET);
regval |= CSPI_INTCS_TEEN;
spi_putreg(priv, CSPI_INTCS_OFFSET, regval);
irqrestore(flags);
leave_critical_section(flags);
/* Wait for the transfer to complete. Since there is no handshake
* with SPI, the following should complete even if there are problems

8
arch/arm/src/kinetis/kinetis_enet.c
View File

@ -1045,7 +1045,7 @@ static int kinetis_ifdown(struct net_driver_s *dev)
/* Disable the Ethernet interrupts at the NVIC */
flags = irqsave();
flags = enter_critical_section();
up_disable_irq(KINETIS_IRQ_EMACTMR);
up_disable_irq(KINETIS_IRQ_EMACTX);
up_disable_irq(KINETIS_IRQ_EMACRX);
@ -1067,7 +1067,7 @@ static int kinetis_ifdown(struct net_driver_s *dev)
/* Mark the device "down" */
priv->bifup = false;
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -1100,7 +1100,7 @@ static int kinetis_txavail(struct net_driver_s *dev)
* level processing.
*/
flags = irqsave();
flags = enter_critical_section();
/* Ignore the notification if the interface is not yet up */
@ -1120,7 +1120,7 @@ static int kinetis_txavail(struct net_driver_s *dev)
}
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}

4
arch/arm/src/kinetis/kinetis_irq.c
View File

@ -108,7 +108,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
@ -149,7 +149,7 @@ static void kinetis_dumpnvic(const char *msg, int irq)
getreg32(NVIC_IRQ112_115_PRIORITY), getreg32(NVIC_IRQ116_119_PRIORITY));
#endif
irqrestore(flags);
leave_critical_section(flags);
}
#else
# define kinetis_dumpnvic(msg, irq)

7
arch/arm/src/kinetis/kinetis_pinirq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kinetis/kinetis_pinirq.c
*
* Copyright (C) 2011, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2011, 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -43,6 +43,7 @@
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@ -286,7 +287,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
/* Get the table associated with this port */
DEBUGASSERT(port < KINETIS_NPORTS);
flags = irqsave();
flags = enter_critical_section();
switch (port)
{
#ifdef CONFIG_KINETIS_PORTAINTS
@ -315,6 +316,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
break;
#endif
default:
leave_critical_section(flags);
return NULL;
}
@ -325,6 +327,7 @@ xcpt_t kinetis_pinirqattach(uint32_t pinset, xcpt_t pinisr)
/* And return the old PIN isr address */
leave_critical_section(flags);
return oldisr;
#else
return NULL;

18
arch/arm/src/kinetis/kinetis_sdhc.c
View File

@ -54,7 +54,7 @@
#include <nuttx/wqueue.h>
#include <nuttx/mmcsd.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -455,7 +455,7 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints
* operation.
*/
flags = irqsave();
flags = enter_critical_section();
priv->waitevents = waitevents;
priv->wkupevent = wkupevent;
priv->waitints = waitints;
@ -464,7 +464,7 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints
#endif
putreg32(priv->xfrints | priv->waitints | SDHC_INT_CINT,
KINETIS_SDHC_IRQSIGEN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -485,11 +485,11 @@ static void kinetis_configwaitints(struct kinetis_dev_s *priv, uint32_t waitints
static void kinetis_configxfrints(struct kinetis_dev_s *priv, uint32_t xfrints)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
priv->xfrints = xfrints;
putreg32(priv->xfrints | priv->waitints | SDHC_INT_CINT,
KINETIS_SDHC_IRQSIGEN);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -2881,7 +2881,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
/* Update card status */
flags = irqsave();
flags = enter_critical_section();
cdstatus = priv->cdstatus;
if (cardinslot)
{
@ -2901,7 +2901,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
kinetis_callback(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -2927,7 +2927,7 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
/* Update card status */
flags = irqsave();
flags = enter_critical_section();
if (wrprotect)
{
priv->cdstatus |= SDIO_STATUS_WRPROTECTED;
@ -2938,6 +2938,6 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
}
fvdbg("cdstatus: %02x\n", priv->cdstatus);
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_KINETIS_SDHC */

20
arch/arm/src/kinetis/kinetis_serial.c
View File

@ -556,12 +556,12 @@ static void up_setuartint(struct up_dev_s *priv)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
flags = irqsave();
flags = enter_critical_section();
regval = up_serialin(priv, KINETIS_UART_C2_OFFSET);
regval &= ~UART_C2_ALLINTS;
regval |= priv->ie;
up_serialout(priv, KINETIS_UART_C2_OFFSET, regval);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -574,10 +574,10 @@ static void up_restoreuartint(struct up_dev_s *priv, uint8_t ie)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
flags = irqsave();
flags = enter_critical_section();
priv->ie = ie & UART_C2_ALLINTS;
up_setuartint(priv);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -588,14 +588,14 @@ static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (ie)
{
*ie = priv->ie;
}
up_restoreuartint(priv, 0);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -1050,7 +1050,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
@ -1073,7 +1073,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
up_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -1133,7 +1133,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Enable the TX interrupt */
@ -1157,7 +1157,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
up_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

6
arch/arm/src/kinetis/kinetis_wdog.c
View File

@ -40,7 +40,7 @@
#include <nuttx/config.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "kinetis.h"
@ -80,13 +80,13 @@ static void kinetis_wdunlock(void)
* to assure that the following steps are atomic.
*/
flags = irqsave();
flags = enter_critical_section();
/* Write 0xC520 followed by 0xD928 to the unlock register */
putreg16(0xc520, KINETIS_WDOG_UNLOCK);
putreg16(0xd928, KINETIS_WDOG_UNLOCK);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

7
arch/arm/src/kl/kl_dumpgpio.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kl/kl_gpio.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -42,6 +42,7 @@
#include <sys/types.h>
#include <debug.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "chip.h"
@ -120,7 +121,7 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = irqsave();
flags = enter_critical_section();
lldbg("GPIO%c pinset: %08x base: %08x -- %s\n",
g_portchar[port], pinset, base, msg);
@ -129,7 +130,7 @@ void kl_dumpgpio(gpio_cfgset_t pinset, const char *msg)
getreg32(base + KL_GPIO_PDIR_OFFSET),
getreg32(base + KL_GPIO_PDDR_OFFSET));
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_DEBUG */

6
arch/arm/src/kl/kl_idle.c
View File

@ -44,7 +44,7 @@
#include <nuttx/board.h>
#include <nuttx/power/pm.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "chip.h"
#include "up_internal.h"
@ -97,7 +97,7 @@ static void up_idlepm(void)
if (newstate != oldstate)
{
flags = irqsave();
flags = enter_critical_section();
/* Perform board-specific, state-dependent logic here */
@ -141,7 +141,7 @@ static void up_idlepm(void)
break;
}
irqrestore(flags);
leave_critical_section(flags);
}
}
#else

4
arch/arm/src/kl/kl_irq.c
View File

@ -89,7 +89,7 @@ static void kl_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" ISER: %08x ICER: %08x\n",
@ -113,7 +113,7 @@ static void kl_dumpnvic(const char *msg, int irq)
lldbg(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
irqrestore(flags);
leave_critical_section(flags);
}
#else

7
arch/arm/src/kl/kl_pwm.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/kl/kl_pwm.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
* Alan Carvalho de Assis <acassis@gmail.com>
*
@ -46,6 +46,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <arch/board/board.h>
@ -626,7 +627,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
* to prevent any concurrent access to the reset register.
*/
flags = irqsave();
flags = enter_critical_section();
/* Disable further interrupts and stop the timer */
@ -666,7 +667,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
return -EINVAL;
}
irqrestore(flags);
leave_critical_section(flags);
pwm_dumpregs(priv, "After stop");
return OK;

20
arch/arm/src/kl/kl_serial.c
View File

@ -342,12 +342,12 @@ static void up_setuartint(struct up_dev_s *priv)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
flags = irqsave();
flags = enter_critical_section();
regval = up_serialin(priv, KL_UART_C2_OFFSET);
regval &= ~UART_C2_ALLINTS;
regval |= priv->ie;
up_serialout(priv, KL_UART_C2_OFFSET, regval);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -360,10 +360,10 @@ static void up_restoreuartint(struct up_dev_s *priv, uint8_t ie)
/* Re-enable/re-disable interrupts corresponding to the state of bits in ie */
flags = irqsave();
flags = enter_critical_section();
priv->ie = ie & UART_C2_ALLINTS;
up_setuartint(priv);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -374,14 +374,14 @@ static void up_disableuartint(struct up_dev_s *priv, uint8_t *ie)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (ie)
{
*ie = priv->ie;
}
up_restoreuartint(priv, 0);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -697,7 +697,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register
@ -715,7 +715,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
up_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -767,7 +767,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
/* Enable the TX interrupt */
@ -791,7 +791,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
up_setuartint(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

6
arch/arm/src/lpc11xx/lpc11_gpiodbg.c
View File

@ -43,7 +43,7 @@
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "chip.h"
@ -156,7 +156,7 @@ int lpc11_dumpgpio(lpc11_pinset_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = irqsave();
flags = enter_critical_section();
lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n",
port + '0', pin, pinset, msg);
@ -183,7 +183,7 @@ int lpc11_dumpgpio(lpc11_pinset_t pinset, const char *msg)
lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
base+LPC11_GPIOINT_INTENR_OFFSET, getreg32(base+LPC11_GPIOINT_INTENR_OFFSET),
base+LPC11_GPIOINT_INTENF_OFFSET, getreg32(base+LPC11_GPIOINT_INTENF_OFFSET));
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif /* CONFIG_DEBUG_GPIO */

6
arch/arm/src/lpc11xx/lpc11_gpioint.c
View File

@ -44,7 +44,7 @@
#include <errno.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@ -121,7 +121,7 @@ static void lpc11_setintedge(uint32_t intbase, unsigned int pin,
/* These must be atomic */
flags = irqsave();
flags = enter_critical_section();
/* Set/clear the rising edge enable bit */
@ -150,7 +150,7 @@ static void lpc11_setintedge(uint32_t intbase, unsigned int pin,
}
putreg32(regval, intbase + LPC11_GPIOINT_INTENF_OFFSET);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

10
arch/arm/src/lpc11xx/lpc11_i2c.c
View File

@ -61,7 +61,7 @@
#include <nuttx/wdog.h>
#include <nuttx/i2c/i2c_master.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -253,10 +253,10 @@ static void lpc11_i2c_timeout(int argc, uint32_t arg, ...)
{
struct lpc11_i2cdev_s *priv = (struct lpc11_i2cdev_s *)arg;
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
priv->state = 0xff;
sem_post(&priv->wait);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -492,7 +492,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_LPC11_I2C0
if (port == 0)
@ -580,7 +580,7 @@ struct i2c_master_s *lpc11_i2cbus_initialize(int port)
return NULL;
}
irqrestore(flags);
leave_critical_section(flags);
putreg32(I2C_CONSET_I2EN, priv->base + LPC11_I2C_CONSET_OFFSET);

10
arch/arm/src/lpc11xx/lpc11_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc11xx/lpc11_irq.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -68,10 +68,6 @@
volatile uint32_t *current_regs;
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
@ -89,7 +85,7 @@ static void lpc11_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" ISER: %08x ICER: %08x\n",
@ -113,7 +109,7 @@ static void lpc11_dumpnvic(const char *msg, int irq)
lldbg(" SHPR2: %08x SHPR3: %08x\n",
getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
irqrestore(flags);
leave_critical_section(flags);
}
#else

16
arch/arm/src/lpc11xx/lpc11_serial.c
View File

@ -343,7 +343,7 @@ static inline void lpc11_uart0config(void)
/* Step 1: Pins configuration */
flags = irqsave();
flags = enter_critical_section();
lpc11_configgpio(GPIO_UART0_TXD);
lpc11_configgpio(GPIO_UART0_RXD);
@ -356,7 +356,7 @@ static inline void lpc11_uart0config(void)
/* Step 3: Enable clocking UART */
putreg32(1, LPC11_SYSCON_UARTCLKDIV);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -682,18 +682,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv, true);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_enablebreaks(priv, false);
irqrestore(flags);
leave_critical_section(flags);
}
break;
@ -863,7 +863,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@ -883,7 +883,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
up_serialout(priv, LPC11_UART_IER_OFFSET, priv->ier);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

7
arch/arm/src/lpc11xx/lpc11_spi.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc11xx/lpc11_spi.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -47,6 +47,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/spi/spi.h>
@ -562,7 +563,7 @@ FAR struct spi_dev_s *lpc11_spibus_initialize(int port)
* #define GPIO_SPI_SCK GPIO_SPI_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
lpc11_configgpio(GPIO_SPI_SCK);
lpc11_configgpio(GPIO_SPI_MISO);
lpc11_configgpio(GPIO_SPI_MOSI);
@ -579,7 +580,7 @@ FAR struct spi_dev_s *lpc11_spibus_initialize(int port)
regval = getreg32(LPC11_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCSPI;
putreg32(regval, LPC11_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
/* Configure 8-bit SPI mode and master mode */

15
arch/arm/src/lpc11xx/lpc11_ssp.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc11xx/lpc11_ssp.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -47,6 +47,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/spi/spi.h>
@ -812,7 +813,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp0initialize(void)
* #define GPIO_SSP0_SCK GPIO_SSP0_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
lpc11_configgpio(GPIO_SSP0_SCK);
lpc11_configgpio(GPIO_SSP0_MISO);
lpc11_configgpio(GPIO_SSP0_MOSI);
@ -831,7 +832,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp0initialize(void)
regval = getreg32(LPC11_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCSSP0;
putreg32(regval, LPC11_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
return &g_ssp0dev;
}
@ -866,7 +867,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp1initialize(void)
* #define GPIO_SSP0_SCK GPIO_SSP0_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
lpc11_configgpio(GPIO_SSP1_SCK);
lpc11_configgpio(GPIO_SSP1_MISO);
lpc11_configgpio(GPIO_SSP1_MOSI);
@ -885,7 +886,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp1initialize(void)
regval = getreg32(LPC11_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCSSP1;
putreg32(regval, LPC11_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
return &g_ssp1dev;
}
@ -919,7 +920,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp2initialize(void)
* #define GPIO_SSP2_SCK GPIO_SSP2_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
lpc11_configgpio(GPIO_SSP2_SCK);
lpc11_configgpio(GPIO_SSP2_MISO);
lpc11_configgpio(GPIO_SSP2_MOSI);
@ -938,7 +939,7 @@ static inline FAR struct lpc11_sspdev_s *lpc11_ssp2initialize(void)
regval = getreg32(LPC11_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCSSP2;
putreg32(regval, LPC11_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
return &g_ssp2dev;
}

15
arch/arm/src/lpc11xx/lpc11_timer.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc11xx/lpc11_timer.c
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -45,6 +45,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <arch/board/board.h>
@ -290,7 +291,7 @@ static int timer_timer(FAR struct lpc11_timer_s *priv,
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
putreg32(info->frequency, LPC11_TMR0_MR1); /* Set TIMER0 MR1 = number of counts */
putreg32(info->frequency, LPC11_TMR1_MR0); /* Set TIMER1 MR0 = number of counts */
@ -298,7 +299,7 @@ static int timer_timer(FAR struct lpc11_timer_s *priv,
putreg32(1, LPC11_TMR0_TCR); /* Start timer0 */
putreg32(1, LPC11_TMR1_TCR); /* Start timer1 */
irqrestore(flags);
leave_critical_section(flags);
timer_dumpregs(priv, "After starting");
return OK;
}
@ -385,7 +386,7 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
/* Power on the timer peripherals */
@ -442,7 +443,7 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev)
/* configure the output pins GPIO3.26 */
// lpc11_configgpio(GPIO_MAT0p1_2);
irqrestore(flags);
leave_critical_section(flags);
pwm_dumpgpio(priv->pincfg, "TIMER setup");
return OK;
}
@ -530,7 +531,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
* to prevent any concurrent access to the reset register.
*/
flags = irqsave();
flags = enter_critical_section();
/* Disable further interrupts and stop the timer */
@ -548,7 +549,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
* into a state where timer_start() can be called.
*/
irqrestore(flags);
leave_critical_section(flags);
pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
timer_dumpregs(priv, "After stop");

9
arch/arm/src/lpc17xx/lpc17_adc.c
View File

@ -7,7 +7,7 @@
*
* This file is a part of NuttX:
*
* Copyright (C) 2010, 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2013, 2016 Gregory Nutt. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -53,6 +53,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/analog/adc.h>
@ -152,7 +153,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
uint32_t clkdiv;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCADC;
@ -236,7 +237,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
lpc17_configgpio(GPIO_AD0p7);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -573,7 +574,7 @@ static int adc_interrupt(int irq, void *context)
LPC17_ADC_CR);
//lpc17_gpiowrite(LPCXPRESSO_GPIO0_21, 0); /* Reset pin P0.21 */
//irqrestore(saved_state);
//leave_critical_section(saved_state);
return OK;
#endif /* CONFIG_ADC_BURSTMODE */
}

23
arch/arm/src/lpc17xx/lpc17_can.c
View File

@ -55,6 +55,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/can.h>
@ -505,7 +506,7 @@ static void can_reset(FAR struct can_dev_s *dev)
canvdbg("CAN%d\n", priv->port);
flags = irqsave();
flags = enter_critical_section();
/* Disable the CAN and stop ongong transmissions */
@ -530,7 +531,7 @@ static void can_reset(FAR struct can_dev_s *dev)
can_putreg(priv, LPC17_CAN_MOD_OFFSET, 0); /* Leave Reset Mode */
#endif
can_putcommon(LPC17_CANAF_AFMR, CANAF_AFMR_ACCBP); /* All RX messages accepted */
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -620,7 +621,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
* to protect this code section.
*/
flags = irqsave();
flags = enter_critical_section();
regval = can_getreg(priv, LPC17_CAN_IER_OFFSET);
if (enable)
{
@ -632,7 +633,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
}
can_putreg(priv, LPC17_CAN_IER_OFFSET, regval);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -668,14 +669,14 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
* to protect this code section.
*/
flags = irqsave();
flags = enter_critical_section();
/* Disable all TX interrupts */
regval = can_getreg(priv, LPC17_CAN_IER_OFFSET);
regval &= ~(CAN_IER_TIE1 | CAN_IER_TIE2 | CAN_IER_TIE3);
can_putreg(priv, LPC17_CAN_IER_OFFSET, regval);
irqrestore(flags);
leave_critical_section(flags);
}
}
@ -780,7 +781,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
DEBUGASSERT((tid & ~CAN_TID_ID11_MASK) == 0);
}
flags = irqsave();
flags = enter_critical_section();
/* Pick a transmit buffer */
@ -881,7 +882,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
ret = -EBUSY;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -1241,7 +1242,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
canllvdbg("CAN%d\n", port);
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_LPC17_CAN1
if (port == 1)
@ -1299,14 +1300,14 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
#endif
{
candbg("Unsupported port: %d\n", port);
irqrestore(flags);
leave_critical_section(flags);
return NULL;
}
/* Then just perform a CAN reset operation */
can_reset(candev);
irqrestore(flags);
leave_critical_section(flags);
return candev;
}
#endif

7
arch/arm/src/lpc17xx/lpc17_dac.c
View File

@ -7,7 +7,7 @@
*
* This file is a part of NuttX:
*
* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2014, 2016 Gregory Nutt. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
@ -53,6 +53,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/analog/dac.h>
@ -117,7 +118,7 @@ static void dac_reset(FAR struct dac_dev_s *dev)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(LPC17_SYSCON_PCLKSEL0);
regval &= ~SYSCON_PCLKSEL0_DAC_MASK;
@ -128,7 +129,7 @@ static void dac_reset(FAR struct dac_dev_s *dev)
lpc17_configgpio(GPIO_AOUT);
irqrestore(flags);
leave_critical_section(flags);
}
/* Configure the DAC. This method is called the first time that the DAC

12
arch/arm/src/lpc17xx/lpc17_ethernet.c
View File

@ -1129,14 +1129,14 @@ static void lpc17_rxdone_work(FAR void *arg)
* lp-txpending TX underrun state is in effect.
*/
flags = irqsave();
flags = enter_critical_section();
if (!priv->lp_txpending)
{
priv->lp_inten |= ETH_RXINTS;
lpc17_putreg(priv->lp_inten, LPC17_ETH_INTEN);
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_NET_NOINTS */
@ -1896,7 +1896,7 @@ static int lpc17_ifdown(struct net_driver_s *dev)
/* Disable the Ethernet interrupt */
flags = irqsave();
flags = enter_critical_section();
up_disable_irq(LPC17_IRQ_ETH);
/* Cancel the TX poll timer and TX timeout timers */
@ -1908,7 +1908,7 @@ static int lpc17_ifdown(struct net_driver_s *dev)
lpc17_ethreset(priv);
priv->lp_ifup = false;
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -3114,7 +3114,7 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv)
/* Reset the MAC */
flags = irqsave();
flags = enter_critical_section();
/* Put the MAC into the reset state */
@ -3164,7 +3164,7 @@ static void lpc17_ethreset(struct lpc17_driver_s *priv)
/* Clear any pending interrupts (shouldn't be any) */
lpc17_putreg(0xffffffff, LPC17_ETH_INTCLR);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

11
arch/arm/src/lpc17xx/lpc17_gpdma.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_gpdma.c
*
* Copyright (C) 2010, 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -47,6 +47,7 @@
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_internal.h"
@ -136,11 +137,11 @@ static void lpc17_dmainprogress(struct lpc17_dmach_s *dmach)
/* Increment the DMA in progress counter */
flags = irqsave();
flags = enter_critical_section();
DEBUGASSERT(!dmach->inprogress && g_dma_inprogress < LPC17_NDMACH);
g_dma_inprogress++;
dmach->inprogress = true;
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -167,7 +168,7 @@ static void lpc17_dmadone(struct lpc17_dmach_s *dmach)
/* Increment the DMA in progress counter */
flags = irqsave();
flags = enter_critical_section();
if (dmach->inprogress)
{
DEBUGASSERT(g_dma_inprogress > 0);
@ -175,7 +176,7 @@ static void lpc17_dmadone(struct lpc17_dmach_s *dmach)
g_dma_inprogress--;
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

6
arch/arm/src/lpc17xx/lpc17_gpiodbg.c
View File

@ -43,7 +43,7 @@
#include <stdint.h>
#include <stdbool.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include "up_arch.h"
#include "chip.h"
@ -156,7 +156,7 @@ int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg)
/* The following requires exclusive access to the GPIO registers */
flags = irqsave();
flags = enter_critical_section();
lldbg("GPIO%c pin%d (pinset: %08x) -- %s\n",
port + '0', pin, pinset, msg);
@ -183,7 +183,7 @@ int lpc17_dumpgpio(lpc17_pinset_t pinset, const char *msg)
lldbg(" INTENR[%08x]: %08x INTENF[%08x]: %08x\n",
base+LPC17_GPIOINT_INTENR_OFFSET, getreg32(base+LPC17_GPIOINT_INTENR_OFFSET),
base+LPC17_GPIOINT_INTENF_OFFSET, getreg32(base+LPC17_GPIOINT_INTENF_OFFSET));
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif /* CONFIG_DEBUG_GPIO */

6
arch/arm/src/lpc17xx/lpc17_gpioint.c
View File

@ -44,7 +44,7 @@
#include <errno.h>
#include <debug.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
@ -121,7 +121,7 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin,
/* These must be atomic */
flags = irqsave();
flags = enter_critical_section();
/* Set/clear the rising edge enable bit */
@ -150,7 +150,7 @@ static void lpc17_setintedge(uint32_t intbase, unsigned int pin,
}
putreg32(regval, intbase + LPC17_GPIOINT_INTENF_OFFSET);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

10
arch/arm/src/lpc17xx/lpc17_i2c.c
View File

@ -61,7 +61,7 @@
#include <nuttx/wdog.h>
#include <nuttx/i2c/i2c_master.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -253,10 +253,10 @@ static void lpc17_i2c_timeout(int argc, uint32_t arg, ...)
{
struct lpc17_i2cdev_s *priv = (struct lpc17_i2cdev_s *)arg;
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
priv->state = 0xff;
sem_post(&priv->wait);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -492,7 +492,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_LPC17_I2C0
if (port == 0)
@ -585,7 +585,7 @@ struct i2c_master_s *lpc17_i2cbus_initialize(int port)
return NULL;
}
irqrestore(flags);
leave_critical_section(flags);
putreg32(I2C_CONSET_I2EN, priv->base + LPC17_I2C_CONSET_OFFSET);

6
arch/arm/src/lpc17xx/lpc17_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17/lpc17_irq.c
*
* Copyright (C) 2010-2011, 2013-2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2011, 2013-2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -105,7 +105,7 @@ static void lpc17_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
lldbg("NVIC (%s, irq=%d):\n", msg, irq);
lldbg(" INTCTRL: %08x VECTAB: %08x\n",
getreg32(NVIC_INTCTRL), getreg32(NVIC_VECTAB));
@ -127,7 +127,7 @@ static void lpc17_dumpnvic(const char *msg, int irq)
lldbg(" %08x %08x %08x %08x\n",
getreg32(NVIC_IRQ32_35_PRIORITY), getreg32(NVIC_IRQ36_39_PRIORITY),
getreg32(NVIC_IRQ40_43_PRIORITY), getreg32(NVIC_IRQ44_47_PRIORITY));
irqrestore(flags);
leave_critical_section(flags);
}
#else
# define lpc17_dumpnvic(msg, irq)

15
arch/arm/src/lpc17xx/lpc17_mcpwm.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_mcpwm.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -45,6 +45,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <arch/board/board.h>
@ -291,12 +292,12 @@ static int mcpwm_timer(FAR struct lpc17_mcpwmtimer_s *priv,
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
putreg32(info->frequency, LPC17_MCPWM_LIM0); /* Set PWMMR0 = number of counts */
putreg32(info->duty, LPC17_MCPWM_MAT0); /* Set PWM cycle */
irqrestore(flags);
leave_critical_section(flags);
mcpwm_dumpregs(priv, "After starting");
return OK;
}
@ -423,7 +424,7 @@ static int mcpwm_setup(FAR struct pwm_lowerhalf_s *dev)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
/* Power on the mcpwm peripheral */
@ -493,7 +494,7 @@ static int mcpwm_setup(FAR struct pwm_lowerhalf_s *dev)
putreg32((1 << 0), LPC17_MCPWM_CONSET); /* Start MCPWM timer0 */
irqrestore(flags);
leave_critical_section(flags);
pwm_dumpgpio(priv->pincfg, "PWM setup");
return OK;
}
@ -581,7 +582,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
* to prevent any concurrent access to the reset register.
*/
flags = irqsave();
flags = enter_critical_section();
/* Disable further interrupts and stop the timer */
@ -599,7 +600,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
* into a state where mcpwm_start() can be called.
*/
irqrestore(flags);
leave_critical_section(flags);
pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
mcpwm_dumpregs(priv, "After stop");

13
arch/arm/src/lpc17xx/lpc17_pwm.c
View File

@ -45,6 +45,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <arch/board/board.h>
@ -305,7 +306,7 @@ static int pwm_timer(FAR struct lpc17_pwmtimer_s *priv,
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
putreg32(info->frequency, LPC17_PWM1_MR0); /* Set PWMMR0 = number of counts */
putreg32(info->duty, LPC17_PWM1_MR1); /* Set PWM cycle */
@ -314,7 +315,7 @@ static int pwm_timer(FAR struct lpc17_pwmtimer_s *priv,
putreg32(PWMENA1, LPC17_PWM1_PCR); /* Enable PWM outputs */
putreg32(TCR_CNT_EN | TCR_PWM_EN, LPC17_PWM1_TCR); /* Enable PWM Timer */
irqrestore(flags);
leave_critical_section(flags);
pwm_dumpregs(priv, "After starting");
return OK;
}
@ -441,7 +442,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
/* Power on the pwm peripheral */
@ -464,7 +465,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
putreg32(1, LPC17_PWM1_PR); /* Prescaler count frequency: Fpclk/1 */
putreg32(1 << 1, LPC17_PWM1_MCR); /* Reset on match register MR0 */
irqrestore(flags);
leave_critical_section(flags);
pwm_dumpgpio(priv->pincfg, "PWM setup");
return OK;
}
@ -552,7 +553,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
* to prevent any concurrent access to the reset register.
*/
flags = irqsave();
flags = enter_critical_section();
/* Disable further interrupts and stop the timer */
@ -570,7 +571,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
* into a state where pwm_start() can be called.
*/
irqrestore(flags);
leave_critical_section(flags);
pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwm_dumpregs(priv, "After stop");

26
arch/arm/src/lpc17xx/lpc17_sdcard.c
View File

@ -54,7 +54,7 @@
#include <nuttx/wqueue.h>
#include <nuttx/mmcsd.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -560,7 +560,7 @@ static void lpc17_configwaitints(struct lpc17_dev_s *priv, uint32_t waitmask,
* operation.
*/
flags = irqsave();
flags = enter_critical_section();
priv->waitevents = waitevents;
priv->wkupevent = wkupevent;
priv->waitmask = waitmask;
@ -568,7 +568,7 @@ static void lpc17_configwaitints(struct lpc17_dev_s *priv, uint32_t waitmask,
priv->xfrflags = 0;
#endif
putreg32(priv->xfrmask | priv->waitmask, LPC17_SDCARD_MASK0);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -589,10 +589,10 @@ static void lpc17_configwaitints(struct lpc17_dev_s *priv, uint32_t waitmask,
static void lpc17_configxfrints(struct lpc17_dev_s *priv, uint32_t xfrmask)
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
priv->xfrmask = xfrmask;
putreg32(priv->xfrmask | priv->waitmask, LPC17_SDCARD_MASK0);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -1436,7 +1436,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev)
/* Disable clocking */
flags = irqsave();
flags = enter_critical_section();
/* Disable the SD Interface */
@ -1478,7 +1478,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev)
lpc17_setclock(LPC17_CLCKCR_INIT | SDCARD_CLOCK_CLKEN);
lpc17_setpwrctrl(SDCARD_PWR_CTRL_ON);
irqrestore(flags);
leave_critical_section(flags);
fvdbg("CLCKR: %08x POWER: %08x\n",
getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
@ -2241,7 +2241,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev,
* be non-zero (and, hopefully, the semaphore count will also be non-zero.
*/
flags = irqsave();
flags = enter_critical_section();
DEBUGASSERT(priv->waitevents != 0 || priv->wkupevent != 0);
/* Check if the timeout event is specified in the event set */
@ -2309,7 +2309,7 @@ static sdio_eventset_t lpc17_eventwait(FAR struct sdio_dev_s *dev,
#endif
errout:
irqrestore(flags);
leave_critical_section(flags);
lpc17_dumpsamples(priv);
return wkupevent;
}
@ -2771,7 +2771,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
/* Update card status */
flags = irqsave();
flags = enter_critical_section();
cdstatus = priv->cdstatus;
if (cardinslot)
{
@ -2789,7 +2789,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
{
lpc17_callback(priv);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -2815,7 +2815,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
/* Update card status */
flags = irqsave();
flags = enter_critical_section();
if (wrprotect)
{
priv->cdstatus |= SDIO_STATUS_WRPROTECTED;
@ -2825,6 +2825,6 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
fvdbg("cdstatus: %02x\n", priv->cdstatus);
irqrestore(flags);
leave_critical_section(flags);
}
#endif /* CONFIG_LPC17_SDCARD */

28
arch/arm/src/lpc17xx/lpc17_serial.c
View File

@ -690,7 +690,7 @@ static inline void lpc17_uart0config(void)
/* Step 1: Enable power on UART0 */
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCUART0;
putreg32(regval, LPC17_SYSCON_PCONP);
@ -708,7 +708,7 @@ static inline void lpc17_uart0config(void)
lpc17_configgpio(GPIO_UART0_TXD);
lpc17_configgpio(GPIO_UART0_RXD);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -720,7 +720,7 @@ static inline void lpc17_uart1config(void)
/* Step 1: Enable power on UART1 */
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCUART1;
putreg32(regval, LPC17_SYSCON_PCONP);
@ -748,7 +748,7 @@ static inline void lpc17_uart1config(void)
lpc17_configgpio(GPIO_UART1_RI);
#endif
#endif
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -760,7 +760,7 @@ static inline void lpc17_uart2config(void)
/* Step 1: Enable power on UART2 */
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCUART2;
putreg32(regval, LPC17_SYSCON_PCONP);
@ -778,7 +778,7 @@ static inline void lpc17_uart2config(void)
lpc17_configgpio(GPIO_UART2_TXD);
lpc17_configgpio(GPIO_UART2_RXD);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -790,7 +790,7 @@ static inline void lpc17_uart3config(void)
/* Step 1: Enable power on UART3 */
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCUART3;
putreg32(regval, LPC17_SYSCON_PCONP);
@ -808,7 +808,7 @@ static inline void lpc17_uart3config(void)
lpc17_configgpio(GPIO_UART3_TXD);
lpc17_configgpio(GPIO_UART3_RXD);
irqrestore(flags);
leave_critical_section(flags);
};
#endif
@ -1196,18 +1196,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv, true);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_enablebreaks(priv, false);
irqrestore(flags);
leave_critical_section(flags);
}
break;
@ -1377,7 +1377,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@ -1397,7 +1397,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
up_serialout(priv, LPC17_UART_IER_OFFSET, priv->ier);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

7
arch/arm/src/lpc17xx/lpc17_spi.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_spi.c
*
* Copyright (C) 2010, 2012-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2010, 2012-2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -47,6 +47,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/spi/spi.h>
@ -553,7 +554,7 @@ FAR struct spi_dev_s *lpc17_spibus_initialize(int port)
* #define GPIO_SPI_SCK GPIO_SPI_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
lpc17_configgpio(GPIO_SPI_SCK);
lpc17_configgpio(GPIO_SPI_MISO);
lpc17_configgpio(GPIO_SPI_MOSI);
@ -570,7 +571,7 @@ FAR struct spi_dev_s *lpc17_spibus_initialize(int port)
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCSPI;
putreg32(regval, LPC17_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
/* Configure 8-bit SPI mode and master mode */

15
arch/arm/src/lpc17xx/lpc17_ssp.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_ssp.c
*
* Copyright (C) 2010-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2010-2013, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -47,6 +47,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/spi/spi.h>
@ -801,7 +802,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp0initialize(void)
* #define GPIO_SSP0_SCK GPIO_SSP0_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
lpc17_configgpio(GPIO_SSP0_SCK);
lpc17_configgpio(GPIO_SSP0_MISO);
lpc17_configgpio(GPIO_SSP0_MOSI);
@ -820,7 +821,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp0initialize(void)
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCSSP0;
putreg32(regval, LPC17_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
return &g_ssp0dev;
}
@ -855,7 +856,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp1initialize(void)
* #define GPIO_SSP0_SCK GPIO_SSP0_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
lpc17_configgpio(GPIO_SSP1_SCK);
lpc17_configgpio(GPIO_SSP1_MISO);
lpc17_configgpio(GPIO_SSP1_MOSI);
@ -874,7 +875,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp1initialize(void)
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCSSP1;
putreg32(regval, LPC17_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
return &g_ssp1dev;
}
@ -908,7 +909,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp2initialize(void)
* #define GPIO_SSP2_SCK GPIO_SSP2_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
lpc17_configgpio(GPIO_SSP2_SCK);
lpc17_configgpio(GPIO_SSP2_MISO);
lpc17_configgpio(GPIO_SSP2_MOSI);
@ -927,7 +928,7 @@ static inline FAR struct lpc17_sspdev_s *lpc17_ssp2initialize(void)
regval = getreg32(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCSSP2;
putreg32(regval, LPC17_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
return &g_ssp2dev;
}

15
arch/arm/src/lpc17xx/lpc17_timer.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc17xx/lpc17_timer.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -45,6 +45,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/pwm.h>
#include <arch/board/board.h>
@ -290,7 +291,7 @@ static int timer_timer(FAR struct lpc17_timer_s *priv,
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
putreg32(info->frequency, LPC17_TMR0_MR1); /* Set TIMER0 MR1 = number of counts */
putreg32(info->frequency, LPC17_TMR1_MR0); /* Set TIMER1 MR0 = number of counts */
@ -298,7 +299,7 @@ static int timer_timer(FAR struct lpc17_timer_s *priv,
putreg32(1, LPC17_TMR0_TCR); /* Start timer0 */
putreg32(1, LPC17_TMR1_TCR); /* Start timer1 */
irqrestore(flags);
leave_critical_section(flags);
timer_dumpregs(priv, "After starting");
return OK;
}
@ -385,7 +386,7 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
/* Power on the timer peripherals */
@ -442,7 +443,7 @@ static int timer_setup(FAR struct pwm_lowerhalf_s *dev)
/* configure the output pins GPIO3.26 */
// lpc17_configgpio(GPIO_MAT0p1_2);
irqrestore(flags);
leave_critical_section(flags);
pwm_dumpgpio(priv->pincfg, "TIMER setup");
return OK;
}
@ -530,7 +531,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
* to prevent any concurrent access to the reset register.
*/
flags = irqsave();
flags = enter_critical_section();
/* Disable further interrupts and stop the timer */
@ -548,7 +549,7 @@ static int timer_stop(FAR struct pwm_lowerhalf_s *dev)
* into a state where timer_start() can be called.
*/
irqrestore(flags);
leave_critical_section(flags);
pwmdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
timer_dumpregs(priv, "After stop");

52
arch/arm/src/lpc17xx/lpc17_usbdev.c
View File

@ -53,7 +53,7 @@
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbdev_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "up_arch.h"
@ -659,7 +659,7 @@ static uint32_t lpc17_usbcmd(uint16_t cmd, uint8_t data)
/* Disable interrupt and clear CDFULL and CCEMPTY interrupt status */
flags = irqsave();
flags = enter_critical_section();
lpc17_putreg(USBDEV_INT_CDFULL | USBDEV_INT_CCEMPTY, LPC17_USBDEV_INTCLR);
/* Shift the command in position and mask out extra bits */
@ -782,7 +782,7 @@ static uint32_t lpc17_usbcmd(uint16_t cmd, uint8_t data)
/* Restore the interrupt flags */
irqrestore(flags);
leave_critical_section(flags);
return tmp;
}
@ -1022,9 +1022,9 @@ static void lpc17_reqcomplete(struct lpc17_ep_s *privep, int16_t result)
/* Remove the completed request at the head of the endpoint request list */
flags = irqsave();
flags = enter_critical_section();
privreq = lpc17_rqdequeue(privep);
irqrestore(flags);
leave_critical_section(flags);
if (privreq)
{
@ -2622,7 +2622,7 @@ static int lpc17_epdisable(FAR struct usbdev_ep_s *ep)
/* Cancel any ongoing activity */
flags = irqsave();
flags = enter_critical_section();
lpc17_cancelrequests(privep);
/* Disable endpoint and interrupt */
@ -2637,7 +2637,7 @@ static int lpc17_epdisable(FAR struct usbdev_ep_s *ep)
regval &= ~mask;
lpc17_putreg(regval, LPC17_USBDEV_EPINTEN);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2815,7 +2815,7 @@ static int lpc17_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
req->result = -EINPROGRESS;
req->xfrd = 0;
flags = irqsave();
flags = enter_critical_section();
/* If we are stalled, then drop all requests on the floor */
@ -2861,7 +2861,7 @@ static int lpc17_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
}
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -2888,9 +2888,9 @@ static int lpc17_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
usbtrace(TRACE_EPCANCEL, privep->epphy);
flags = irqsave();
flags = enter_critical_section();
lpc17_cancelrequests(privep);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2909,7 +2909,7 @@ static int lpc17_epstall(FAR struct usbdev_ep_s *ep, bool resume)
/* STALL or RESUME the endpoint */
flags = irqsave();
flags = enter_critical_section();
usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, privep->epphy);
lpc17_usbcmd(CMD_USBDEV_EPSETSTATUS | privep->epphy, (resume ? 0 : CMD_SETSTAUS_ST));
@ -2919,7 +2919,7 @@ static int lpc17_epstall(FAR struct usbdev_ep_s *ep, bool resume)
{
(void)lpc17_wrrequest(privep);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -3021,7 +3021,7 @@ static FAR struct usbdev_ep_s *lpc17_allocep(FAR struct usbdev_s *dev, uint8_t e
{
/* Yes.. now see if any of the request endpoints are available */
flags = irqsave();
flags = enter_critical_section();
epset &= priv->epavail;
if (epset)
{
@ -3035,7 +3035,7 @@ static FAR struct usbdev_ep_s *lpc17_allocep(FAR struct usbdev_s *dev, uint8_t e
/* Mark the IN/OUT endpoint no longer available */
priv->epavail &= ~(3 << (bit & ~1));
irqrestore(flags);
leave_critical_section(flags);
/* And return the pointer to the standard endpoint structure */
@ -3044,7 +3044,7 @@ static FAR struct usbdev_ep_s *lpc17_allocep(FAR struct usbdev_s *dev, uint8_t e
}
/* Shouldn't get here */
}
irqrestore(flags);
leave_critical_section(flags);
}
usbtrace(TRACE_DEVERROR(LPC17_TRACEERR_NOEP), (uint16_t)eplog);
@ -3071,9 +3071,9 @@ static void lpc17_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep)
{
/* Mark the endpoint as available */
flags = irqsave();
flags = enter_critical_section();
priv->epavail |= (1 << privep->epphy);
irqrestore(flags);
leave_critical_section(flags);
}
}
@ -3117,14 +3117,14 @@ static int lpc17_wakeup(struct usbdev_s *dev)
usbtrace(TRACE_DEVWAKEUP, (uint16_t)g_usbdev.devstatus);
flags = irqsave();
flags = enter_critical_section();
if (DEVSTATUS_CONNECT(g_usbdev.devstatus))
{
arg |= CMD_STATUS_CONNECT;
}
lpc17_usbcmd(CMD_USBDEV_SETSTATUS, arg);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -3201,7 +3201,7 @@ void up_usbinitialize(void)
/* Step 1: Enable power by setting PCUSB in the PCONP register */
flags = irqsave();
flags = enter_critical_section();
regval = lpc17_getreg(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCUSB;
lpc17_putreg(regval, LPC17_SYSCON_PCONP);
@ -3240,7 +3240,7 @@ void up_usbinitialize(void)
regval = lpc17_getreg(LPC17_SYSCON_USBINTST);
regval &= ~SYSCON_USBINTST_ENINTS;
lpc17_putreg(regval, LPC17_SYSCON_USBINTST);
irqrestore(flags);
leave_critical_section(flags);
/* Initialize the device state structure */
@ -3325,11 +3325,11 @@ void up_usbinitialize(void)
* driver
*/
flags = irqsave();
flags = enter_critical_section();
regval = lpc17_getreg(LPC17_SYSCON_USBINTST);
regval |= SYSCON_USBINTST_ENINTS;
lpc17_putreg(regval, LPC17_SYSCON_USBINTST);
irqrestore(flags);
leave_critical_section(flags);
/* Disconnect device */
@ -3373,7 +3373,7 @@ void up_usbuninitialize(void)
/* Disconnect device */
flags = irqsave();
flags = enter_critical_section();
lpc17_pullup(&priv->usbdev, false);
priv->usbdev.speed = USB_SPEED_UNKNOWN;
lpc17_usbcmd(CMD_USBDEV_CONFIG, 0);
@ -3388,7 +3388,7 @@ void up_usbuninitialize(void)
regval = lpc17_getreg(LPC17_SYSCON_PCONP);
regval &= ~SYSCON_PCONP_PCUSB;
lpc17_putreg(regval, LPC17_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

68
arch/arm/src/lpc17xx/lpc17_usbhost.c
View File

@ -56,7 +56,7 @@
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/usbhost_devaddr.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h> /* May redefine GPIO settings */
@ -660,14 +660,14 @@ static struct lpc17_gtd_s *lpc17_tdalloc(void)
* interrupt handler.
*/
flags = irqsave();
flags = enter_critical_section();
ret = (struct lpc17_gtd_s *)g_tdfree;
if (ret)
{
g_tdfree = ((struct lpc17_list_s *)ret)->flink;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -759,14 +759,14 @@ static uint8_t *lpc17_allocio(void)
/* lpc17_freeio() may be called from the interrupt level */
flags = irqsave();
flags = enter_critical_section();
ret = (uint8_t *)g_iofree;
if (ret)
{
g_iofree = ((struct lpc17_list_s *)ret)->flink;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
#endif
@ -787,11 +787,11 @@ static void lpc17_freeio(uint8_t *buffer)
/* Could be called from the interrupt level */
flags = irqsave();
flags = enter_critical_section();
iofree = (struct lpc17_list_s *)buffer;
iofree->flink = g_iofree;
g_iofree = iofree;
irqrestore(flags);
leave_critical_section(flags);
}
#endif
@ -814,14 +814,14 @@ static struct lpc17_xfrinfo_s *lpc17_alloc_xfrinfo(void)
/* lpc17_free_xfrinfo() may be called from the interrupt level */
flags = irqsave();
flags = enter_critical_section();
ret = (struct lpc17_xfrinfo_s *)g_xfrfree;
if (ret)
{
g_xfrfree = ((struct lpc17_list_s *)ret)->flink;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -840,11 +840,11 @@ static void lpc17_free_xfrinfo(struct lpc17_xfrinfo_s *xfrinfo)
/* Could be called from the interrupt level */
flags = irqsave();
flags = enter_critical_section();
node = (struct lpc17_list_s *)xfrinfo;
node->flink = g_xfrfree;
g_xfrfree = node;
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -863,7 +863,7 @@ static inline int lpc17_addctrled(struct lpc17_usbhost_s *priv,
/* Disable control list processing while we modify the list */
flags = irqsave();
flags = enter_critical_section();
regval = lpc17_getreg(LPC17_USBHOST_CTRL);
regval &= ~OHCI_CTRL_CLE;
lpc17_putreg(regval, LPC17_USBHOST_CTRL);
@ -881,7 +881,7 @@ static inline int lpc17_addctrled(struct lpc17_usbhost_s *priv,
regval |= OHCI_CTRL_CLE;
lpc17_putreg(regval, LPC17_USBHOST_CTRL);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -904,7 +904,7 @@ static inline int lpc17_remctrled(struct lpc17_usbhost_s *priv,
/* Disable control list processing while we modify the list */
flags = irqsave();
flags = enter_critical_section();
regval = lpc17_getreg(LPC17_USBHOST_CTRL);
regval &= ~OHCI_CTRL_CLE;
lpc17_putreg(regval, LPC17_USBHOST_CTRL);
@ -963,7 +963,7 @@ static inline int lpc17_remctrled(struct lpc17_usbhost_s *priv,
lpc17_putreg(regval, LPC17_USBHOST_CTRL);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -984,7 +984,7 @@ static inline int lpc17_addbulked(struct lpc17_usbhost_s *priv,
/* Disable bulk list processing while we modify the list */
flags = irqsave();
flags = enter_critical_section();
regval = lpc17_getreg(LPC17_USBHOST_CTRL);
regval &= ~OHCI_CTRL_BLE;
lpc17_putreg(regval, LPC17_USBHOST_CTRL);
@ -1002,7 +1002,7 @@ static inline int lpc17_addbulked(struct lpc17_usbhost_s *priv,
regval |= OHCI_CTRL_BLE;
lpc17_putreg(regval, LPC17_USBHOST_CTRL);
irqrestore(flags);
leave_critical_section(flags);
return OK;
#else
return -ENOSYS;
@ -1029,7 +1029,7 @@ static inline int lpc17_rembulked(struct lpc17_usbhost_s *priv,
/* Disable bulk list processing while we modify the list */
flags = irqsave();
flags = enter_critical_section();
regval = lpc17_getreg(LPC17_USBHOST_CTRL);
regval &= ~OHCI_CTRL_BLE;
lpc17_putreg(regval, LPC17_USBHOST_CTRL);
@ -1082,7 +1082,7 @@ static inline int lpc17_rembulked(struct lpc17_usbhost_s *priv,
lpc17_putreg(regval, LPC17_USBHOST_CTRL);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
#else
return -ENOSYS;
@ -1494,7 +1494,7 @@ static int lpc17_enqueuetd(struct lpc17_usbhost_s *priv,
static int lpc17_wdhwait(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed)
{
struct lpc17_xfrinfo_s *xfrinfo;
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
int ret = -ENODEV;
DEBUGASSERT(ed && ed->xfrinfo);
@ -1512,7 +1512,7 @@ static int lpc17_wdhwait(struct lpc17_usbhost_s *priv, struct lpc17_ed_s *ed)
ret = OK;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -1942,7 +1942,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
struct usbhost_hubport_s *connport;
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
for (; ; )
{
/* Is there a change in the connection state of the single root hub
@ -1965,7 +1965,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
/* And return the root hub port */
*hport = connport;
irqrestore(flags);
leave_critical_section(flags);
udbg("RHport Connected: %s\n",
connport->connected ? "YES" : "NO");
@ -1985,7 +1985,7 @@ static int lpc17_wait(struct usbhost_connection_s *conn,
priv->hport = NULL;
*hport = connport;
irqrestore(flags);
leave_critical_section(flags);
udbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
@ -2856,7 +2856,7 @@ static void lpc17_dma_free(struct lpc17_usbhost_s *priv,
/* Could be called from the interrupt level */
flags = irqsave();
flags = enter_critical_section();
if (userbuffer && newbuffer)
{
/* If this is an IN transaction, get the user data from the AHB
@ -2875,7 +2875,7 @@ static void lpc17_dma_free(struct lpc17_usbhost_s *priv,
lpc17_freeio(newbuffer);
}
irqrestore(flags);
leave_critical_section(flags);
}
#endif
@ -3313,7 +3313,7 @@ static int lpc17_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* These first steps must be atomic as possible */
flags = irqsave();
flags = enter_critical_section();
/* It is possible there there is no transfer to be in progress */
@ -3417,7 +3417,7 @@ static int lpc17_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
/* Determine the return value */
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -3458,7 +3458,7 @@ static int lpc17_connect(FAR struct usbhost_driver_s *drvr,
/* Report the connection event */
flags = irqsave();
flags = enter_critical_section();
priv->hport = hport;
if (priv->pscwait)
{
@ -3466,7 +3466,7 @@ static int lpc17_connect(FAR struct usbhost_driver_s *drvr,
lpc17_givesem(&priv->pscsem);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif
@ -3644,11 +3644,11 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
* because this register may be shared with other drivers.
*/
flags = irqsave();
flags = enter_critical_section();
regval = lpc17_getreg(LPC17_SYSCON_PCONP);
regval |= SYSCON_PCONP_PCUSB;
lpc17_putreg(regval, LPC17_SYSCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
/* Enable clocking on USB (USB PLL clocking was initialized in very low-
* evel clock setup logic (see lpc17_clockconfig.c)). We do still need
@ -3833,11 +3833,11 @@ struct usbhost_connection_s *lpc17_usbhost_initialize(int controller)
* because this register may be shared with other drivers.
*/
flags = irqsave();
flags = enter_critical_section();
regval = lpc17_getreg(LPC17_SYSCON_USBINTST);
regval |= SYSCON_USBINTST_ENINTS;
lpc17_putreg(regval, LPC17_SYSCON_USBINTST);
irqrestore(flags);
leave_critical_section(flags);
/* If there is a USB device in the slot at power up, then we will not
* get the status change interrupt to signal us that the device is

10
arch/arm/src/lpc214x/lpc214x_irq.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc214x/lpc214x_irq.c
*
* Copyright (C) 2007-2009, 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2009, 2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -153,7 +153,7 @@ void up_enable_irq(int irq)
{
/* Disable all interrupts */
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
/* Enable the irq by setting the corresponding bit in the VIC
* Interrupt Enable register.
@ -161,7 +161,7 @@ void up_enable_irq(int irq)
uint32_t val = vic_getreg(LPC214X_VIC_INTENABLE_OFFSET);
vic_putreg(val | (1 << irq), LPC214X_VIC_INTENABLE_OFFSET);
irqrestore(flags);
leave_critical_section(flags);
}
}
@ -184,7 +184,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler)
/* Disable all interrupts */
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
/* Save the vector address */
@ -194,7 +194,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler)
vic_putreg(((irq << LPC214X_VECTCNTL_IRQSHIFT) | LPC214X_VECTCNTL_ENABLE),
LPC214X_VIC_VECTCNTL0_OFFSET + offset);
irqrestore(flags);
leave_critical_section(flags);
}
}
#endif

8
arch/arm/src/lpc214x/lpc214x_serial.c
View File

@ -590,18 +590,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv, true);
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_enablebreaks(priv, false);
irqrestore(flags);
leave_critical_section(flags);
}
break;

44
arch/arm/src/lpc214x/lpc214x_usbdev.c
View File

@ -53,7 +53,7 @@
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbdev_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -609,7 +609,7 @@ static uint32_t lpc214x_usbcmd(uint16_t cmd, uint8_t data)
/* Disable interrupt and clear CDFULL and CCEMPTY interrupt status */
flags = irqsave();
flags = enter_critical_section();
lpc214x_putreg(USBDEV_DEVINT_CDFULL | USBDEV_DEVINT_CCEMTY,
LPC214X_USBDEV_DEVINTCLR);
@ -727,7 +727,7 @@ static uint32_t lpc214x_usbcmd(uint16_t cmd, uint8_t data)
/* Restore the interrupt flags */
irqrestore(flags);
leave_critical_section(flags);
return tmp;
}
@ -967,9 +967,9 @@ static void lpc214x_reqcomplete(struct lpc214x_ep_s *privep, int16_t result)
/* Remove the completed request at the head of the endpoint request list */
flags = irqsave();
flags = enter_critical_section();
privreq = lpc214x_rqdequeue(privep);
irqrestore(flags);
leave_critical_section(flags);
if (privreq)
{
@ -2588,7 +2588,7 @@ static int lpc214x_epdisable(FAR struct usbdev_ep_s *ep)
/* Cancel any ongoing activity */
flags = irqsave();
flags = enter_critical_section();
lpc214x_cancelrequests(privep);
/* Disable endpoint and interrupt */
@ -2603,7 +2603,7 @@ static int lpc214x_epdisable(FAR struct usbdev_ep_s *ep)
reg &= ~mask;
lpc214x_putreg(reg, LPC214X_USBDEV_EPINTEN);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2781,7 +2781,7 @@ static int lpc214x_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
req->result = -EINPROGRESS;
req->xfrd = 0;
flags = irqsave();
flags = enter_critical_section();
/* If we are stalled, then drop all requests on the floor */
@ -2827,7 +2827,7 @@ static int lpc214x_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
}
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -2853,9 +2853,9 @@ static int lpc214x_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s
#endif
usbtrace(TRACE_EPCANCEL, privep->epphy);
flags = irqsave();
flags = enter_critical_section();
lpc214x_cancelrequests(privep);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2874,7 +2874,7 @@ static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, bool resume)
/* STALL or RESUME the endpoint */
flags = irqsave();
flags = enter_critical_section();
usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, privep->epphy);
lpc214x_usbcmd(CMD_USB_EP_SETSTATUS | privep->epphy, (resume ? 0 : USBDEV_EPSTALL));
@ -2884,7 +2884,7 @@ static int lpc214x_epstall(FAR struct usbdev_ep_s *ep, bool resume)
{
(void)lpc214x_wrrequest(privep);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2986,7 +2986,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, uint8_t
{
/* Yes.. now see if any of the request endpoints are available */
flags = irqsave();
flags = enter_critical_section();
epset &= priv->epavail;
if (epset)
{
@ -3000,7 +3000,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, uint8_t
/* Mark the IN/OUT endpoint no longer available */
priv->epavail &= ~(3 << (bit & ~1));
irqrestore(flags);
leave_critical_section(flags);
/* And return the pointer to the standard endpoint structure */
@ -3009,7 +3009,7 @@ static FAR struct usbdev_ep_s *lcp214x_allocep(FAR struct usbdev_s *dev, uint8_t
}
/* Shouldn't get here */
}
irqrestore(flags);
leave_critical_section(flags);
}
usbtrace(TRACE_DEVERROR(LPC214X_TRACEERR_NOEP), (uint16_t)eplog);
@ -3036,9 +3036,9 @@ static void lpc214x_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep)
{
/* Mark the endpoint as available */
flags = irqsave();
flags = enter_critical_section();
priv->epavail |= (1 << privep->epphy);
irqrestore(flags);
leave_critical_section(flags);
}
}
@ -3082,14 +3082,14 @@ static int lpc214x_wakeup(struct usbdev_s *dev)
usbtrace(TRACE_DEVWAKEUP, (uint16_t)g_usbdev.devstatus);
flags = irqsave();
flags = enter_critical_section();
if (DEVSTATUS_CONNECT(g_usbdev.devstatus))
{
arg |= USBDEV_DEVSTATUS_CONNECT;
}
lpc214x_usbcmd(CMD_USB_DEV_SETSTATUS, arg);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -3289,7 +3289,7 @@ void up_usbuninitialize(void)
/* Disconnect device */
flags = irqsave();
flags = enter_critical_section();
lpc214x_pullup(&priv->usbdev, false);
priv->usbdev.speed = USB_SPEED_UNKNOWN;
lpc214x_usbcmd(CMD_USB_DEV_CONFIG, 0);
@ -3304,7 +3304,7 @@ void up_usbuninitialize(void)
reg = lpc214x_getreg(LPC214X_PCON_PCONP);
reg &= ~LPC214X_PCONP_PCUSB;
lpc214x_putreg(reg, LPC214X_PCON_PCONP);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

10
arch/arm/src/lpc2378/lpc23xx_i2c.c
View File

@ -66,7 +66,7 @@
#include <nuttx/wdog.h>
#include <nuttx/i2c/i2c_master.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -258,10 +258,10 @@ static void lpc2378_i2c_timeout(int argc, uint32_t arg, ...)
{
struct lpc2378_i2cdev_s *priv = (struct lpc2378_i2cdev_s *)arg;
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
priv->state = 0xff;
sem_post(&priv->wait);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -497,7 +497,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_LPC2378_I2C0
if (port == 0)
@ -596,7 +596,7 @@ struct i2c_master_s *lpc2378_i2cbus_initialize(int port)
return NULL;
}
irqrestore(flags);
leave_critical_section(flags);
putreg32(I2C_CONSET_I2EN, priv->base + I2C_CONSET_OFFSET);

8
arch/arm/src/lpc2378/lpc23xx_irq.c
View File

@ -177,7 +177,7 @@ void up_enable_irq(int irq)
{
/* Disable all interrupts */
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
/* Enable the irq by setting the corresponding bit in the VIC Interrupt
* Enable register.
@ -185,7 +185,7 @@ void up_enable_irq(int irq)
uint32_t val = vic_getreg(VIC_INTENABLE_OFFSET);
vic_putreg(val | (1 << irq), VIC_INTENABLE_OFFSET);
irqrestore(flags);
leave_critical_section(flags);
}
}
@ -263,7 +263,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler)
/* Disable all interrupts */
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
/* Save the vector address */
@ -280,7 +280,7 @@ void up_attach_vector(int irq, int vector, vic_vector_t handler)
uint32_t val = vic_getreg(VIC_INTENABLE_OFFSET);
vic_putreg(val | (1 << irq), VIC_INTENABLE_OFFSET);
irqrestore(flags);
leave_critical_section(flags);
}
}
#endif

8
arch/arm/src/lpc2378/lpc23xx_serial.c
View File

@ -709,9 +709,9 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on,
* unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks(priv, true);
irqrestore(flags);
leave_critical_section(flags);
}
break;
@ -719,9 +719,9 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
* unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_enablebreaks(priv, false);
irqrestore(flags);
leave_critical_section(flags);
}
break;

5
arch/arm/src/lpc2378/lpc23xx_spi.c
View File

@ -52,6 +52,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/spi/spi.h>
@ -557,7 +558,7 @@ FAR struct spi_dev_s *lpc23_spibus_initialize(int port)
* #define GPIO_SPI_SCK GPIO_SPI_SCK_1
*/
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(LPC23XX_SCB_BASE+SCB_PCONP_OFFSET);
regval |= PCSPI;
@ -578,7 +579,7 @@ FAR struct spi_dev_s *lpc23_spibus_initialize(int port)
regval |= SPI_PINSEL1;
putreg32(regval, LPC23XX_PINSEL1);
irqrestore(flags);
leave_critical_section(flags);
/* Configure 8-bit SPI mode and master mode */

26
arch/arm/src/lpc31xx/lpc31_ehci.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc31xx/lpc31_ehci.c
*
* Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -48,6 +48,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/kmalloc.h>
#include <nuttx/wqueue.h>
@ -1588,7 +1589,7 @@ static int lpc31_ioc_setup(struct lpc31_rhport_s *rhport, struct lpc31_epinfo_s
/* Is the device still connected? */
flags = irqsave();
flags = enter_critical_section();
if (rhport->connected)
{
/* Then set iocwait to indicate that we expect to be informed when
@ -1607,7 +1608,7 @@ static int lpc31_ioc_setup(struct lpc31_rhport_s *rhport, struct lpc31_epinfo_s
ret = OK; /* We are good to go */
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -2575,7 +2576,7 @@ static inline int lpc31_ioc_async_setup(struct lpc31_rhport_s *rhport,
/* Is the device still connected? */
flags = irqsave();
flags = enter_critical_section();
if (rhport->connected)
{
/* Then save callback information to used when either (1) the
@ -2591,7 +2592,7 @@ static inline int lpc31_ioc_async_setup(struct lpc31_rhport_s *rhport,
ret = OK; /* We are good to go */
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
#endif
@ -3450,7 +3451,7 @@ static int lpc31_wait(FAR struct usbhost_connection_s *conn,
* ports or until an error occurs.
*/
flags = irqsave();
flags = enter_critical_section();
for (; ; )
{
/* Check for a change in the connection state on any root hub port */
@ -3472,7 +3473,7 @@ static int lpc31_wait(FAR struct usbhost_connection_s *conn,
connport->connected = rhport->connected;
*hport = connport;
irqrestore(flags);
leave_critical_section(flags);
usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP,
rhpndx + 1, rhport->connected);
@ -3493,7 +3494,7 @@ static int lpc31_wait(FAR struct usbhost_connection_s *conn,
g_ehci.hport = NULL;
*hport = (struct usbhost_hubport_s *)connport;
irqrestore(flags);
leave_critical_section(flags);
usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP,
connport->port + 1, connport->connected);
@ -4510,7 +4511,7 @@ static int lpc31_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* related race conditions.
*/
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_USBHOST_ASYNCH
callback = epinfo->callback;
arg = epinfo->arg;
@ -4522,7 +4523,6 @@ static int lpc31_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
epinfo->arg = NULL;
#endif
epinfo->iocwait = false;
irqrestore(flags);
/* This will prevent any callbacks from occurring while are performing
* the cancellation. The transfer may still be in progress, however, so
@ -4531,7 +4531,7 @@ static int lpc31_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
epinfo->callback = NULL;
epinfo->arg = NULL;
irqrestore(flags);
leave_critical_section(flags);
/* Bail if there is no transfer in progress for this endpoint */
@ -4691,7 +4691,7 @@ static int lpc31_connect(FAR struct usbhost_driver_s *drvr,
/* Report the connection event */
flags = irqsave();
flags = enter_critical_section();
DEBUGASSERT(g_ehci.hport == NULL); /* REVISIT */
g_ehci.hport = hport;
@ -4701,7 +4701,7 @@ static int lpc31_connect(FAR struct usbhost_driver_s *drvr,
lpc31_givesem(&g_ehci.pscsem);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif

10
arch/arm/src/lpc31xx/lpc31_i2c.c
View File

@ -53,7 +53,7 @@
#include <nuttx/wdog.h>
#include <nuttx/i2c/i2c_master.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -409,7 +409,7 @@ static void i2c_timeout(int argc, uint32_t arg, ...)
{
struct lpc31_i2cdev_s *priv = (struct lpc31_i2cdev_s *) arg;
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
if (priv->state != I2C_STATE_DONE)
{
@ -435,7 +435,7 @@ static void i2c_timeout(int argc, uint32_t arg, ...)
sem_post(&priv->wait);
}
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -473,7 +473,7 @@ static int i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs
/* Get exclusive access to the I2C bus */
sem_wait(&priv->mutex);
flags = irqsave();
flags = enter_critical_section();
/* Set up for the transfer */
@ -507,7 +507,7 @@ static int i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs
wd_cancel(priv->timeout);
ret = count - priv->nmsg;
irqrestore(flags);
leave_critical_section(flags);
sem_post(&priv->mutex);
return ret;
}

2
arch/arm/src/lpc31xx/lpc31_irq.c
View File

@ -2,7 +2,7 @@
* arch/arm/src/lpc31xx/lpc31_irq.c
* arch/arm/src/chip/lpc31_irq.c
*
* Copyright (C) 2009-2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2011, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without

8
arch/arm/src/lpc31xx/lpc31_serial.c
View File

@ -604,18 +604,18 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
case TIOCSBRK: /* BSD compatibility: Turn break on, unconditionally */
{
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
up_enablebreaks();
irqrestore(flags);
leave_critical_section(flags);
}
break;
case TIOCCBRK: /* BSD compatibility: Turn break off, unconditionally */
{
irqstate_t flags;
flags = irqsave();
flags = enter_critical_section();
up_disablebreaks();
irqrestore(flags);
leave_critical_section(flags);
}
break;

40
arch/arm/src/lpc31xx/lpc31_usbdev.c
View File

@ -58,7 +58,7 @@
#include <nuttx/usb/usbdev.h>
#include <nuttx/usb/usbdev_trace.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -1948,7 +1948,7 @@ static int lpc31_epdisable(FAR struct usbdev_ep_s *ep)
#endif
usbtrace(TRACE_EPDISABLE, privep->epphy);
flags = irqsave();
flags = enter_critical_section();
/* Disable Endpoint */
if (LPC31_EPPHYIN(privep->epphy))
@ -1961,7 +1961,7 @@ static int lpc31_epdisable(FAR struct usbdev_ep_s *ep)
/* Cancel any ongoing activity */
lpc31_cancelrequests(privep, -ESHUTDOWN);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2104,7 +2104,7 @@ static int lpc31_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
/* Disable Interrupts */
flags = irqsave();
flags = enter_critical_section();
/* If we are stalled, then drop all requests on the floor */
@ -2127,7 +2127,7 @@ static int lpc31_epsubmit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
}
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -2154,7 +2154,7 @@ static int lpc31_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
usbtrace(TRACE_EPCANCEL, privep->epphy);
flags = irqsave();
flags = enter_critical_section();
/* FIXME: if the request is the first, then we need to flush the EP
* otherwise just remove it from the list
@ -2163,7 +2163,7 @@ static int lpc31_epcancel(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *r
*/
lpc31_cancelrequests(privep, -ESHUTDOWN);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2182,7 +2182,7 @@ static int lpc31_epstall(FAR struct usbdev_ep_s *ep, bool resume)
/* STALL or RESUME the endpoint */
flags = irqsave();
flags = enter_critical_section();
usbtrace(resume ? TRACE_EPRESUME : TRACE_EPSTALL, privep->epphy);
uint32_t addr = LPC31_USBDEV_ENDPTCTRL(privep->epphy);
@ -2204,7 +2204,7 @@ static int lpc31_epstall(FAR struct usbdev_ep_s *ep, bool resume)
lpc31_setbits (ctrl_xs, addr);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2306,7 +2306,7 @@ static FAR struct usbdev_ep_s *lpc31_allocep(FAR struct usbdev_s *dev, uint8_t e
{
/* Yes.. now see if any of the request endpoints are available */
flags = irqsave();
flags = enter_critical_section();
epset &= priv->epavail;
if (epset)
{
@ -2320,7 +2320,7 @@ static FAR struct usbdev_ep_s *lpc31_allocep(FAR struct usbdev_s *dev, uint8_t e
/* Mark the IN/OUT endpoint no longer available */
priv->epavail &= ~(3 << (bit & ~1));
irqrestore(flags);
leave_critical_section(flags);
/* And return the pointer to the standard endpoint structure */
@ -2329,7 +2329,7 @@ static FAR struct usbdev_ep_s *lpc31_allocep(FAR struct usbdev_s *dev, uint8_t e
}
/* Shouldn't get here */
}
irqrestore(flags);
leave_critical_section(flags);
}
usbtrace(TRACE_DEVERROR(LPC31_TRACEERR_NOEP), (uint16_t)eplog);
@ -2356,9 +2356,9 @@ static void lpc31_freeep(FAR struct usbdev_s *dev, FAR struct usbdev_ep_s *ep)
{
/* Mark the endpoint as available */
flags = irqsave();
flags = enter_critical_section();
priv->epavail |= (1 << privep->epphy);
irqrestore(flags);
leave_critical_section(flags);
}
}
@ -2403,9 +2403,9 @@ static int lpc31_wakeup(struct usbdev_s *dev)
usbtrace(TRACE_DEVWAKEUP, 0);
flags = irqsave();
flags = enter_critical_section();
lpc31_setbits(USBDEV_PRTSC1_FPR, LPC31_USBDEV_PORTSC1);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2447,12 +2447,12 @@ static int lpc31_pullup(struct usbdev_s *dev, bool enable)
{
usbtrace(TRACE_DEVPULLUP, (uint16_t)enable);
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
if (enable)
lpc31_setbits (USBDEV_USBCMD_RS, LPC31_USBDEV_USBCMD);
else
lpc31_clrbits (USBDEV_USBCMD_RS, LPC31_USBDEV_USBCMD);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2617,7 +2617,7 @@ void up_usbuninitialize(void)
/* Disconnect device */
flags = irqsave();
flags = enter_critical_section();
lpc31_pullup(&priv->usbdev, false);
priv->usbdev.speed = USB_SPEED_UNKNOWN;
@ -2637,7 +2637,7 @@ void up_usbuninitialize(void)
lpc31_disableclock (CLKID_USBOTGAHBCLK);
lpc31_disableclock (CLKID_EVENTROUTERPCLK);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

7
arch/arm/src/lpc43xx/lpc43_adc.c
View File

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/lpc43xx/lpc43_adc.c
*
* Copyright(C) 2012 Gregory Nutt. All rights reserved.
* Copyright(C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Ported from from the LPC17 version:
@ -58,6 +58,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/analog/adc.h>
@ -188,7 +189,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
priv->mask_int &= ~(priv->mask_int >> 1);
}
flags = irqsave();
flags = enter_critical_section();
/* Clock peripheral */
@ -302,7 +303,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
}
#endif /* PINCONF_ADC0_C7 */
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************

7
arch/arm/src/lpc43xx/lpc43_dac.c
View File

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/lpc43xx/lpc43_dac.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Ported from from the LPC17 version:
@ -58,6 +58,7 @@
#include <debug.h>
#include <arch/board/board.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/analog/dac.h>
@ -122,7 +123,7 @@ static void dac_reset(FAR struct dac_dev_s *dev)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
regval = getreg32(LPC43_SYSCON_PCLKSEL0);
regval &= ~SYSCON_PCLKSEL0_DAC_MASK;
@ -133,7 +134,7 @@ static void dac_reset(FAR struct dac_dev_s *dev)
lpc43_configgpio(GPIO_AOUT);
irqrestore(flags);
leave_critical_section(flags);
}
/* Configure the DAC. This method is called the first time that the DAC

26
arch/arm/src/lpc43xx/lpc43_ehci.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc43xx/lpc43_ehci.c
*
* Copyright (C) 2013-2015 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2016 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -47,6 +47,7 @@
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/kmalloc.h>
#include <nuttx/wqueue.h>
@ -1475,7 +1476,7 @@ static int lpc43_ioc_setup(struct lpc43_rhport_s *rhport, struct lpc43_epinfo_s
/* Is the device still connected? */
flags = irqsave();
flags = enter_critical_section();
if (rhport->connected)
{
/* Then set iocwait to indicate that we expect to be informed when
@ -1494,7 +1495,7 @@ static int lpc43_ioc_setup(struct lpc43_rhport_s *rhport, struct lpc43_epinfo_s
ret = OK; /* We are good to go */
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
@ -2433,7 +2434,7 @@ static inline int lpc43_ioc_async_setup(struct lpc43_rhport_s *rhport,
/* Is the device still connected? */
flags = irqsave();
flags = enter_critical_section();
if (rhport->connected)
{
/* Then save callback information to used when either (1) the
@ -2449,7 +2450,7 @@ static inline int lpc43_ioc_async_setup(struct lpc43_rhport_s *rhport,
ret = OK; /* We are good to go */
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}
#endif
@ -3280,7 +3281,7 @@ static int lpc43_wait(FAR struct usbhost_connection_s *conn,
* ports or until an error occurs.
*/
flags = irqsave();
flags = enter_critical_section();
for (; ; )
{
/* Check for a change in the connection state on any root hub port */
@ -3302,7 +3303,7 @@ static int lpc43_wait(FAR struct usbhost_connection_s *conn,
connport->connected = rhport->connected;
*hport = connport;
irqrestore(flags);
leave_critical_section(flags);
usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP,
rhpndx + 1, rhport->connected);
@ -3323,7 +3324,7 @@ static int lpc43_wait(FAR struct usbhost_connection_s *conn,
g_ehci.hport = NULL;
*hport = (struct usbhost_hubport_s *)connport;
irqrestore(flags);
leave_critical_section(flags);
usbhost_vtrace2(EHCI_VTRACE2_MONWAKEUP,
connport->port + 1, connport->connected);
@ -4334,7 +4335,7 @@ static int lpc43_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
* related race conditions.
*/
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_USBHOST_ASYNCH
callback = epinfo->callback;
arg = epinfo->arg;
@ -4346,7 +4347,6 @@ static int lpc43_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
epinfo->arg = NULL;
#endif
epinfo->iocwait = false;
irqrestore(flags);
/* This will prevent any callbacks from occurring while are performing
* the cancellation. The transfer may still be in progress, however, so
@ -4355,7 +4355,7 @@ static int lpc43_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
epinfo->callback = NULL;
epinfo->arg = NULL;
irqrestore(flags);
leave_critical_section(flags);
/* Bail if there is no transfer in progress for this endpoint */
@ -4515,7 +4515,7 @@ static int lpc43_connect(FAR struct usbhost_driver_s *drvr,
/* Report the connection event */
flags = irqsave();
flags = enter_critical_section();
DEBUGASSERT(g_ehci.hport == NULL); /* REVISIT */
g_ehci.hport = hport;
@ -4525,7 +4525,7 @@ static int lpc43_connect(FAR struct usbhost_driver_s *drvr,
lpc43_givesem(&g_ehci.pscsem);
}
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
#endif

8
arch/arm/src/lpc43xx/lpc43_ethernet.c
View File

@ -2436,7 +2436,7 @@ static int lpc43_ifdown(struct net_driver_s *dev)
/* Disable the Ethernet interrupt */
flags = irqsave();
flags = enter_critical_section();
up_disable_irq(LPC43M4_IRQ_ETHERNET);
/* Cancel the TX poll timer and TX timeout timers */
@ -2454,7 +2454,7 @@ static int lpc43_ifdown(struct net_driver_s *dev)
/* Mark the device "down" */
priv->ifup = false;
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -2563,12 +2563,12 @@ static int lpc43_txavail(struct net_driver_s *dev)
* level processing.
*/
flags = irqsave();
flags = enter_critical_section();
/* Perform the out-of-cycle poll now */
lpc43_txavail_process(priv);
irqrestore(flags);
leave_critical_section(flags);
#endif
return OK;

12
arch/arm/src/lpc43xx/lpc43_gpio.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc43/lpc43_gpio.c
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -37,13 +37,15 @@
* Included Files
****************************************************************************/
#include <arch/board/board.h>
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "lpc43_gpio.h"
@ -166,7 +168,7 @@ int lpc43_gpio_config(uint16_t gpiocfg)
/* Handle the GPIO configuration by the basic mode of the pin */
flags = irqsave();
flags = enter_critical_section();
switch (gpiocfg & GPIO_MODE_MASK)
{
case GPIO_MODE_INPUT: /* GPIO input pin */
@ -197,7 +199,7 @@ int lpc43_gpio_config(uint16_t gpiocfg)
break;
}
irqrestore(flags);
leave_critical_section(flags);
return ret;
}

14
arch/arm/src/lpc43xx/lpc43_gpioint.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/lpc43/lpc43_gpioint.c
*
* Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2014, 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -58,9 +58,11 @@
#include <arch/board/board.h>
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <errno.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_arch.h"
#include "chip.h"
#include "chip/lpc43_scu.h"
@ -115,7 +117,7 @@ int lpc43_gpioint_grpinitialize(int group, bool anded, bool level)
/* Select the group register base address and disable the group interrupt */
flags = irqsave();
flags = enter_critical_section();
if (group == 0)
{
grpbase = LPC43_GRP0INT_BASE;
@ -152,7 +154,7 @@ int lpc43_gpioint_grpinitialize(int group, bool anded, bool level)
putreg32(regval, grpbase + LPC43_GRPINT_CTRL_OFFSET);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}
@ -280,7 +282,7 @@ int lpc43_gpioint_grpconfig(uint16_t gpiocfg)
/* Select the group register base address */
flags = irqsave();
flags = enter_critical_section();
if (GPIO_IS_GROUP0(gpiocfg))
{
grpbase = LPC43_GRP0INT_BASE;
@ -315,7 +317,7 @@ int lpc43_gpioint_grpconfig(uint16_t gpiocfg)
regval |= bitmask;
putreg32(regval, regaddr);
irqrestore(flags);
leave_critical_section(flags);
return OK;
}

10
arch/arm/src/lpc43xx/lpc43_i2c.c
View File

@ -64,7 +64,7 @@
#include <nuttx/wdog.h>
#include <nuttx/i2c/i2c_master.h>
#include <arch/irq.h>
#include <nuttx/irq.h>
#include <arch/board/board.h>
#include "chip.h"
@ -239,10 +239,10 @@ static void lpc43_i2c_timeout(int argc, uint32_t arg, ...)
{
struct lpc43_i2cdev_s *priv = (struct lpc43_i2cdev_s *)arg;
irqstate_t flags = irqsave();
irqstate_t flags = enter_critical_section();
priv->state = 0xff;
sem_post(&priv->wait);
irqrestore(flags);
leave_critical_section(flags);
}
/****************************************************************************
@ -471,7 +471,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
irqstate_t flags;
uint32_t regval;
flags = irqsave();
flags = enter_critical_section();
#ifdef CONFIG_LPC43_I2C0
if (port == 0)
@ -535,7 +535,7 @@ struct i2c_master_s *lpc43_i2cbus_initialize(int port)
return NULL;
}
irqrestore(flags);
leave_critical_section(flags);
putreg32(I2C_CONSET_I2EN, priv->base + LPC43_I2C_CONSET_OFFSET);

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