diff --git a/arch/xtensa/src/common/xtensa.h b/arch/xtensa/src/common/xtensa.h index 20c67fc6d0..133903d194 100644 --- a/arch/xtensa/src/common/xtensa.h +++ b/arch/xtensa/src/common/xtensa.h @@ -317,7 +317,8 @@ void xtensa_coproc_restorestate(struct xtensa_cpstate_s *cpstate); /* Signals */ -void xtensa_sigdeliver(void); +void _xtensa_sig_trampoline(void); +void xtensa_sig_deliver(void); /* Chip-specific functions **************************************************/ /* Chip specific functions defined in arch/xtensa/src/ */ diff --git a/arch/xtensa/src/common/xtensa_schedsigaction.c b/arch/xtensa/src/common/xtensa_schedsigaction.c index db0f5fa9c3..6154f5126a 100644 --- a/arch/xtensa/src/common/xtensa_schedsigaction.c +++ b/arch/xtensa/src/common/xtensa_schedsigaction.c @@ -150,7 +150,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * disabled */ - CURRENT_REGS[REG_PC] = (uint32_t)xtensa_sigdeliver; + CURRENT_REGS[REG_PC] = (uint32_t)_xtensa_sig_trampoline; #ifdef __XTENSA_CALL0_ABI__ CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM); #else @@ -185,7 +185,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) * disabled */ - tcb->xcp.regs[REG_PC] = (uint32_t)xtensa_sigdeliver; + tcb->xcp.regs[REG_PC] = (uint32_t)_xtensa_sig_trampoline; #ifdef __XTENSA_CALL0_ABI__ tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM); #else diff --git a/arch/xtensa/src/common/xtensa_sigdeliver.c b/arch/xtensa/src/common/xtensa_sigdeliver.c index ce43441928..ec6e6c56dd 100644 --- a/arch/xtensa/src/common/xtensa_sigdeliver.c +++ b/arch/xtensa/src/common/xtensa_sigdeliver.c @@ -58,7 +58,7 @@ ****************************************************************************/ /**************************************************************************** - * Name: xtensa_sigdeliver + * Name: xtensa_sig_deliver * * Description: * This is the a signal handling trampoline. When a signal action was @@ -67,7 +67,7 @@ * ****************************************************************************/ -void xtensa_sigdeliver(void) +void xtensa_sig_deliver(void) { struct tcb_s *rtcb = this_task(); uint32_t regs[XCPTCONTEXT_REGS]; diff --git a/arch/xtensa/src/common/xtensa_sigtramp.S b/arch/xtensa/src/common/xtensa_sigtramp.S new file mode 100644 index 0000000000..afb8b831f1 --- /dev/null +++ b/arch/xtensa/src/common/xtensa_sigtramp.S @@ -0,0 +1,79 @@ +/**************************************************************************** + * arch/xtensa/src/common/xtensa_sigtramp.S + * + * Adapted from use in NuttX by: + * + * Copyright (C) 2016 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Derives from logic originally provided by Cadence Design Systems Inc. + * + * Copyright (c) 2006-2015 Cadence Design Systems Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY + * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + ****************************************************************************/ + + .file "xtensa_sigtramp.S" + +/**************************************************************************** + * Included Files + ****************************************************************************/ + +#include + +#include "xtensa_abi.h" + +/**************************************************************************** + * Public Functions + ****************************************************************************/ + +/**************************************************************************** + * Name: _xtensa_sig_trampoline + * + * Description: + * Just sets up a proper window call to xtensa_sig_deliver(). We get + * here via a context switch setup in up_schedule_signaction. Which + * re-vectors the context switch to this location. + * + * Here we just call xtensa_sig_deliver() using the proper ABI. NOTE + * that this function cannot return and depends on the fact that + * xtensa_sig_deliver() does not return. + * + * + ****************************************************************************/ + + .text + .global _xtensa_sig_trampoline + .type _xtensa_sig_trampoline, @function + .align 4 + +_xtensa_sig_trampoline: + ENTRY(16) + +#ifdef __XTENSA_CALL0_ABI__ + cali0 xtensa_sig_deliver /* Call xtensa_sig_deliver */ +#else + call4 xtensa_sig_deliver /* Call xtensa_sig_deliver */ +#endif + +1: j 1b + + .size _xtensa_sig_trampoline, . - _xtensa_sig_trampoline diff --git a/arch/xtensa/src/esp32/Make.defs b/arch/xtensa/src/esp32/Make.defs index eeba70f339..2537f06a73 100644 --- a/arch/xtensa/src/esp32/Make.defs +++ b/arch/xtensa/src/esp32/Make.defs @@ -42,6 +42,7 @@ HEAD_CSRC = esp32_start.c # Common XTENSA files (arch/xtensa/src/common) CMN_ASRCS = xtensa_context.S xtensa_coproc.S xtensa_cpuint.S xtensa_panic.S +CMN_ASRCS += xtensa_sigtramp.S CMN_CSRCS = xtensa_assert.c xtensa_blocktask.c xtensa_copystate.c CMN_CSRCS += xtensa_cpenable.c xtensa_createstack.c xtensa_exit.c xtensa_idle.c diff --git a/configs/esp32-core/README.txt b/configs/esp32-core/README.txt index e0b4198b58..84c90a6369 100644 --- a/configs/esp32-core/README.txt +++ b/configs/esp32-core/README.txt @@ -704,12 +704,8 @@ NOTES: NOTES: 1. See NOTES for the nsh configuration. - 2. 2016-12-23: I have only tried to execute this once and I see some - assertion from like 87 of xtensa_sigdeliver.c: - - ASSERT(rtcb->xcp.sigdeliver != NULL); - - I have not yet looked into this. + 2. 2016-12-23: Test appears to be fully functional in the single CPU mode. + I have not yet tried SMP mode. Things to Do ============