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arch/arm/src/lpc11xx: Fix a few of the easy copy-paste naming problems.

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This commit is contained in:
Gregory Nutt 2019-07-11 11:47:30 -06:00
parent 021a32b97d
commit 7221311578
6 changed files with 8 additions and 8 deletions
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4
arch/arm/src/lpc11xx/lpc11_gpio.c
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@ -40,9 +40,9 @@
#include <nuttx/config.h>
/* This file is only a thin shell that includes the correct GPIO logic for
* the selected LPC17xx/LPC40xx family. The correct file cannot be selected by the
* the selected LPC11xx. The correct file cannot be selected by the
* make system because it needs the intelligence that only exists in chip.h
* that can associate an LPC17xx/LPC40xx part number with an LPC17xx/LPC40xx family.
* that can associate an LPC11xxpart number with an LPC11xx family.
*/
#include <arch/lpc11xx/chip.h>

2
arch/arm/src/lpc11xx/lpc11_gpio.h
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@ -52,7 +52,7 @@
#include "hardware/lpc11_gpio.h"
#include "hardware/lpc11_pinconfig.h"
/* Include the GPIO definitions for the selected LPC17xx/LPC40xx family. */
/* Include the GPIO definitions for the selected LPC11xx family. */
#if defined(LPC111x)
# include "lpc111x_gpio.h"

4
arch/arm/src/lpc11xx/lpc11_gpioint.c
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@ -395,10 +395,10 @@ static void lpc11_gpiodemux(uint32_t intbase, uint32_t intmask,
* Name: lpc11_gpiointerrupt
*
* Description:
* Handle the GPIO interrupt. For the LPC176x family, that interrupt could
* Handle the GPIO interrupt. For the LPC11xx family, that interrupt could
* also that also indicates that an EINT3 interrupt has occurred. NOTE:
* This logic would have to be extended if EINT3 is actually used for
* External Interrupt 3 on an LPC176x platform.
* External Interrupt 3 on an LPC11xx platform.
*
****************************************************************************/

2
arch/arm/src/lpc11xx/lpc11_idle.c
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@ -97,7 +97,7 @@ void up_idle(void)
/* If the g_dma_inprogress is zero, then there is no DMA in progress. This
* value is needed in the IDLE loop to determine if the IDLE loop should
* go into lower power power consumption modes. According to the LPC17xx
* go into lower power power consumption modes. According to the LPC11xx
* User Manual: "The DMA controller can continue to work in Sleep mode, and
* has access to the peripheral SRAMs and all peripheral registers. The
* flash memory and the Main SRAM are not available in Sleep mode, they are

2
arch/arm/src/lpc11xx/lpc11_timer.h
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@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/lpc17xx_40xx/lpc11_timer.h
* arch/arm/src/lpc11xx/lpc11_timer.h
*
* Copyright (C) 2010, 2012-2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>

2
arch/arm/src/lpc11xx/lpc11_userspace.h
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@ -1,5 +1,5 @@
/************************************************************************************
* arch/arm/src/lpc17xx_40xx/lpc11_userspace.h
* arch/arm/src/lpc11xx/lpc11_userspace.h
*
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>