arch/arm/src/stm32f7/stm32_tim.c: dd OUTTOGGLE mode for STM32f7 timer
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@ -712,6 +712,11 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
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ccer_val |= ATIM_CCER_CC1E << (channel << 2);
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break;
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case STM32_TIM_CH_OUTTOGGLE:
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ccmr_val = (ATIM_CCMR_MODE_OCREFTOG << ATIM_CCMR1_OC1M_SHIFT) + ATIM_CCMR1_OC1PE;
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ccer_val |= ATIM_CCER_CC1E << (channel << 2);
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break;
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default:
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return -EINVAL;
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}
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@ -108,7 +108,7 @@ typedef enum
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STM32_TIM_MODE_CK_INT = 0x0000,
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//STM32_TIM_MODE_CK_INT_TRIG = 0x0400,
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//STM32_TIM_MODE_CK_EXT = 0x0800,
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//STM32_TIM_MODE_CK_EXT_TRIG = 0x0C00,
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//STM32_TIM_MODE_CK_EXT_TRIG = 0x0c00,
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/* Clock sources, OR'ed with CK_EXT */
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@ -135,12 +135,14 @@ typedef enum
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/* MODES: */
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STM32_TIM_CH_MODE_MASK = 0x06,
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STM32_TIM_CH_MODE_MASK = 0x0e,
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/* Output Compare Modes */
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STM32_TIM_CH_OUTPWM = 0x04, /** Enable standard PWM mode, active high when counter < compare */
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STM32_TIM_CH_OUTPWM = 0x04, /* Enable standard PWM mode, active high when counter < compare */
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//STM32_TIM_CH_OUTCOMPARE = 0x06,
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STM32_TIM_CH_OUTTOGGLE = 0x08,
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// TODO other modes ... as PWM capture, ENCODER and Hall Sensor
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//STM32_TIM_CH_INCAPTURE = 0x10,
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