diff --git a/arch/arm/src/stm32f7/stm32_tim.c b/arch/arm/src/stm32f7/stm32_tim.c
index 4eac6ab22a..2f536543a1 100644
--- a/arch/arm/src/stm32f7/stm32_tim.c
+++ b/arch/arm/src/stm32f7/stm32_tim.c
@@ -712,6 +712,11 @@ static int stm32_tim_setchannel(FAR struct stm32_tim_dev_s *dev, uint8_t channel
         ccer_val |= ATIM_CCER_CC1E << (channel << 2);
         break;
 
+      case STM32_TIM_CH_OUTTOGGLE:
+          ccmr_val  =  (ATIM_CCMR_MODE_OCREFTOG << ATIM_CCMR1_OC1M_SHIFT) + ATIM_CCMR1_OC1PE;
+          ccer_val |= ATIM_CCER_CC1E << (channel << 2);
+          break;
+
       default:
         return -EINVAL;
     }
diff --git a/arch/arm/src/stm32f7/stm32_tim.h b/arch/arm/src/stm32f7/stm32_tim.h
index 06d7fe8e84..224ebf624f 100644
--- a/arch/arm/src/stm32f7/stm32_tim.h
+++ b/arch/arm/src/stm32f7/stm32_tim.h
@@ -108,7 +108,7 @@ typedef enum
   STM32_TIM_MODE_CK_INT       = 0x0000,
 //STM32_TIM_MODE_CK_INT_TRIG  = 0x0400,
 //STM32_TIM_MODE_CK_EXT       = 0x0800,
-//STM32_TIM_MODE_CK_EXT_TRIG  = 0x0C00,
+//STM32_TIM_MODE_CK_EXT_TRIG  = 0x0c00,
 
   /* Clock sources, OR'ed with CK_EXT */
 
@@ -135,12 +135,14 @@ typedef enum
 
   /* MODES: */
 
-  STM32_TIM_CH_MODE_MASK      = 0x06,
+  STM32_TIM_CH_MODE_MASK      = 0x0e,
 
   /* Output Compare Modes */
 
-  STM32_TIM_CH_OUTPWM         = 0x04,     /** Enable standard PWM mode, active high when counter < compare */
+  STM32_TIM_CH_OUTPWM         = 0x04,     /* Enable standard PWM mode, active high when counter < compare */
 //STM32_TIM_CH_OUTCOMPARE     = 0x06,
+  STM32_TIM_CH_OUTTOGGLE      = 0x08,
+
 
   // TODO other modes ... as PWM capture, ENCODER and Hall Sensor
 //STM32_TIM_CH_INCAPTURE      = 0x10,