diff --git a/arch/arm/src/stm32l4/stm32l4_lse.c b/arch/arm/src/stm32l4/stm32l4_lse.c
index 3cd028b283..563988fab7 100644
--- a/arch/arm/src/stm32l4/stm32l4_lse.c
+++ b/arch/arm/src/stm32l4/stm32l4_lse.c
@@ -89,7 +89,7 @@ void stm32l4_rcc_enablelse(void)
    */
 
   regval = getreg32(STM32L4_RCC_BDCR);
-  regval |= RCC_BDCR_LSEON|RCC_BDCR_LSEDRV_MIDHI;
+  regval |= RCC_BDCR_LSEON;
   putreg32(regval,STM32L4_RCC_BDCR);
 
   /* Wait for the LSE clock to be ready */
diff --git a/arch/arm/src/stm32l4/stm32l4_pwr.c b/arch/arm/src/stm32l4/stm32l4_pwr.c
index d17c9d6fba..3573408cd1 100644
--- a/arch/arm/src/stm32l4/stm32l4_pwr.c
+++ b/arch/arm/src/stm32l4/stm32l4_pwr.c
@@ -111,14 +111,16 @@ bool stm32l4_pwr_enableclk(bool enable)
       /* Disable power interface clock */
 
       regval &= ~RCC_APB1ENR1_PWREN;
-      putreg32(STM32L4_RCC_APB1ENR1, regval);
+      putreg32(regval, STM32L4_RCC_APB1ENR1);
+      regval = getreg32(STM32L4_RCC_APB1ENR1);
     }
   else if (!wasenabled && enable)
     {
       /* Enable power interface clock */
 
       regval |= RCC_APB1ENR1_PWREN;
-      putreg32(STM32L4_RCC_APB1ENR1, regval);
+      putreg32(regval, STM32L4_RCC_APB1ENR1);
+      regval = getreg32(STM32L4_RCC_APB1ENR1);
     }
   
   return wasenabled;