STM32 ADC: Added support for ADC's IO_ENABLE_TEMPER_VOLT_CH ioctl on STM32F10XX and STM32F20XX

This commit is contained in:
Dmitriy Linikov 2017-10-30 06:21:48 -06:00 committed by Gregory Nutt
parent a50c5d6674
commit 73082f7513
2 changed files with 53 additions and 5 deletions

View File

@ -2250,7 +2250,7 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
* *
****************************************************************************/ ****************************************************************************/
#ifdef CONFIG_STM32_STM32L15XX #if defined(CONFIG_STM32_STM32L15XX) || defined(CONFIG_STM32_STM32F20XX)
static void adc_ioc_enable_tvref_register(FAR struct adc_dev_s *dev, static void adc_ioc_enable_tvref_register(FAR struct adc_dev_s *dev,
bool enable) bool enable)
{ {
@ -2265,6 +2265,32 @@ static void adc_ioc_enable_tvref_register(FAR struct adc_dev_s *dev,
ainfo("STM32_ADC_CCR value: 0x%08x\n", getreg32(STM32_ADC_CCR)); ainfo("STM32_ADC_CCR value: 0x%08x\n", getreg32(STM32_ADC_CCR));
} }
#elif defined(CONFIG_STM32_STM32F10XX)
static void adc_ioc_enable_tvref_register(FAR struct adc_dev_s *dev,
bool enable)
{
#if defined(CONFIG_STM32_ADC1)
FAR struct stm32_dev_s *priv = (FAR struct stm32_dev_s *)dev->ad_priv;
/* TSVREF bit is only available in the STM32_ADC1_CR2 register. */
if (priv->intf == 1)
{
if (enable)
{
adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, 0, ADC_CR2_TSVREFE);
}
else
{
adc_modifyreg(priv, STM32_ADC_CR2_OFFSET, ADC_CR2_TSVREFE, 0);
}
}
ainfo("STM32_ADC_CR2 value: 0x%08x\n",
adc_getreg(priv, STM32_ADC_CR2_OFFSET));
#endif /* CONFIG_STM32_ADC1 */
}
#endif #endif
/**************************************************************************** /****************************************************************************
@ -2661,7 +2687,17 @@ static int adc_ioctl(FAR struct adc_dev_s *dev, int cmd, unsigned long arg)
adc_startconv(priv, true); adc_startconv(priv, true);
break; break;
#ifdef CONFIG_STM32_STM32L15XX #if defined(CONFIG_STM32_STM32F10XX)
case IO_ENABLE_TEMPER_VOLT_CH:
adc_ioc_enable_tvref_register(dev, *(bool *)arg);
break;
#elif defined(CONFIG_STM32_STM32F20XX)
case IO_ENABLE_TEMPER_VOLT_CH:
adc_ioc_enable_tvref_register(dev, *(bool *)arg);
break;
#elif defined(CONFIG_STM32_STM32L15XX)
case IO_ENABLE_TEMPER_VOLT_CH: case IO_ENABLE_TEMPER_VOLT_CH:
adc_ioc_enable_tvref_register(dev, *(bool *)arg); adc_ioc_enable_tvref_register(dev, *(bool *)arg);
break; break;

View File

@ -1856,8 +1856,20 @@
* Public Types * Public Types
************************************************************************************/ ************************************************************************************/
#ifdef CONFIG_STM32_STM32L15XX #if defined(CONFIG_STM32_STM32F10XX)
typedef enum ADC_IO_CMDS enum adc_io_cmds_e
{
IO_ENABLE_TEMPER_VOLT_CH = 0,
};
#elif defined(CONFIG_STM32_STM32F20XX)
enum adc_io_cmds_e
{
IO_ENABLE_TEMPER_VOLT_CH = 0,
};
#elif defined(CONFIG_STM32_STM32L15XX)
enum adc_io_cmds_e
{ {
IO_ENABLE_TEMPER_VOLT_CH = 0, IO_ENABLE_TEMPER_VOLT_CH = 0,
IO_ENABLE_DISABLE_PDI, IO_ENABLE_DISABLE_PDI,
@ -1871,7 +1883,7 @@ typedef enum ADC_IO_CMDS
IO_START_CONV, IO_START_CONV,
IO_STOP_ADC, IO_STOP_ADC,
IO_START_ADC, IO_START_ADC,
} ADC_IO_CMDS; };
/* Channel and sample time pair */ /* Channel and sample time pair */