From 735f4d6ea55a6cbeee80700fd03a7e1e3e05de5e Mon Sep 17 00:00:00 2001 From: Alan Carvalho de Assis Date: Mon, 17 Apr 2017 09:58:04 -0600 Subject: [PATCH] STM32F0: Enable the clock for all GPIO ports --- arch/arm/src/stm32f0/stm32f0_lowputc.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/arch/arm/src/stm32f0/stm32f0_lowputc.c b/arch/arm/src/stm32f0/stm32f0_lowputc.c index 566dc14bf9..8dfe8e0820 100644 --- a/arch/arm/src/stm32f0/stm32f0_lowputc.c +++ b/arch/arm/src/stm32f0/stm32f0_lowputc.c @@ -296,6 +296,7 @@ void stm32f0_lowsetup(void) #if defined(HAVE_UART) #if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG) uint32_t cr; + uint32_t clken; #endif #if defined(HAVE_CONSOLE) @@ -304,10 +305,12 @@ void stm32f0_lowsetup(void) modifyreg32(STM32F0_CONSOLE_APBREG, 0, STM32F0_CONSOLE_APBEN); #endif - /* Enable the console USART and configure GPIO pins needed for rx/tx. - * - * NOTE: Clocking for selected U[S]ARTs was already provided in stm32f0_rcc.c - */ + /* Enable the console USART and configure GPIO pins needed for rx/tx. */ + + clken = getreg32(STM32F0_RCC_AHBENR); + clken |= RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPAEN |\ + RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPAEN; + putreg32(clken, STM32F0_RCC_AHBENR); #ifdef STM32F0_CONSOLE_TX stm32f0_configgpio(STM32F0_CONSOLE_TX);