STM32F0: Enable the clock for all GPIO ports
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cd62425433
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@ -296,6 +296,7 @@ void stm32f0_lowsetup(void)
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#if defined(HAVE_UART)
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#if defined(HAVE_UART)
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#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
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uint32_t cr;
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uint32_t cr;
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uint32_t clken;
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#endif
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#endif
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#if defined(HAVE_CONSOLE)
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#if defined(HAVE_CONSOLE)
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@ -304,10 +305,12 @@ void stm32f0_lowsetup(void)
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modifyreg32(STM32F0_CONSOLE_APBREG, 0, STM32F0_CONSOLE_APBEN);
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modifyreg32(STM32F0_CONSOLE_APBREG, 0, STM32F0_CONSOLE_APBEN);
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#endif
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#endif
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/* Enable the console USART and configure GPIO pins needed for rx/tx.
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/* Enable the console USART and configure GPIO pins needed for rx/tx. */
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*
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* NOTE: Clocking for selected U[S]ARTs was already provided in stm32f0_rcc.c
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clken = getreg32(STM32F0_RCC_AHBENR);
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*/
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clken |= RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPAEN |\
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RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPAEN | RCC_AHBENR_IOPAEN;
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putreg32(clken, STM32F0_RCC_AHBENR);
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#ifdef STM32F0_CONSOLE_TX
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#ifdef STM32F0_CONSOLE_TX
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stm32f0_configgpio(STM32F0_CONSOLE_TX);
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stm32f0_configgpio(STM32F0_CONSOLE_TX);
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