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xtensa: Improve Kconfig description of ESP32-S2 arch family

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Also fix the wrong "dual-core" statement, since all ESP32-S2 chips are
composed of a single Xtensa LX7 core.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei 2022-01-06 11:31:36 -03:00 committed by Petro Karashchenko
parent 6e31d0dd87
commit 73ea0c1627
1 changed files with 4 additions and 2 deletions
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6
arch/xtensa/Kconfig
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@ -65,8 +65,10 @@ config ARCH_CHIP_ESP32S2
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
---help---
The ESP32-S2 is a dual-core system from Espressif with a
Harvard architecture Xtensa LX7 CPU.
ESP32-S2 is a truly secure, highly integrated, low-power, 2.4 GHz Wi-Fi
Microcontroller SoC supporting Wi-Fi HT40 and having 43 GPIOs.
Based on an Xtensa single-core 32-bit LX7 processor, it can be clocked
at up to 240 MHz.
config ARCH_CHIP_XTENSA_CUSTOM
bool "Custom XTENSA chip"