diff --git a/arch/mips/src/common/up_idle.c b/arch/mips/src/common/up_idle.c index bee134392f..601a0cd5e3 100644 --- a/arch/mips/src/common/up_idle.c +++ b/arch/mips/src/common/up_idle.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/mips/src/common/up_idle.c * - * Copyright (C) 2011-2012, 2016 Gregory Nutt. All rights reserved. + * Copyright (C) 2011-2012, 2016, 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -69,27 +69,23 @@ void up_idle(void) sched_process_timer(); #else + irqstate_t flags; /* This would be an appropriate place to put some MCU-specific logic to * sleep in a reduced power mode until an interrupt occurs to save power */ - /* This is a kludge that I still don't understand. The call to kmm_trysemaphore() - * in the os_start.c IDLE loop seems necessary for the good health of the IDLE - * loop. When the work queue is enabled, this logic is removed from the IDLE - * loop and it appears that we are somehow left idling with interrupts non- - * functional. The following should be no-op, it just disables then re-enables - * interrupts. But it fixes the problem and will stay here until I understand - * the problem/fix better. + /* This is a kludge that I still don't understand. It appears that we are + * somehow left idling with interrupts non-functional. The following should + * be no-op, it just disables then re-enables interrupts. But it fixes the + * problem and will stay here until I understand the problem/fix better. * - * And no, the contents of the CP0 status register are not incorrect. But for - * some reason the status register needs to be re-written again on this thread - * for it to take effect. This might be a PIC32-only issue? + * And no, the contents of the CP0 status register are not incorrect. But + * for some reason the status register needs to be re-written again on this + * thread for it to take effect. This might be a PIC32-only issue? */ -#ifdef CONFIG_SCHED_WORKQUEUE - irqstate_t flags = enter_critical_section(); - leave_critical_section(flags); -#endif + flags = up_irq_save(); + up_irq_restore(flags); #endif } diff --git a/arch/mips/src/pic32mz/pic32mz-gpio.c b/arch/mips/src/pic32mz/pic32mz-gpio.c index 3d247edc5b..0ec2c44fec 100644 --- a/arch/mips/src/pic32mz/pic32mz-gpio.c +++ b/arch/mips/src/pic32mz/pic32mz-gpio.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/mips/src/pic32mz/pic32mz-gpio.c * - * Copyright (C) 2015 Gregory Nutt. All rights reserved. + * Copyright (C) 2015, 2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -332,10 +332,10 @@ void pic32mz_dumpgpio(uint32_t pinset, const char *msg) getreg32(base + PIC32MZ_IOPORT_PORT_OFFSET), getreg32(base + PIC32MZ_IOPORT_LAT_OFFSET), getreg32(base + PIC32MZ_IOPORT_ODC_OFFSET)); - gpioinfo(" CNCON: %08x CNEN: %08x CNPUE: %08x\n", - getreg32(PIC32MZ_IOPORT_CNCON), - getreg32(PIC32MZ_IOPORT_CNEN), - getreg32(PIC32MZ_IOPORT_CNPUE)); + gpioinfo(" CNCON: %08x CNEN: %08x CNPU: %08x\n", + getreg32(base + PIC32MZ_IOPORT_CNCON_OFFSET), + getreg32(base + PIC32MZ_IOPORT_CNEN_OFFSET), + getreg32(base + PIC32MZ_IOPORT_CNPU_OFFSET)); sched_unlock(); } } diff --git a/arch/mips/src/pic32mz/pic32mz-serial.c b/arch/mips/src/pic32mz/pic32mz-serial.c index cfce690614..b4d6e8e791 100644 --- a/arch/mips/src/pic32mz/pic32mz-serial.c +++ b/arch/mips/src/pic32mz/pic32mz-serial.c @@ -1,7 +1,7 @@ /**************************************************************************** * arch/mips/src/pic32mz/pic32mz-serial.c * - * Copyright (C) 2015, 2017 Gregory Nutt. All rights reserved. + * Copyright (C) 2015, 2017-2018 Gregory Nutt. All rights reserved. * Author: Gregory Nutt * * Redistribution and use in source and binary forms, with or without @@ -96,10 +96,10 @@ # define CONSOLE_DEV g_uart4port /* UART4 is console */ # define TTYS0_DEV g_uart4port /* UART4 is ttyS0 */ # define UART4_ASSIGNED 1 -#elif defined(CONFIG_UART4_SERIAL_CONSOLE) -# define CONSOLE_DEV g_uart5port /* UART4 is console */ -# define TTYS0_DEV g_uart5port /* UART4 is ttyS0 */ -# define UART4_ASSIGNED 1 +#elif defined(CONFIG_UART5_SERIAL_CONSOLE) +# define CONSOLE_DEV g_uart5port /* UART5 is console */ +# define TTYS0_DEV g_uart5port /* UART5 is ttyS0 */ +# define UART5_ASSIGNED 1 #elif defined(CONFIG_UART6_SERIAL_CONSOLE) # define CONSOLE_DEV g_uart6port /* UART6 is console */ # define TTYS5_DEV g_uart6port /* UART6 is ttyS0 */ @@ -118,9 +118,9 @@ # elif defined(CONFIG_PIC32MZ_UART4) # define TTYS0_DEV g_uart4port /* UART4 is ttyS0 */ # define UART4_ASSIGNED 1 -# elif defined(CONFIG_PIC32MZ_UART4) -# define TTYS0_DEV g_uart5port /* UART4 is ttyS0 */ -# define UART4_ASSIGNED 1 +# elif defined(CONFIG_PIC32MZ_UART5) +# define TTYS0_DEV g_uart5port /* UART5 is ttyS0 */ +# define UART5_ASSIGNED 1 # elif defined(CONFIG_PIC32MZ_UART6) # define TTYS0_DEV g_uart6port /* UART6 is ttyS0 */ # define UART6_ASSIGNED 1 diff --git a/configs/flipnclick-pic32mz/nsh/defconfig b/configs/flipnclick-pic32mz/nsh/defconfig index 0533b276c7..7087220d9f 100644 --- a/configs/flipnclick-pic32mz/nsh/defconfig +++ b/configs/flipnclick-pic32mz/nsh/defconfig @@ -1,4 +1,6 @@ # CONFIG_ARCH_RAMFUNCS is not set +# CONFIG_PIC32MZ_DEBUGGER_ENABLE is not set +# CONFIG_PIC32MZ_TRACE_ENABLE is not set CONFIG_ARCH_BOARD_FLIPNCLICK_PIC32MZ=y CONFIG_ARCH_BOARD="flipnclick-pic32mz" CONFIG_ARCH_CHIP_PIC32MZ=y @@ -32,7 +34,7 @@ CONFIG_NSH_FILEIOSIZE=512 CONFIG_NSH_LINELEN=64 CONFIG_NSH_READLINE=y CONFIG_PIC32MZ_ICESEL_CH2=y -CONFIG_PIC32MZ_UART4=y +CONFIG_PIC32MZ_UART3=y CONFIG_PREALLOC_MQ_MSGS=4 CONFIG_PREALLOC_TIMERS=4 CONFIG_PREALLOC_WDOGS=8 @@ -44,6 +46,6 @@ CONFIG_SDCLONE_DISABLE=y CONFIG_START_DAY=7 CONFIG_START_MONTH=3 CONFIG_START_YEAR=2012 -CONFIG_UART4_SERIAL_CONSOLE=y +CONFIG_UART3_SERIAL_CONSOLE=y CONFIG_USER_ENTRYPOINT="nsh_main" CONFIG_WDOG_INTRESERVE=1