Merged in ziggurat29/nuttx/stm32l4_smartfs_test (pull request #97)
fixes to n25qxxx mtd driver for smartfs support, etc...
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commit
74037a7951
@ -210,22 +210,60 @@ FAR struct mtd_dev_s *mtd_temp;
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g_mtd_fs = mtd_temp;
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#ifdef CONFIG_MTD_PARTITION
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/* Setup a partition of 256KiB for our file system. */
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{
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FAR struct mtd_geometry_s geo;
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off_t nblocks;
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#if defined(CONFIG_N25QXXX_SECTOR512)
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mtd_temp = mtd_partition(g_mtd_fs, 0, 512);
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#else
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mtd_temp = mtd_partition(g_mtd_fs, 0, 64);
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/* Setup a partition of 256KiB for our file system. */
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ret = MTD_IOCTL(g_mtd_fs, MTDIOC_GEOMETRY, (unsigned long)(uintptr_t)&geo);
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if (ret < 0)
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{
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_err("ERROR: MTDIOC_GEOMETRY failed\n");
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return ret;
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}
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nblocks = (256*1024) / geo.blocksize;
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mtd_temp = mtd_partition(g_mtd_fs, 0, nblocks);
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if (!mtd_temp)
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{
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_err("ERROR: mtd_partition failed\n");
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return ret;
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}
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g_mtd_fs = mtd_temp;
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}
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#endif
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if (!g_mtd_fs)
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#ifdef HAVE_N25QXXX_SMARTFS
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/* Configure the device with no partition support */
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ret = smart_initialize(N25QXXX_SMART_MINOR, g_mtd_fs, NULL);
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if (ret != OK)
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{
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_err("ERROR: mtd_partition failed\n");
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_err("ERROR: Failed to initialize SmartFS: %d\n", ret);
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}
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#elif defined(HAVE_N25QXXX_NXFFS)
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/* Initialize to provide NXFFS on the N25QXXX MTD interface */
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ret = nxffs_initialize(g_mtd_fs);
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if (ret < 0)
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{
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_err("ERROR: NXFFS initialization failed: %d\n", ret);
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}
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/* Mount the file system at /mnt/nxffs */
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ret = mount(NULL, "/mnt/nxffs", "nxffs", 0, NULL);
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if (ret < 0)
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{
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_err("ERROR: Failed to mount the NXFFS volume: %d\n", errno);
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return ret;
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}
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g_mtd_fs = mtd_temp;
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#endif
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#else /* if defined(HAVE_N25QXXX_CHARDEV) */
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/* Use the FTL layer to wrap the MTD driver as a block driver */
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ret = ftl_initialize(N25QXXX_MTD_MINOR, g_mtd_fs);
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@ -256,6 +294,7 @@ FAR struct mtd_dev_s *mtd_temp;
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_err("ERROR: bchdev_register %s failed: %d\n", chardev, ret);
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return ret;
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}
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#endif
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}
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#endif
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@ -87,7 +87,6 @@
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# define CONFIG_N25QXXX_DUMMIES 6
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#endif
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/* N25QXXX Commands *****************************************************************/
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/* Configuration, Status, Erase, Program Commands ***********************************/
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/* Command Value Description: */
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@ -98,7 +97,7 @@
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* 0x01 | SR */
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#define N25QXXX_READ_VOLCFG 0x85 /* Read volatile configuration register: *
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* 0x85 | VCR */
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#define N25QXXX_WRITE_VOLCFG 0x81 /* Write status register: *
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#define N25QXXX_WRITE_VOLCFG 0x81 /* Write svolatile configuration register: *
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* 0x81 | VCR */
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#define N25QXXX_WRITE_ENABLE 0x06 /* Write enable: *
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* 0x06 */
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@ -123,7 +122,7 @@
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/* Command Value Description: */
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/* Data sequence */
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/* ID/Security Commands *************************&***********************************/
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/* ID/Security Commands *************************************************************/
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/* Command Value Description: */
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/* Data sequence */
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#define N25QXXX_JEDEC_ID 0x9f /* JEDEC ID: *
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@ -141,8 +140,8 @@
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/* N25QXXX JEDIC IDs */
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#define N25QXXX3V_JEDEC_DEVICE_TYPE 0xba /* 3v memory device type */
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#define N25QXXX2V_JEDEC_DEVICE_TYPE 0xbb /* 2v memory device type */
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#define N25QXXX3V_JEDEC_DEVICE_TYPE 0xba /* 3v memory device type */
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#define N25QXXX2V_JEDEC_DEVICE_TYPE 0xbb /* 2v memory device type */
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#define N25Q016_JEDEC_CAPACITY 0x15 /* N25Q016 (2 MB) memory capacity */
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#define N25Q032_JEDEC_CAPACITY 0x16 /* N25Q032 (4 MB) memory capacity */
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@ -168,7 +167,7 @@
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#define STATUS_TB_MASK (1 << 5) /* Bit 5: Top / Bottom Protect */
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# define STATUS_TB_TOP (0 << 5) /* 0 = BP2-BP0 protect Top down */
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# define STATUS_TB_BOTTOM (1 << 5) /* 1 = BP2-BP0 protect Bottom up */
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#define STATUS_BP3_MASK (1 << 5) /* Bit 6: BP3 */
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#define STATUS_BP3_MASK (1 << 5) /* Bit 6: BP3 */
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#define STATUS_SRP0_MASK (1 << 7) /* Bit 7: Status register protect 0 */
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# define STATUS_SRP0_UNLOCKED (0 << 7) /* 0 = WP# no effect / PS Lock Down */
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# define STATUS_SRP0_LOCKED (1 << 7) /* 1 = WP# protect / OTP Lock Down */
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@ -979,7 +978,7 @@ static int n25qxxx_flush_cache(struct n25qxxx_dev_s *priv)
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ferr("ERROR: n25qxxx_write_page failed: %d\n", ret);
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}
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/* The case is no long dirty and the FLASH is no longer erased */
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/* The cache is no long dirty and the FLASH is no longer erased */
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CLR_DIRTY(priv);
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CLR_ERASED(priv);
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@ -1002,7 +1001,7 @@ static FAR uint8_t *n25qxxx_read_cache(struct n25qxxx_dev_s *priv, off_t sector)
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int ret;
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/* Convert from the 512 byte sector to the erase sector size of the device. For
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* exmample, if the actual erase sector size if 4Kb (1 << 12), then we first
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* example, if the actual erase sector size is 4Kb (1 << 12), then we first
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* shift to the right by 3 to get the sector number in 4096 increments.
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*/
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@ -1218,11 +1217,11 @@ static ssize_t n25qxxx_bread(FAR struct mtd_dev_s *dev, off_t startblock,
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nbytes >>= N25QXXX_SECTOR512_SHIFT;
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}
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#else
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nbytes = n25qxxx_read(dev, startblock << priv->sectorshift,
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nblocks << priv->sectorshift, buffer);
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nbytes = n25qxxx_read(dev, startblock << priv->pageshift,
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nblocks << priv->pageshift, buffer);
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if (nbytes > 0)
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{
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nbytes >>= priv->sectorshift;
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nbytes >>= priv->pageshift;
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}
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#endif
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@ -1253,8 +1252,8 @@ static ssize_t n25qxxx_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
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}
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#else
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ret = n25qxxx_write_page(priv, buffer, startblock << priv->sectorshift,
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nblocks << priv->sectorshift);
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ret = n25qxxx_write_page(priv, buffer, startblock << priv->pageshift,
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nblocks << priv->pageshift);
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if (ret < 0)
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{
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ferr("ERROR: n25qxxx_write_page failed: %d\n", ret);
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@ -1328,7 +1327,7 @@ static int n25qxxx_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
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geo->erasesize = (1 << N25QXXX_SECTOR512_SHIFT);
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geo->neraseblocks = priv->nsectors << (priv->sectorshift - N25QXXX_SECTOR512_SHIFT);
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#else
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geo->blocksize = (1 << priv->sectorshift);
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geo->blocksize = (1 << priv->pageshift);
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geo->erasesize = (1 << priv->sectorshift);
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geo->neraseblocks = priv->nsectors;
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#endif
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