diff --git a/arch/risc-v/src/common/riscv_cpuindex.c b/arch/risc-v/src/common/riscv_cpuindex.c
index 321827a6ac..fbf4e9face 100644
--- a/arch/risc-v/src/common/riscv_cpuindex.c
+++ b/arch/risc-v/src/common/riscv_cpuindex.c
@@ -26,12 +26,30 @@
 #include <stdint.h>
 #include <nuttx/arch.h>
 
+#include <arch/csr.h>
+
 #include "riscv_internal.h"
 
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
 
+/****************************************************************************
+ * Name: riscv_mhartid
+ *
+ * Description:
+ *   Context aware way to query hart id
+ *
+ * Returned Value:
+ *   Hart id
+ *
+ ****************************************************************************/
+
+uintptr_t riscv_mhartid(void)
+{
+  return READ_CSR(mhartid);
+}
+
 /****************************************************************************
  * Name: up_cpu_index
  *
@@ -48,10 +66,9 @@
  *
  ****************************************************************************/
 
+#ifdef CONFIG_SMP
 int up_cpu_index(void)
 {
-  int mhartid;
-
-  asm volatile ("csrr %0, mhartid": "=r" (mhartid));
-  return mhartid;
+  return (int)riscv_mhartid();
 }
+#endif
diff --git a/arch/risc-v/src/common/riscv_internal.h b/arch/risc-v/src/common/riscv_internal.h
index 206423b0d2..78379f0368 100644
--- a/arch/risc-v/src/common/riscv_internal.h
+++ b/arch/risc-v/src/common/riscv_internal.h
@@ -253,6 +253,19 @@ void riscv_cpu_boot(int cpu);
 int riscv_pause_handler(int irq, void *c, void *arg);
 #endif
 
+/****************************************************************************
+ * Name: riscv_mhartid
+ *
+ * Description:
+ *   Context aware way to query hart id
+ *
+ * Returned Value:
+ *   Hart id
+ *
+ ****************************************************************************/
+
+uintptr_t riscv_mhartid(void);
+
 #undef EXTERN
 #ifdef __cplusplus
 }
diff --git a/arch/risc-v/src/mpfs/Make.defs b/arch/risc-v/src/mpfs/Make.defs
index e8d4c61c72..aebaac16a0 100755
--- a/arch/risc-v/src/mpfs/Make.defs
+++ b/arch/risc-v/src/mpfs/Make.defs
@@ -32,6 +32,7 @@ CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
 CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
 CMN_CSRCS += riscv_mdelay.c riscv_udelay.c riscv_copyfullstate.c
 CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c
+CMN_CSRCS += riscv_cpuindex.c
 
 ifeq ($(CONFIG_SCHED_BACKTRACE),y)
 CMN_CSRCS += riscv_backtrace.c
diff --git a/arch/risc-v/src/mpfs/mpfs_irq.c b/arch/risc-v/src/mpfs/mpfs_irq.c
index ca7d6046ae..80080c102f 100755
--- a/arch/risc-v/src/mpfs/mpfs_irq.c
+++ b/arch/risc-v/src/mpfs/mpfs_irq.c
@@ -62,7 +62,7 @@ void up_irqinitialize(void)
 
   /* Disable all global interrupts for current hart */
 
-  uint64_t hart_id = READ_CSR(mhartid);
+  uintptr_t hart_id = riscv_mhartid();
 
   uint32_t *miebase;
   if (hart_id == 0)
@@ -180,7 +180,7 @@ void up_disable_irq(int irq)
 
       /* Clear enable bit for the irq */
 
-      uint64_t hart_id = READ_CSR(mhartid);
+      uintptr_t hart_id = riscv_mhartid();
       uintptr_t miebase;
 
       if (hart_id == 0)
@@ -234,7 +234,7 @@ void up_enable_irq(int irq)
 
       /* Set enable bit for the irq */
 
-      uint64_t hart_id = READ_CSR(mhartid);
+      uintptr_t hart_id = riscv_mhartid();
       uintptr_t miebase;
 
       if (hart_id == 0)
diff --git a/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c b/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c
index 1cc05c1139..486e2efc8b 100755
--- a/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c
+++ b/arch/risc-v/src/mpfs/mpfs_irq_dispatch.c
@@ -33,6 +33,7 @@
 #include <arch/board/board.h>
 
 #include "riscv_internal.h"
+
 #include "group/group.h"
 #include "hardware/mpfs_memorymap.h"
 #include "hardware/mpfs_plic.h"
@@ -70,7 +71,7 @@ void *riscv_dispatch_irq(uint64_t vector, uint64_t *regs)
 
   /* Firstly, check if the irq is machine external interrupt */
 
-  uint64_t hart_id = READ_CSR(mhartid);
+  uintptr_t hart_id = riscv_mhartid();
   uintptr_t claim_address;
 
   if (hart_id == 0)
diff --git a/arch/risc-v/src/mpfs/mpfs_start.c b/arch/risc-v/src/mpfs/mpfs_start.c
index 0dfc5b876b..d197c0156d 100755
--- a/arch/risc-v/src/mpfs/mpfs_start.c
+++ b/arch/risc-v/src/mpfs/mpfs_start.c
@@ -111,7 +111,7 @@ const uint64_t g_entrypoints[5] =
  * Name: __mpfs_start
  ****************************************************************************/
 
-void __mpfs_start(uint32_t mhartid)
+void __mpfs_start(uint64_t mhartid)
 {
   const uint32_t *src;
   uint32_t *dest;
diff --git a/arch/risc-v/src/mpfs/mpfs_timerisr.c b/arch/risc-v/src/mpfs/mpfs_timerisr.c
index 8dcf514b1b..1008205ce5 100755
--- a/arch/risc-v/src/mpfs/mpfs_timerisr.c
+++ b/arch/risc-v/src/mpfs/mpfs_timerisr.c
@@ -33,6 +33,7 @@
 #include <nuttx/spinlock.h>
 
 #include "riscv_internal.h"
+
 #include "mpfs.h"
 #include "mpfs_clockconfig.h"
 
@@ -114,7 +115,7 @@ void up_timer_initialize(void)
 {
   /* what is our timecmp address for this hart */
 
-  uint64_t hart_id = READ_CSR(mhartid);
+  uintptr_t hart_id = riscv_mhartid();
   _mtime_cmp = (uint64_t *)MPFS_CLINT_MTIMECMP0 + hart_id;
 
   /* Attach timer interrupt handler */